Tests for VK_KHR_separate_depth_stencil_layouts

Test coverage for VK_KHR_separate_depth_stencil_layouts. See
https://gitlab.khronos.org/vulkan/vulkan/merge_requests/3172

This change modifies several test groups to use a single
image aspect bit for depth+stencil formats rather than the
VU required D+S aspects.

Where appropriate the tests are also modified to use
the new depth-only or stencil-only optimal layouts.

Affects:

dEQP-VK.api.copy_and_blit.*d16_unorm_s8_uint*
dEQP-VK.api.copy_and_blit.*d24_unorm_s8_uint*
dEQP-VK.api.copy_and_blit.*d32_sfloat_s8_uint*

dEQP-VK.api.image_clearing*d16_unorm_s8_uint*
dEQP-VK.api.image_clearing*d24_unorm_s8_uint*
dEQP-VK.api.image_clearing*d32_sfloat_s8_uint*

dEQP-VK.pipeline.stencil*d16_unorm_s8_uint*
dEQP-VK.pipeline.stencil*d24_unorm_s8_uint*
dEQP-VK.pipeline.stencil*d32_sfloat_s8_uint*

dEQP-VK.pipeline.depth*d16_unorm_s8_uint*
dEQP-VK.pipeline.depth*d24_unorm_s8_uint*
dEQP-VK.pipeline.depth*d32_sfloat_s8_uint*

dEQP-VK.*.depth_stencil_resolve*d16_unorm_s8_uint*
dEQP-VK.*.depth_stencil_resolve*d24_unorm_s8_uint*
dEQP-VK.*.depth_stencil_resolve*d32_sfloat_s8_uint*

Change-Id: I147f3736614cc897f1319c5aac5ed1fdba2d7b66
Compontents: Vulkan
(cherry picked from commit 39e17004ec33f0e546e6f391f933fb938e8c507d)

diff --git a/android/cts/master/vk-master.txt b/android/cts/master/vk-master.txt
index f9edce0..f12747c 100644 (file)
--- a/android/cts/master/vk-master.txt
+++ b/android/cts/master/vk-master.txt
@@ -22681,14 +22681,26 @@ dEQP-VK.api.copy_and_blit.core.image_to_image.all_formats.depth_stencil.3d_d16_u
 dEQP-VK.api.copy_and_blit.core.image_to_image.all_formats.depth_stencil.3d_d16_unorm_s8_uint_d16_unorm_s8_uint.optimal_general
 dEQP-VK.api.copy_and_blit.core.image_to_image.all_formats.depth_stencil.3d_d16_unorm_s8_uint_d16_unorm_s8_uint.general_optimal
 dEQP-VK.api.copy_and_blit.core.image_to_image.all_formats.depth_stencil.3d_d16_unorm_s8_uint_d16_unorm_s8_uint.general_general
+dEQP-VK.api.copy_and_blit.core.image_to_image.all_formats.depth_stencil.d16_unorm_s8_uint_d16_unorm_s8_uint_separate_layouts.optimal_optimal
+dEQP-VK.api.copy_and_blit.core.image_to_image.all_formats.depth_stencil.d16_unorm_s8_uint_d16_unorm_s8_uint_separate_layouts.optimal_general
+dEQP-VK.api.copy_and_blit.core.image_to_image.all_formats.depth_stencil.d16_unorm_s8_uint_d16_unorm_s8_uint_separate_layouts.general_optimal
+dEQP-VK.api.copy_and_blit.core.image_to_image.all_formats.depth_stencil.d16_unorm_s8_uint_d16_unorm_s8_uint_separate_layouts.general_general
 dEQP-VK.api.copy_and_blit.core.image_to_image.all_formats.depth_stencil.3d_d24_unorm_s8_uint_d24_unorm_s8_uint.optimal_optimal
 dEQP-VK.api.copy_and_blit.core.image_to_image.all_formats.depth_stencil.3d_d24_unorm_s8_uint_d24_unorm_s8_uint.optimal_general
 dEQP-VK.api.copy_and_blit.core.image_to_image.all_formats.depth_stencil.3d_d24_unorm_s8_uint_d24_unorm_s8_uint.general_optimal
 dEQP-VK.api.copy_and_blit.core.image_to_image.all_formats.depth_stencil.3d_d24_unorm_s8_uint_d24_unorm_s8_uint.general_general
+dEQP-VK.api.copy_and_blit.core.image_to_image.all_formats.depth_stencil.d24_unorm_s8_uint_d24_unorm_s8_uint_separate_layouts.optimal_optimal
+dEQP-VK.api.copy_and_blit.core.image_to_image.all_formats.depth_stencil.d24_unorm_s8_uint_d24_unorm_s8_uint_separate_layouts.optimal_general
+dEQP-VK.api.copy_and_blit.core.image_to_image.all_formats.depth_stencil.d24_unorm_s8_uint_d24_unorm_s8_uint_separate_layouts.general_optimal
+dEQP-VK.api.copy_and_blit.core.image_to_image.all_formats.depth_stencil.d24_unorm_s8_uint_d24_unorm_s8_uint_separate_layouts.general_general
 dEQP-VK.api.copy_and_blit.core.image_to_image.all_formats.depth_stencil.3d_d32_sfloat_s8_uint_d32_sfloat_s8_uint.optimal_optimal
 dEQP-VK.api.copy_and_blit.core.image_to_image.all_formats.depth_stencil.3d_d32_sfloat_s8_uint_d32_sfloat_s8_uint.optimal_general
 dEQP-VK.api.copy_and_blit.core.image_to_image.all_formats.depth_stencil.3d_d32_sfloat_s8_uint_d32_sfloat_s8_uint.general_optimal
 dEQP-VK.api.copy_and_blit.core.image_to_image.all_formats.depth_stencil.3d_d32_sfloat_s8_uint_d32_sfloat_s8_uint.general_general
+dEQP-VK.api.copy_and_blit.core.image_to_image.all_formats.depth_stencil.d32_sfloat_s8_uint_d32_sfloat_s8_uint_separate_layouts.optimal_optimal
+dEQP-VK.api.copy_and_blit.core.image_to_image.all_formats.depth_stencil.d32_sfloat_s8_uint_d32_sfloat_s8_uint_separate_layouts.optimal_general
+dEQP-VK.api.copy_and_blit.core.image_to_image.all_formats.depth_stencil.d32_sfloat_s8_uint_d32_sfloat_s8_uint_separate_layouts.general_optimal
+dEQP-VK.api.copy_and_blit.core.image_to_image.all_formats.depth_stencil.d32_sfloat_s8_uint_d32_sfloat_s8_uint_separate_layouts.general_general
 dEQP-VK.api.copy_and_blit.core.image_to_image.3d_images.3d_to_2d_by_slices
 dEQP-VK.api.copy_and_blit.core.image_to_image.3d_images.2d_to_3d_by_layers
 dEQP-VK.api.copy_and_blit.core.image_to_image.3d_images.3d_to_2d_whole
@@ -72465,14 +72477,26 @@ dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.depth_stencil.3d_d16_unorm
 dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.depth_stencil.3d_d16_unorm_s8_uint_d16_unorm_s8_uint.optimal_general_nearest
 dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.depth_stencil.3d_d16_unorm_s8_uint_d16_unorm_s8_uint.general_optimal_nearest
 dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.depth_stencil.3d_d16_unorm_s8_uint_d16_unorm_s8_uint.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.depth_stencil.d16_unorm_s8_uint_d16_unorm_s8_uint_separate_layouts.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.depth_stencil.d16_unorm_s8_uint_d16_unorm_s8_uint_separate_layouts.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.depth_stencil.d16_unorm_s8_uint_d16_unorm_s8_uint_separate_layouts.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.depth_stencil.d16_unorm_s8_uint_d16_unorm_s8_uint_separate_layouts.general_general_nearest
 dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.depth_stencil.3d_d24_unorm_s8_uint_d24_unorm_s8_uint.optimal_optimal_nearest
 dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.depth_stencil.3d_d24_unorm_s8_uint_d24_unorm_s8_uint.optimal_general_nearest
 dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.depth_stencil.3d_d24_unorm_s8_uint_d24_unorm_s8_uint.general_optimal_nearest
 dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.depth_stencil.3d_d24_unorm_s8_uint_d24_unorm_s8_uint.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.depth_stencil.d24_unorm_s8_uint_d24_unorm_s8_uint_separate_layouts.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.depth_stencil.d24_unorm_s8_uint_d24_unorm_s8_uint_separate_layouts.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.depth_stencil.d24_unorm_s8_uint_d24_unorm_s8_uint_separate_layouts.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.depth_stencil.d24_unorm_s8_uint_d24_unorm_s8_uint_separate_layouts.general_general_nearest
 dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.depth_stencil.3d_d32_sfloat_s8_uint_d32_sfloat_s8_uint.optimal_optimal_nearest
 dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.depth_stencil.3d_d32_sfloat_s8_uint_d32_sfloat_s8_uint.optimal_general_nearest
 dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.depth_stencil.3d_d32_sfloat_s8_uint_d32_sfloat_s8_uint.general_optimal_nearest
 dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.depth_stencil.3d_d32_sfloat_s8_uint_d32_sfloat_s8_uint.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.depth_stencil.d32_sfloat_s8_uint_d32_sfloat_s8_uint_separate_layouts.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.depth_stencil.d32_sfloat_s8_uint_d32_sfloat_s8_uint_separate_layouts.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.depth_stencil.d32_sfloat_s8_uint_d32_sfloat_s8_uint_separate_layouts.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.depth_stencil.d32_sfloat_s8_uint_d32_sfloat_s8_uint_separate_layouts.general_general_nearest
 dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8_uint.optimal_optimal_nearest
 dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8_uint.optimal_general_nearest
 dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8_uint.general_optimal_nearest
@@ -77122,14 +77146,26 @@ dEQP-VK.api.copy_and_blit.dedicated_allocation.image_to_image.all_formats.depth_
 dEQP-VK.api.copy_and_blit.dedicated_allocation.image_to_image.all_formats.depth_stencil.3d_d16_unorm_s8_uint_d16_unorm_s8_uint.optimal_general
 dEQP-VK.api.copy_and_blit.dedicated_allocation.image_to_image.all_formats.depth_stencil.3d_d16_unorm_s8_uint_d16_unorm_s8_uint.general_optimal
 dEQP-VK.api.copy_and_blit.dedicated_allocation.image_to_image.all_formats.depth_stencil.3d_d16_unorm_s8_uint_d16_unorm_s8_uint.general_general
+dEQP-VK.api.copy_and_blit.dedicated_allocation.image_to_image.all_formats.depth_stencil.d16_unorm_s8_uint_d16_unorm_s8_uint_separate_layouts.optimal_optimal
+dEQP-VK.api.copy_and_blit.dedicated_allocation.image_to_image.all_formats.depth_stencil.d16_unorm_s8_uint_d16_unorm_s8_uint_separate_layouts.optimal_general
+dEQP-VK.api.copy_and_blit.dedicated_allocation.image_to_image.all_formats.depth_stencil.d16_unorm_s8_uint_d16_unorm_s8_uint_separate_layouts.general_optimal
+dEQP-VK.api.copy_and_blit.dedicated_allocation.image_to_image.all_formats.depth_stencil.d16_unorm_s8_uint_d16_unorm_s8_uint_separate_layouts.general_general
 dEQP-VK.api.copy_and_blit.dedicated_allocation.image_to_image.all_formats.depth_stencil.3d_d24_unorm_s8_uint_d24_unorm_s8_uint.optimal_optimal
 dEQP-VK.api.copy_and_blit.dedicated_allocation.image_to_image.all_formats.depth_stencil.3d_d24_unorm_s8_uint_d24_unorm_s8_uint.optimal_general
 dEQP-VK.api.copy_and_blit.dedicated_allocation.image_to_image.all_formats.depth_stencil.3d_d24_unorm_s8_uint_d24_unorm_s8_uint.general_optimal
 dEQP-VK.api.copy_and_blit.dedicated_allocation.image_to_image.all_formats.depth_stencil.3d_d24_unorm_s8_uint_d24_unorm_s8_uint.general_general
+dEQP-VK.api.copy_and_blit.dedicated_allocation.image_to_image.all_formats.depth_stencil.d24_unorm_s8_uint_d24_unorm_s8_uint_separate_layouts.optimal_optimal
+dEQP-VK.api.copy_and_blit.dedicated_allocation.image_to_image.all_formats.depth_stencil.d24_unorm_s8_uint_d24_unorm_s8_uint_separate_layouts.optimal_general
+dEQP-VK.api.copy_and_blit.dedicated_allocation.image_to_image.all_formats.depth_stencil.d24_unorm_s8_uint_d24_unorm_s8_uint_separate_layouts.general_optimal
+dEQP-VK.api.copy_and_blit.dedicated_allocation.image_to_image.all_formats.depth_stencil.d24_unorm_s8_uint_d24_unorm_s8_uint_separate_layouts.general_general
 dEQP-VK.api.copy_and_blit.dedicated_allocation.image_to_image.all_formats.depth_stencil.3d_d32_sfloat_s8_uint_d32_sfloat_s8_uint.optimal_optimal
 dEQP-VK.api.copy_and_blit.dedicated_allocation.image_to_image.all_formats.depth_stencil.3d_d32_sfloat_s8_uint_d32_sfloat_s8_uint.optimal_general
 dEQP-VK.api.copy_and_blit.dedicated_allocation.image_to_image.all_formats.depth_stencil.3d_d32_sfloat_s8_uint_d32_sfloat_s8_uint.general_optimal
 dEQP-VK.api.copy_and_blit.dedicated_allocation.image_to_image.all_formats.depth_stencil.3d_d32_sfloat_s8_uint_d32_sfloat_s8_uint.general_general
+dEQP-VK.api.copy_and_blit.dedicated_allocation.image_to_image.all_formats.depth_stencil.d32_sfloat_s8_uint_d32_sfloat_s8_uint_separate_layouts.optimal_optimal
+dEQP-VK.api.copy_and_blit.dedicated_allocation.image_to_image.all_formats.depth_stencil.d32_sfloat_s8_uint_d32_sfloat_s8_uint_separate_layouts.optimal_general
+dEQP-VK.api.copy_and_blit.dedicated_allocation.image_to_image.all_formats.depth_stencil.d32_sfloat_s8_uint_d32_sfloat_s8_uint_separate_layouts.general_optimal
+dEQP-VK.api.copy_and_blit.dedicated_allocation.image_to_image.all_formats.depth_stencil.d32_sfloat_s8_uint_d32_sfloat_s8_uint_separate_layouts.general_general
 dEQP-VK.api.copy_and_blit.dedicated_allocation.image_to_image.3d_images.3d_to_2d_by_slices
 dEQP-VK.api.copy_and_blit.dedicated_allocation.image_to_image.3d_images.2d_to_3d_by_layers
 dEQP-VK.api.copy_and_blit.dedicated_allocation.image_to_image.3d_images.3d_to_2d_whole
@@ -82051,14 +82087,26 @@ dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.depth_sten
 dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.depth_stencil.3d_d16_unorm_s8_uint_d16_unorm_s8_uint.optimal_general_nearest
 dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.depth_stencil.3d_d16_unorm_s8_uint_d16_unorm_s8_uint.general_optimal_nearest
 dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.depth_stencil.3d_d16_unorm_s8_uint_d16_unorm_s8_uint.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.depth_stencil.d16_unorm_s8_uint_d16_unorm_s8_uint_separate_layouts.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.depth_stencil.d16_unorm_s8_uint_d16_unorm_s8_uint_separate_layouts.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.depth_stencil.d16_unorm_s8_uint_d16_unorm_s8_uint_separate_layouts.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.depth_stencil.d16_unorm_s8_uint_d16_unorm_s8_uint_separate_layouts.general_general_nearest
 dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.depth_stencil.3d_d24_unorm_s8_uint_d24_unorm_s8_uint.optimal_optimal_nearest
 dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.depth_stencil.3d_d24_unorm_s8_uint_d24_unorm_s8_uint.optimal_general_nearest
 dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.depth_stencil.3d_d24_unorm_s8_uint_d24_unorm_s8_uint.general_optimal_nearest
 dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.depth_stencil.3d_d24_unorm_s8_uint_d24_unorm_s8_uint.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.depth_stencil.d24_unorm_s8_uint_d24_unorm_s8_uint_separate_layouts.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.depth_stencil.d24_unorm_s8_uint_d24_unorm_s8_uint_separate_layouts.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.depth_stencil.d24_unorm_s8_uint_d24_unorm_s8_uint_separate_layouts.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.depth_stencil.d24_unorm_s8_uint_d24_unorm_s8_uint_separate_layouts.general_general_nearest
 dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.depth_stencil.3d_d32_sfloat_s8_uint_d32_sfloat_s8_uint.optimal_optimal_nearest
 dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.depth_stencil.3d_d32_sfloat_s8_uint_d32_sfloat_s8_uint.optimal_general_nearest
 dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.depth_stencil.3d_d32_sfloat_s8_uint_d32_sfloat_s8_uint.general_optimal_nearest
 dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.depth_stencil.3d_d32_sfloat_s8_uint_d32_sfloat_s8_uint.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.depth_stencil.d32_sfloat_s8_uint_d32_sfloat_s8_uint_separate_layouts.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.depth_stencil.d32_sfloat_s8_uint_d32_sfloat_s8_uint_separate_layouts.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.depth_stencil.d32_sfloat_s8_uint_d32_sfloat_s8_uint_separate_layouts.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.depth_stencil.d32_sfloat_s8_uint_d32_sfloat_s8_uint_separate_layouts.general_general_nearest
 dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8_uint.optimal_optimal_nearest
 dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8_uint.optimal_general_nearest
 dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8_uint.general_optimal_nearest
@@ -93216,141 +93264,261 @@ dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.single_layer.x8_d24_un
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.single_layer.d32_sfloat
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.single_layer.s8_uint
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.single_layer.d16_unorm_s8_uint
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.single_layer.d16_unorm_s8_uint_separate_layouts_depth
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.single_layer.d16_unorm_s8_uint_separate_layouts_stencil
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.single_layer.d24_unorm_s8_uint
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.single_layer.d24_unorm_s8_uint_separate_layouts_depth
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.single_layer.d24_unorm_s8_uint_separate_layouts_stencil
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.single_layer.d32_sfloat_s8_uint
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.single_layer.d32_sfloat_s8_uint_separate_layouts_depth
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.single_layer.d32_sfloat_s8_uint_separate_layouts_stencil
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.single_layer.d16_unorm_200x180
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.single_layer.x8_d24_unorm_pack32_200x180
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.single_layer.d32_sfloat_200x180
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.single_layer.s8_uint_200x180
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.single_layer.d16_unorm_s8_uint_200x180
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.single_layer.d16_unorm_s8_uint_separate_layouts_depth_200x180
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.single_layer.d16_unorm_s8_uint_separate_layouts_stencil_200x180
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.single_layer.d24_unorm_s8_uint_200x180
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.single_layer.d24_unorm_s8_uint_separate_layouts_depth_200x180
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.single_layer.d24_unorm_s8_uint_separate_layouts_stencil_200x180
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.single_layer.d32_sfloat_s8_uint_200x180
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.single_layer.d32_sfloat_s8_uint_separate_layouts_depth_200x180
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.single_layer.d32_sfloat_s8_uint_separate_layouts_stencil_200x180
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.single_layer.d16_unorm_1x33
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.single_layer.x8_d24_unorm_pack32_1x33
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.single_layer.d32_sfloat_1x33
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.single_layer.s8_uint_1x33
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.single_layer.d16_unorm_s8_uint_1x33
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.single_layer.d16_unorm_s8_uint_separate_layouts_depth_1x33
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.single_layer.d16_unorm_s8_uint_separate_layouts_stencil_1x33
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.single_layer.d24_unorm_s8_uint_1x33
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.single_layer.d24_unorm_s8_uint_separate_layouts_depth_1x33
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.single_layer.d24_unorm_s8_uint_separate_layouts_stencil_1x33
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.single_layer.d32_sfloat_s8_uint_1x33
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.single_layer.d32_sfloat_s8_uint_separate_layouts_depth_1x33
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.single_layer.d32_sfloat_s8_uint_separate_layouts_stencil_1x33
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.single_layer.d16_unorm_64x11
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.single_layer.x8_d24_unorm_pack32_64x11
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.single_layer.d32_sfloat_64x11
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.single_layer.s8_uint_64x11
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.single_layer.d16_unorm_s8_uint_64x11
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.single_layer.d16_unorm_s8_uint_separate_layouts_depth_64x11
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.single_layer.d16_unorm_s8_uint_separate_layouts_stencil_64x11
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.single_layer.d24_unorm_s8_uint_64x11
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.single_layer.d24_unorm_s8_uint_separate_layouts_depth_64x11
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.single_layer.d24_unorm_s8_uint_separate_layouts_stencil_64x11
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.single_layer.d32_sfloat_s8_uint_64x11
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.single_layer.d32_sfloat_s8_uint_separate_layouts_depth_64x11
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.single_layer.d32_sfloat_s8_uint_separate_layouts_stencil_64x11
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.single_layer.d16_unorm_33x128
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.single_layer.x8_d24_unorm_pack32_33x128
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.single_layer.d32_sfloat_33x128
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.single_layer.s8_uint_33x128
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.single_layer.d16_unorm_s8_uint_33x128
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.single_layer.d16_unorm_s8_uint_separate_layouts_depth_33x128
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.single_layer.d16_unorm_s8_uint_separate_layouts_stencil_33x128
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.single_layer.d24_unorm_s8_uint_33x128
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.single_layer.d24_unorm_s8_uint_separate_layouts_depth_33x128
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.single_layer.d24_unorm_s8_uint_separate_layouts_stencil_33x128
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.single_layer.d32_sfloat_s8_uint_33x128
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.single_layer.d32_sfloat_s8_uint_separate_layouts_depth_33x128
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.single_layer.d32_sfloat_s8_uint_separate_layouts_stencil_33x128
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.multiple_layers.d16_unorm
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.multiple_layers.x8_d24_unorm_pack32
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.multiple_layers.d32_sfloat
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.multiple_layers.s8_uint
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.multiple_layers.d16_unorm_s8_uint
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.multiple_layers.d16_unorm_s8_uint_separate_layouts_depth
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.multiple_layers.d16_unorm_s8_uint_separate_layouts_stencil
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.multiple_layers.d24_unorm_s8_uint
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.multiple_layers.d24_unorm_s8_uint_separate_layouts_depth
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.multiple_layers.d24_unorm_s8_uint_separate_layouts_stencil
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.multiple_layers.d32_sfloat_s8_uint
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.multiple_layers.d32_sfloat_s8_uint_separate_layouts_depth
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.multiple_layers.d32_sfloat_s8_uint_separate_layouts_stencil
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.multiple_layers.d16_unorm_200x180
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.multiple_layers.x8_d24_unorm_pack32_200x180
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.multiple_layers.d32_sfloat_200x180
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.multiple_layers.s8_uint_200x180
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.multiple_layers.d16_unorm_s8_uint_200x180
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.multiple_layers.d16_unorm_s8_uint_separate_layouts_depth_200x180
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.multiple_layers.d16_unorm_s8_uint_separate_layouts_stencil_200x180
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.multiple_layers.d24_unorm_s8_uint_200x180
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.multiple_layers.d24_unorm_s8_uint_separate_layouts_depth_200x180
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.multiple_layers.d24_unorm_s8_uint_separate_layouts_stencil_200x180
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.multiple_layers.d32_sfloat_s8_uint_200x180
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.multiple_layers.d32_sfloat_s8_uint_separate_layouts_depth_200x180
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.multiple_layers.d32_sfloat_s8_uint_separate_layouts_stencil_200x180
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.multiple_layers.d16_unorm_1x33
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.multiple_layers.x8_d24_unorm_pack32_1x33
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.multiple_layers.d32_sfloat_1x33
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.multiple_layers.s8_uint_1x33
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.multiple_layers.d16_unorm_s8_uint_1x33
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.multiple_layers.d16_unorm_s8_uint_separate_layouts_depth_1x33
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.multiple_layers.d16_unorm_s8_uint_separate_layouts_stencil_1x33
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.multiple_layers.d24_unorm_s8_uint_1x33
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.multiple_layers.d24_unorm_s8_uint_separate_layouts_depth_1x33
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.multiple_layers.d24_unorm_s8_uint_separate_layouts_stencil_1x33
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.multiple_layers.d32_sfloat_s8_uint_1x33
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.multiple_layers.d32_sfloat_s8_uint_separate_layouts_depth_1x33
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.multiple_layers.d32_sfloat_s8_uint_separate_layouts_stencil_1x33
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.multiple_layers.d16_unorm_64x11
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.multiple_layers.x8_d24_unorm_pack32_64x11
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.multiple_layers.d32_sfloat_64x11
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.multiple_layers.s8_uint_64x11
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.multiple_layers.d16_unorm_s8_uint_64x11
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.multiple_layers.d16_unorm_s8_uint_separate_layouts_depth_64x11
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.multiple_layers.d16_unorm_s8_uint_separate_layouts_stencil_64x11
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.multiple_layers.d24_unorm_s8_uint_64x11
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.multiple_layers.d24_unorm_s8_uint_separate_layouts_depth_64x11
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.multiple_layers.d24_unorm_s8_uint_separate_layouts_stencil_64x11
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.multiple_layers.d32_sfloat_s8_uint_64x11
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.multiple_layers.d32_sfloat_s8_uint_separate_layouts_depth_64x11
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.multiple_layers.d32_sfloat_s8_uint_separate_layouts_stencil_64x11
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.multiple_layers.d16_unorm_33x128
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.multiple_layers.x8_d24_unorm_pack32_33x128
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.multiple_layers.d32_sfloat_33x128
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.multiple_layers.s8_uint_33x128
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.multiple_layers.d16_unorm_s8_uint_33x128
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.multiple_layers.d16_unorm_s8_uint_separate_layouts_depth_33x128
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.multiple_layers.d16_unorm_s8_uint_separate_layouts_stencil_33x128
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.multiple_layers.d24_unorm_s8_uint_33x128
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.multiple_layers.d24_unorm_s8_uint_separate_layouts_depth_33x128
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.multiple_layers.d24_unorm_s8_uint_separate_layouts_stencil_33x128
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.multiple_layers.d32_sfloat_s8_uint_33x128
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.multiple_layers.d32_sfloat_s8_uint_separate_layouts_depth_33x128
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.multiple_layers.d32_sfloat_s8_uint_separate_layouts_stencil_33x128
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers.d16_unorm
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers.x8_d24_unorm_pack32
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers.d32_sfloat
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers.s8_uint
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers.d16_unorm_s8_uint
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers.d16_unorm_s8_uint_separate_layouts_depth
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers.d16_unorm_s8_uint_separate_layouts_stencil
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers.d24_unorm_s8_uint
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers.d24_unorm_s8_uint_separate_layouts_depth
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers.d24_unorm_s8_uint_separate_layouts_stencil
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers.d32_sfloat_s8_uint
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers.d32_sfloat_s8_uint_separate_layouts_depth
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers.d32_sfloat_s8_uint_separate_layouts_stencil
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers.d16_unorm_200x180
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers.x8_d24_unorm_pack32_200x180
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers.d32_sfloat_200x180
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers.s8_uint_200x180
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers.d16_unorm_s8_uint_200x180
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers.d16_unorm_s8_uint_separate_layouts_depth_200x180
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers.d16_unorm_s8_uint_separate_layouts_stencil_200x180
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers.d24_unorm_s8_uint_200x180
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers.d24_unorm_s8_uint_separate_layouts_depth_200x180
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers.d24_unorm_s8_uint_separate_layouts_stencil_200x180
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers.d32_sfloat_s8_uint_200x180
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers.d32_sfloat_s8_uint_separate_layouts_depth_200x180
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers.d32_sfloat_s8_uint_separate_layouts_stencil_200x180
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers.d16_unorm_1x33
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers.x8_d24_unorm_pack32_1x33
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers.d32_sfloat_1x33
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers.s8_uint_1x33
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers.d16_unorm_s8_uint_1x33
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers.d16_unorm_s8_uint_separate_layouts_depth_1x33
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers.d16_unorm_s8_uint_separate_layouts_stencil_1x33
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers.d24_unorm_s8_uint_1x33
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers.d24_unorm_s8_uint_separate_layouts_depth_1x33
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers.d24_unorm_s8_uint_separate_layouts_stencil_1x33
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers.d32_sfloat_s8_uint_1x33
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers.d32_sfloat_s8_uint_separate_layouts_depth_1x33
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers.d32_sfloat_s8_uint_separate_layouts_stencil_1x33
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers.d16_unorm_64x11
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers.x8_d24_unorm_pack32_64x11
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers.d32_sfloat_64x11
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers.s8_uint_64x11
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers.d16_unorm_s8_uint_64x11
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers.d16_unorm_s8_uint_separate_layouts_depth_64x11
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers.d16_unorm_s8_uint_separate_layouts_stencil_64x11
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers.d24_unorm_s8_uint_64x11
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers.d24_unorm_s8_uint_separate_layouts_depth_64x11
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers.d24_unorm_s8_uint_separate_layouts_stencil_64x11
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers.d32_sfloat_s8_uint_64x11
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers.d32_sfloat_s8_uint_separate_layouts_depth_64x11
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers.d32_sfloat_s8_uint_separate_layouts_stencil_64x11
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers.d16_unorm_33x128
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers.x8_d24_unorm_pack32_33x128
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers.d32_sfloat_33x128
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers.s8_uint_33x128
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers.d16_unorm_s8_uint_33x128
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers.d16_unorm_s8_uint_separate_layouts_depth_33x128
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers.d16_unorm_s8_uint_separate_layouts_stencil_33x128
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers.d24_unorm_s8_uint_33x128
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers.d24_unorm_s8_uint_separate_layouts_depth_33x128
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers.d24_unorm_s8_uint_separate_layouts_stencil_33x128
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers.d32_sfloat_s8_uint_33x128
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers.d32_sfloat_s8_uint_separate_layouts_depth_33x128
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers.d32_sfloat_s8_uint_separate_layouts_stencil_33x128
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers_twostep.d16_unorm
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers_twostep.x8_d24_unorm_pack32
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers_twostep.d32_sfloat
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers_twostep.s8_uint
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers_twostep.d16_unorm_s8_uint
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers_twostep.d16_unorm_s8_uint_separate_layouts_depth
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers_twostep.d16_unorm_s8_uint_separate_layouts_stencil
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers_twostep.d24_unorm_s8_uint
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers_twostep.d24_unorm_s8_uint_separate_layouts_depth
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers_twostep.d24_unorm_s8_uint_separate_layouts_stencil
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers_twostep.d32_sfloat_s8_uint
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers_twostep.d32_sfloat_s8_uint_separate_layouts_depth
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers_twostep.d32_sfloat_s8_uint_separate_layouts_stencil
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers_twostep.d16_unorm_200x180
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers_twostep.x8_d24_unorm_pack32_200x180
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers_twostep.d32_sfloat_200x180
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers_twostep.s8_uint_200x180
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers_twostep.d16_unorm_s8_uint_200x180
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers_twostep.d16_unorm_s8_uint_separate_layouts_depth_200x180
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers_twostep.d16_unorm_s8_uint_separate_layouts_stencil_200x180
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers_twostep.d24_unorm_s8_uint_200x180
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers_twostep.d24_unorm_s8_uint_separate_layouts_depth_200x180
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers_twostep.d24_unorm_s8_uint_separate_layouts_stencil_200x180
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers_twostep.d32_sfloat_s8_uint_200x180
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers_twostep.d32_sfloat_s8_uint_separate_layouts_depth_200x180
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers_twostep.d32_sfloat_s8_uint_separate_layouts_stencil_200x180
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers_twostep.d16_unorm_1x33
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers_twostep.x8_d24_unorm_pack32_1x33
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers_twostep.d32_sfloat_1x33
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers_twostep.s8_uint_1x33
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers_twostep.d16_unorm_s8_uint_1x33
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers_twostep.d16_unorm_s8_uint_separate_layouts_depth_1x33
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers_twostep.d16_unorm_s8_uint_separate_layouts_stencil_1x33
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers_twostep.d24_unorm_s8_uint_1x33
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers_twostep.d24_unorm_s8_uint_separate_layouts_depth_1x33
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers_twostep.d24_unorm_s8_uint_separate_layouts_stencil_1x33
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers_twostep.d32_sfloat_s8_uint_1x33
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers_twostep.d32_sfloat_s8_uint_separate_layouts_depth_1x33
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers_twostep.d32_sfloat_s8_uint_separate_layouts_stencil_1x33
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers_twostep.d16_unorm_64x11
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers_twostep.x8_d24_unorm_pack32_64x11
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers_twostep.d32_sfloat_64x11
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers_twostep.s8_uint_64x11
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers_twostep.d16_unorm_s8_uint_64x11
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers_twostep.d16_unorm_s8_uint_separate_layouts_depth_64x11
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers_twostep.d16_unorm_s8_uint_separate_layouts_stencil_64x11
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers_twostep.d24_unorm_s8_uint_64x11
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers_twostep.d24_unorm_s8_uint_separate_layouts_depth_64x11
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers_twostep.d24_unorm_s8_uint_separate_layouts_stencil_64x11
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers_twostep.d32_sfloat_s8_uint_64x11
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers_twostep.d32_sfloat_s8_uint_separate_layouts_depth_64x11
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers_twostep.d32_sfloat_s8_uint_separate_layouts_stencil_64x11
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers_twostep.d16_unorm_33x128
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers_twostep.x8_d24_unorm_pack32_33x128
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers_twostep.d32_sfloat_33x128
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers_twostep.s8_uint_33x128
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers_twostep.d16_unorm_s8_uint_33x128
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers_twostep.d16_unorm_s8_uint_separate_layouts_depth_33x128
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers_twostep.d16_unorm_s8_uint_separate_layouts_stencil_33x128
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers_twostep.d24_unorm_s8_uint_33x128
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers_twostep.d24_unorm_s8_uint_separate_layouts_depth_33x128
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers_twostep.d24_unorm_s8_uint_separate_layouts_stencil_33x128
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers_twostep.d32_sfloat_s8_uint_33x128
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers_twostep.d32_sfloat_s8_uint_separate_layouts_depth_33x128
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers_twostep.d32_sfloat_s8_uint_separate_layouts_stencil_33x128
 dEQP-VK.api.image_clearing.core.clear_color_attachment.single_layer.r4g4_unorm_pack8
 dEQP-VK.api.image_clearing.core.clear_color_attachment.single_layer.r4g4b4a4_unorm_pack16
 dEQP-VK.api.image_clearing.core.clear_color_attachment.single_layer.b4g4r4a4_unorm_pack16
@@ -95576,141 +95744,261 @@ dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.single_layer.x8_d
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.single_layer.d32_sfloat
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.single_layer.s8_uint
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.single_layer.d16_unorm_s8_uint
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.single_layer.d16_unorm_s8_uint_separate_layouts_depth
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.single_layer.d16_unorm_s8_uint_separate_layouts_stencil
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.single_layer.d24_unorm_s8_uint
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.single_layer.d24_unorm_s8_uint_separate_layouts_depth
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.single_layer.d24_unorm_s8_uint_separate_layouts_stencil
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.single_layer.d32_sfloat_s8_uint
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.single_layer.d32_sfloat_s8_uint_separate_layouts_depth
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.single_layer.d32_sfloat_s8_uint_separate_layouts_stencil
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.single_layer.d16_unorm_200x180
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.single_layer.x8_d24_unorm_pack32_200x180
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.single_layer.d32_sfloat_200x180
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.single_layer.s8_uint_200x180
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.single_layer.d16_unorm_s8_uint_200x180
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.single_layer.d16_unorm_s8_uint_separate_layouts_depth_200x180
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.single_layer.d16_unorm_s8_uint_separate_layouts_stencil_200x180
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.single_layer.d24_unorm_s8_uint_200x180
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.single_layer.d24_unorm_s8_uint_separate_layouts_depth_200x180
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.single_layer.d24_unorm_s8_uint_separate_layouts_stencil_200x180
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.single_layer.d32_sfloat_s8_uint_200x180
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.single_layer.d32_sfloat_s8_uint_separate_layouts_depth_200x180
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.single_layer.d32_sfloat_s8_uint_separate_layouts_stencil_200x180
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.single_layer.d16_unorm_1x33
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.single_layer.x8_d24_unorm_pack32_1x33
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.single_layer.d32_sfloat_1x33
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.single_layer.s8_uint_1x33
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.single_layer.d16_unorm_s8_uint_1x33
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.single_layer.d16_unorm_s8_uint_separate_layouts_depth_1x33
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.single_layer.d16_unorm_s8_uint_separate_layouts_stencil_1x33
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.single_layer.d24_unorm_s8_uint_1x33
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.single_layer.d24_unorm_s8_uint_separate_layouts_depth_1x33
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.single_layer.d24_unorm_s8_uint_separate_layouts_stencil_1x33
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.single_layer.d32_sfloat_s8_uint_1x33
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.single_layer.d32_sfloat_s8_uint_separate_layouts_depth_1x33
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.single_layer.d32_sfloat_s8_uint_separate_layouts_stencil_1x33
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.single_layer.d16_unorm_64x11
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.single_layer.x8_d24_unorm_pack32_64x11
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.single_layer.d32_sfloat_64x11
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.single_layer.s8_uint_64x11
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.single_layer.d16_unorm_s8_uint_64x11
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.single_layer.d16_unorm_s8_uint_separate_layouts_depth_64x11
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.single_layer.d16_unorm_s8_uint_separate_layouts_stencil_64x11
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.single_layer.d24_unorm_s8_uint_64x11
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.single_layer.d24_unorm_s8_uint_separate_layouts_depth_64x11
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.single_layer.d24_unorm_s8_uint_separate_layouts_stencil_64x11
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.single_layer.d32_sfloat_s8_uint_64x11
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.single_layer.d32_sfloat_s8_uint_separate_layouts_depth_64x11
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.single_layer.d32_sfloat_s8_uint_separate_layouts_stencil_64x11
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.single_layer.d16_unorm_33x128
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.single_layer.x8_d24_unorm_pack32_33x128
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.single_layer.d32_sfloat_33x128
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.single_layer.s8_uint_33x128
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.single_layer.d16_unorm_s8_uint_33x128
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.single_layer.d16_unorm_s8_uint_separate_layouts_depth_33x128
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.single_layer.d16_unorm_s8_uint_separate_layouts_stencil_33x128
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.single_layer.d24_unorm_s8_uint_33x128
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.single_layer.d24_unorm_s8_uint_separate_layouts_depth_33x128
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.single_layer.d24_unorm_s8_uint_separate_layouts_stencil_33x128
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.single_layer.d32_sfloat_s8_uint_33x128
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.single_layer.d32_sfloat_s8_uint_separate_layouts_depth_33x128
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.single_layer.d32_sfloat_s8_uint_separate_layouts_stencil_33x128
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.multiple_layers.d16_unorm
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.multiple_layers.x8_d24_unorm_pack32
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.multiple_layers.d32_sfloat
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.multiple_layers.s8_uint
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.multiple_layers.d16_unorm_s8_uint
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.multiple_layers.d16_unorm_s8_uint_separate_layouts_depth
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.multiple_layers.d16_unorm_s8_uint_separate_layouts_stencil
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.multiple_layers.d24_unorm_s8_uint
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.multiple_layers.d24_unorm_s8_uint_separate_layouts_depth
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.multiple_layers.d24_unorm_s8_uint_separate_layouts_stencil
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.multiple_layers.d32_sfloat_s8_uint
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.multiple_layers.d32_sfloat_s8_uint_separate_layouts_depth
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.multiple_layers.d32_sfloat_s8_uint_separate_layouts_stencil
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.multiple_layers.d16_unorm_200x180
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.multiple_layers.x8_d24_unorm_pack32_200x180
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.multiple_layers.d32_sfloat_200x180
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.multiple_layers.s8_uint_200x180
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.multiple_layers.d16_unorm_s8_uint_200x180
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.multiple_layers.d16_unorm_s8_uint_separate_layouts_depth_200x180
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.multiple_layers.d16_unorm_s8_uint_separate_layouts_stencil_200x180
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.multiple_layers.d24_unorm_s8_uint_200x180
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.multiple_layers.d24_unorm_s8_uint_separate_layouts_depth_200x180
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.multiple_layers.d24_unorm_s8_uint_separate_layouts_stencil_200x180
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.multiple_layers.d32_sfloat_s8_uint_200x180
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.multiple_layers.d32_sfloat_s8_uint_separate_layouts_depth_200x180
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.multiple_layers.d32_sfloat_s8_uint_separate_layouts_stencil_200x180
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.multiple_layers.d16_unorm_1x33
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.multiple_layers.x8_d24_unorm_pack32_1x33
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.multiple_layers.d32_sfloat_1x33
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.multiple_layers.s8_uint_1x33
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.multiple_layers.d16_unorm_s8_uint_1x33
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.multiple_layers.d16_unorm_s8_uint_separate_layouts_depth_1x33
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.multiple_layers.d16_unorm_s8_uint_separate_layouts_stencil_1x33
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.multiple_layers.d24_unorm_s8_uint_1x33
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.multiple_layers.d24_unorm_s8_uint_separate_layouts_depth_1x33
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.multiple_layers.d24_unorm_s8_uint_separate_layouts_stencil_1x33
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.multiple_layers.d32_sfloat_s8_uint_1x33
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.multiple_layers.d32_sfloat_s8_uint_separate_layouts_depth_1x33
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.multiple_layers.d32_sfloat_s8_uint_separate_layouts_stencil_1x33
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.multiple_layers.d16_unorm_64x11
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.multiple_layers.x8_d24_unorm_pack32_64x11
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.multiple_layers.d32_sfloat_64x11
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.multiple_layers.s8_uint_64x11
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.multiple_layers.d16_unorm_s8_uint_64x11
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.multiple_layers.d16_unorm_s8_uint_separate_layouts_depth_64x11
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.multiple_layers.d16_unorm_s8_uint_separate_layouts_stencil_64x11
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.multiple_layers.d24_unorm_s8_uint_64x11
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.multiple_layers.d24_unorm_s8_uint_separate_layouts_depth_64x11
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.multiple_layers.d24_unorm_s8_uint_separate_layouts_stencil_64x11
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.multiple_layers.d32_sfloat_s8_uint_64x11
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.multiple_layers.d32_sfloat_s8_uint_separate_layouts_depth_64x11
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.multiple_layers.d32_sfloat_s8_uint_separate_layouts_stencil_64x11
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.multiple_layers.d16_unorm_33x128
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.multiple_layers.x8_d24_unorm_pack32_33x128
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.multiple_layers.d32_sfloat_33x128
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.multiple_layers.s8_uint_33x128
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.multiple_layers.d16_unorm_s8_uint_33x128
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.multiple_layers.d16_unorm_s8_uint_separate_layouts_depth_33x128
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.multiple_layers.d16_unorm_s8_uint_separate_layouts_stencil_33x128
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.multiple_layers.d24_unorm_s8_uint_33x128
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.multiple_layers.d24_unorm_s8_uint_separate_layouts_depth_33x128
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.multiple_layers.d24_unorm_s8_uint_separate_layouts_stencil_33x128
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.multiple_layers.d32_sfloat_s8_uint_33x128
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.multiple_layers.d32_sfloat_s8_uint_separate_layouts_depth_33x128
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.multiple_layers.d32_sfloat_s8_uint_separate_layouts_stencil_33x128
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.cube_layers.d16_unorm
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.cube_layers.x8_d24_unorm_pack32
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.cube_layers.d32_sfloat
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.cube_layers.s8_uint
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.cube_layers.d16_unorm_s8_uint
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.cube_layers.d16_unorm_s8_uint_separate_layouts_depth
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.cube_layers.d16_unorm_s8_uint_separate_layouts_stencil
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.cube_layers.d24_unorm_s8_uint
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.cube_layers.d24_unorm_s8_uint_separate_layouts_depth
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.cube_layers.d24_unorm_s8_uint_separate_layouts_stencil
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.cube_layers.d32_sfloat_s8_uint
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.cube_layers.d32_sfloat_s8_uint_separate_layouts_depth
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.cube_layers.d32_sfloat_s8_uint_separate_layouts_stencil
 dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.single_layer.d16_unorm
 dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.single_layer.x8_d24_unorm_pack32
 dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.single_layer.d32_sfloat
 dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.single_layer.s8_uint
 dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.single_layer.d16_unorm_s8_uint
+dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.single_layer.d16_unorm_s8_uint_separate_layouts_depth
+dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.single_layer.d16_unorm_s8_uint_separate_layouts_stencil
 dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.single_layer.d24_unorm_s8_uint
+dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.single_layer.d24_unorm_s8_uint_separate_layouts_depth
+dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.single_layer.d24_unorm_s8_uint_separate_layouts_stencil
 dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.single_layer.d32_sfloat_s8_uint
+dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.single_layer.d32_sfloat_s8_uint_separate_layouts_depth
+dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.single_layer.d32_sfloat_s8_uint_separate_layouts_stencil
 dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.single_layer.d16_unorm_200x180
 dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.single_layer.x8_d24_unorm_pack32_200x180
 dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.single_layer.d32_sfloat_200x180
 dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.single_layer.s8_uint_200x180
 dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.single_layer.d16_unorm_s8_uint_200x180
+dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.single_layer.d16_unorm_s8_uint_separate_layouts_depth_200x180
+dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.single_layer.d16_unorm_s8_uint_separate_layouts_stencil_200x180
 dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.single_layer.d24_unorm_s8_uint_200x180
+dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.single_layer.d24_unorm_s8_uint_separate_layouts_depth_200x180
+dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.single_layer.d24_unorm_s8_uint_separate_layouts_stencil_200x180
 dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.single_layer.d32_sfloat_s8_uint_200x180
+dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.single_layer.d32_sfloat_s8_uint_separate_layouts_depth_200x180
+dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.single_layer.d32_sfloat_s8_uint_separate_layouts_stencil_200x180
 dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.single_layer.d16_unorm_64x11
 dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.single_layer.x8_d24_unorm_pack32_64x11
 dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.single_layer.d32_sfloat_64x11
 dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.single_layer.s8_uint_64x11
 dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.single_layer.d16_unorm_s8_uint_64x11
+dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.single_layer.d16_unorm_s8_uint_separate_layouts_depth_64x11
+dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.single_layer.d16_unorm_s8_uint_separate_layouts_stencil_64x11
 dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.single_layer.d24_unorm_s8_uint_64x11
+dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.single_layer.d24_unorm_s8_uint_separate_layouts_depth_64x11
+dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.single_layer.d24_unorm_s8_uint_separate_layouts_stencil_64x11
 dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.single_layer.d32_sfloat_s8_uint_64x11
+dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.single_layer.d32_sfloat_s8_uint_separate_layouts_depth_64x11
+dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.single_layer.d32_sfloat_s8_uint_separate_layouts_stencil_64x11
 dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.single_layer.d16_unorm_33x128
 dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.single_layer.x8_d24_unorm_pack32_33x128
 dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.single_layer.d32_sfloat_33x128
 dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.single_layer.s8_uint_33x128
 dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.single_layer.d16_unorm_s8_uint_33x128
+dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.single_layer.d16_unorm_s8_uint_separate_layouts_depth_33x128
+dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.single_layer.d16_unorm_s8_uint_separate_layouts_stencil_33x128
 dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.single_layer.d24_unorm_s8_uint_33x128
+dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.single_layer.d24_unorm_s8_uint_separate_layouts_depth_33x128
+dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.single_layer.d24_unorm_s8_uint_separate_layouts_stencil_33x128
 dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.single_layer.d32_sfloat_s8_uint_33x128
+dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.single_layer.d32_sfloat_s8_uint_separate_layouts_depth_33x128
+dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.single_layer.d32_sfloat_s8_uint_separate_layouts_stencil_33x128
 dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.multiple_layers.d16_unorm
 dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.multiple_layers.x8_d24_unorm_pack32
 dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.multiple_layers.d32_sfloat
 dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.multiple_layers.s8_uint
 dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.multiple_layers.d16_unorm_s8_uint
+dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.multiple_layers.d16_unorm_s8_uint_separate_layouts_depth
+dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.multiple_layers.d16_unorm_s8_uint_separate_layouts_stencil
 dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.multiple_layers.d24_unorm_s8_uint
+dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.multiple_layers.d24_unorm_s8_uint_separate_layouts_depth
+dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.multiple_layers.d24_unorm_s8_uint_separate_layouts_stencil
 dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.multiple_layers.d32_sfloat_s8_uint
+dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.multiple_layers.d32_sfloat_s8_uint_separate_layouts_depth
+dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.multiple_layers.d32_sfloat_s8_uint_separate_layouts_stencil
 dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.multiple_layers.d16_unorm_200x180
 dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.multiple_layers.x8_d24_unorm_pack32_200x180
 dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.multiple_layers.d32_sfloat_200x180
 dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.multiple_layers.s8_uint_200x180
 dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.multiple_layers.d16_unorm_s8_uint_200x180
+dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.multiple_layers.d16_unorm_s8_uint_separate_layouts_depth_200x180
+dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.multiple_layers.d16_unorm_s8_uint_separate_layouts_stencil_200x180
 dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.multiple_layers.d24_unorm_s8_uint_200x180
+dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.multiple_layers.d24_unorm_s8_uint_separate_layouts_depth_200x180
+dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.multiple_layers.d24_unorm_s8_uint_separate_layouts_stencil_200x180
 dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.multiple_layers.d32_sfloat_s8_uint_200x180
+dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.multiple_layers.d32_sfloat_s8_uint_separate_layouts_depth_200x180
+dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.multiple_layers.d32_sfloat_s8_uint_separate_layouts_stencil_200x180
 dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.multiple_layers.d16_unorm_64x11
 dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.multiple_layers.x8_d24_unorm_pack32_64x11
 dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.multiple_layers.d32_sfloat_64x11
 dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.multiple_layers.s8_uint_64x11
 dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.multiple_layers.d16_unorm_s8_uint_64x11
+dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.multiple_layers.d16_unorm_s8_uint_separate_layouts_depth_64x11
+dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.multiple_layers.d16_unorm_s8_uint_separate_layouts_stencil_64x11
 dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.multiple_layers.d24_unorm_s8_uint_64x11
+dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.multiple_layers.d24_unorm_s8_uint_separate_layouts_depth_64x11
+dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.multiple_layers.d24_unorm_s8_uint_separate_layouts_stencil_64x11
 dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.multiple_layers.d32_sfloat_s8_uint_64x11
+dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.multiple_layers.d32_sfloat_s8_uint_separate_layouts_depth_64x11
+dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.multiple_layers.d32_sfloat_s8_uint_separate_layouts_stencil_64x11
 dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.multiple_layers.d16_unorm_33x128
 dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.multiple_layers.x8_d24_unorm_pack32_33x128
 dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.multiple_layers.d32_sfloat_33x128
 dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.multiple_layers.s8_uint_33x128
 dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.multiple_layers.d16_unorm_s8_uint_33x128
+dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.multiple_layers.d16_unorm_s8_uint_separate_layouts_depth_33x128
+dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.multiple_layers.d16_unorm_s8_uint_separate_layouts_stencil_33x128
 dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.multiple_layers.d24_unorm_s8_uint_33x128
+dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.multiple_layers.d24_unorm_s8_uint_separate_layouts_depth_33x128
+dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.multiple_layers.d24_unorm_s8_uint_separate_layouts_stencil_33x128
 dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.multiple_layers.d32_sfloat_s8_uint_33x128
+dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.multiple_layers.d32_sfloat_s8_uint_separate_layouts_depth_33x128
+dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.multiple_layers.d32_sfloat_s8_uint_separate_layouts_stencil_33x128
 dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.cube_layers.d16_unorm
 dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.cube_layers.x8_d24_unorm_pack32
 dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.cube_layers.d32_sfloat
 dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.cube_layers.s8_uint
 dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.cube_layers.d16_unorm_s8_uint
+dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.cube_layers.d16_unorm_s8_uint_separate_layouts_depth
+dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.cube_layers.d16_unorm_s8_uint_separate_layouts_stencil
 dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.cube_layers.d24_unorm_s8_uint
+dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.cube_layers.d24_unorm_s8_uint_separate_layouts_depth
+dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.cube_layers.d24_unorm_s8_uint_separate_layouts_stencil
 dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.cube_layers.d32_sfloat_s8_uint
+dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.cube_layers.d32_sfloat_s8_uint_separate_layouts_depth
+dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.cube_layers.d32_sfloat_s8_uint_separate_layouts_stencil
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_color_image.1d.optimal.single_layer.r4g4_unorm_pack8
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_color_image.1d.optimal.single_layer.r4g4b4a4_unorm_pack16
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_color_image.1d.optimal.single_layer.b4g4r4a4_unorm_pack16
@@ -103708,141 +103996,261 @@ dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.single
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.single_layer.d32_sfloat
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.single_layer.s8_uint
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.single_layer.d16_unorm_s8_uint
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.single_layer.d16_unorm_s8_uint_separate_layouts_depth
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.single_layer.d16_unorm_s8_uint_separate_layouts_stencil
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.single_layer.d24_unorm_s8_uint
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.single_layer.d24_unorm_s8_uint_separate_layouts_depth
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.single_layer.d24_unorm_s8_uint_separate_layouts_stencil
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.single_layer.d32_sfloat_s8_uint
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.single_layer.d32_sfloat_s8_uint_separate_layouts_depth
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.single_layer.d32_sfloat_s8_uint_separate_layouts_stencil
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.single_layer.d16_unorm_200x180
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.single_layer.x8_d24_unorm_pack32_200x180
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.single_layer.d32_sfloat_200x180
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.single_layer.s8_uint_200x180
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.single_layer.d16_unorm_s8_uint_200x180
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.single_layer.d16_unorm_s8_uint_separate_layouts_depth_200x180
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.single_layer.d16_unorm_s8_uint_separate_layouts_stencil_200x180
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.single_layer.d24_unorm_s8_uint_200x180
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.single_layer.d24_unorm_s8_uint_separate_layouts_depth_200x180
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.single_layer.d24_unorm_s8_uint_separate_layouts_stencil_200x180
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.single_layer.d32_sfloat_s8_uint_200x180
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.single_layer.d32_sfloat_s8_uint_separate_layouts_depth_200x180
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.single_layer.d32_sfloat_s8_uint_separate_layouts_stencil_200x180
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.single_layer.d16_unorm_1x33
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.single_layer.x8_d24_unorm_pack32_1x33
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.single_layer.d32_sfloat_1x33
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.single_layer.s8_uint_1x33
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.single_layer.d16_unorm_s8_uint_1x33
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.single_layer.d16_unorm_s8_uint_separate_layouts_depth_1x33
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.single_layer.d16_unorm_s8_uint_separate_layouts_stencil_1x33
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.single_layer.d24_unorm_s8_uint_1x33
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.single_layer.d24_unorm_s8_uint_separate_layouts_depth_1x33
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.single_layer.d24_unorm_s8_uint_separate_layouts_stencil_1x33
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.single_layer.d32_sfloat_s8_uint_1x33
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.single_layer.d32_sfloat_s8_uint_separate_layouts_depth_1x33
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.single_layer.d32_sfloat_s8_uint_separate_layouts_stencil_1x33
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.single_layer.d16_unorm_64x11
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.single_layer.x8_d24_unorm_pack32_64x11
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.single_layer.d32_sfloat_64x11
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.single_layer.s8_uint_64x11
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.single_layer.d16_unorm_s8_uint_64x11
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.single_layer.d16_unorm_s8_uint_separate_layouts_depth_64x11
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.single_layer.d16_unorm_s8_uint_separate_layouts_stencil_64x11
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.single_layer.d24_unorm_s8_uint_64x11
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.single_layer.d24_unorm_s8_uint_separate_layouts_depth_64x11
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.single_layer.d24_unorm_s8_uint_separate_layouts_stencil_64x11
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.single_layer.d32_sfloat_s8_uint_64x11
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.single_layer.d32_sfloat_s8_uint_separate_layouts_depth_64x11
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.single_layer.d32_sfloat_s8_uint_separate_layouts_stencil_64x11
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.single_layer.d16_unorm_33x128
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.single_layer.x8_d24_unorm_pack32_33x128
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.single_layer.d32_sfloat_33x128
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.single_layer.s8_uint_33x128
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.single_layer.d16_unorm_s8_uint_33x128
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.single_layer.d16_unorm_s8_uint_separate_layouts_depth_33x128
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.single_layer.d16_unorm_s8_uint_separate_layouts_stencil_33x128
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.single_layer.d24_unorm_s8_uint_33x128
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.single_layer.d24_unorm_s8_uint_separate_layouts_depth_33x128
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.single_layer.d24_unorm_s8_uint_separate_layouts_stencil_33x128
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.single_layer.d32_sfloat_s8_uint_33x128
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.single_layer.d32_sfloat_s8_uint_separate_layouts_depth_33x128
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.single_layer.d32_sfloat_s8_uint_separate_layouts_stencil_33x128
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.multiple_layers.d16_unorm
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.multiple_layers.x8_d24_unorm_pack32
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.multiple_layers.d32_sfloat
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.multiple_layers.s8_uint
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.multiple_layers.d16_unorm_s8_uint
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.multiple_layers.d16_unorm_s8_uint_separate_layouts_depth
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.multiple_layers.d16_unorm_s8_uint_separate_layouts_stencil
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.multiple_layers.d24_unorm_s8_uint
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.multiple_layers.d24_unorm_s8_uint_separate_layouts_depth
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.multiple_layers.d24_unorm_s8_uint_separate_layouts_stencil
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.multiple_layers.d32_sfloat_s8_uint
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.multiple_layers.d32_sfloat_s8_uint_separate_layouts_depth
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.multiple_layers.d32_sfloat_s8_uint_separate_layouts_stencil
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.multiple_layers.d16_unorm_200x180
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.multiple_layers.x8_d24_unorm_pack32_200x180
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.multiple_layers.d32_sfloat_200x180
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.multiple_layers.s8_uint_200x180
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.multiple_layers.d16_unorm_s8_uint_200x180
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.multiple_layers.d16_unorm_s8_uint_separate_layouts_depth_200x180
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.multiple_layers.d16_unorm_s8_uint_separate_layouts_stencil_200x180
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.multiple_layers.d24_unorm_s8_uint_200x180
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.multiple_layers.d24_unorm_s8_uint_separate_layouts_depth_200x180
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.multiple_layers.d24_unorm_s8_uint_separate_layouts_stencil_200x180
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.multiple_layers.d32_sfloat_s8_uint_200x180
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.multiple_layers.d32_sfloat_s8_uint_separate_layouts_depth_200x180
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.multiple_layers.d32_sfloat_s8_uint_separate_layouts_stencil_200x180
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.multiple_layers.d16_unorm_1x33
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.multiple_layers.x8_d24_unorm_pack32_1x33
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.multiple_layers.d32_sfloat_1x33
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.multiple_layers.s8_uint_1x33
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.multiple_layers.d16_unorm_s8_uint_1x33
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.multiple_layers.d16_unorm_s8_uint_separate_layouts_depth_1x33
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.multiple_layers.d16_unorm_s8_uint_separate_layouts_stencil_1x33
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.multiple_layers.d24_unorm_s8_uint_1x33
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.multiple_layers.d24_unorm_s8_uint_separate_layouts_depth_1x33
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.multiple_layers.d24_unorm_s8_uint_separate_layouts_stencil_1x33
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.multiple_layers.d32_sfloat_s8_uint_1x33
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.multiple_layers.d32_sfloat_s8_uint_separate_layouts_depth_1x33
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.multiple_layers.d32_sfloat_s8_uint_separate_layouts_stencil_1x33
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.multiple_layers.d16_unorm_64x11
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.multiple_layers.x8_d24_unorm_pack32_64x11
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.multiple_layers.d32_sfloat_64x11
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.multiple_layers.s8_uint_64x11
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.multiple_layers.d16_unorm_s8_uint_64x11
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.multiple_layers.d16_unorm_s8_uint_separate_layouts_depth_64x11
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.multiple_layers.d16_unorm_s8_uint_separate_layouts_stencil_64x11
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.multiple_layers.d24_unorm_s8_uint_64x11
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.multiple_layers.d24_unorm_s8_uint_separate_layouts_depth_64x11
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.multiple_layers.d24_unorm_s8_uint_separate_layouts_stencil_64x11
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.multiple_layers.d32_sfloat_s8_uint_64x11
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.multiple_layers.d32_sfloat_s8_uint_separate_layouts_depth_64x11
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.multiple_layers.d32_sfloat_s8_uint_separate_layouts_stencil_64x11
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.multiple_layers.d16_unorm_33x128
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.multiple_layers.x8_d24_unorm_pack32_33x128
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.multiple_layers.d32_sfloat_33x128
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.multiple_layers.s8_uint_33x128
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.multiple_layers.d16_unorm_s8_uint_33x128
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.multiple_layers.d16_unorm_s8_uint_separate_layouts_depth_33x128
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.multiple_layers.d16_unorm_s8_uint_separate_layouts_stencil_33x128
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.multiple_layers.d24_unorm_s8_uint_33x128
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.multiple_layers.d24_unorm_s8_uint_separate_layouts_depth_33x128
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.multiple_layers.d24_unorm_s8_uint_separate_layouts_stencil_33x128
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.multiple_layers.d32_sfloat_s8_uint_33x128
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.multiple_layers.d32_sfloat_s8_uint_separate_layouts_depth_33x128
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.multiple_layers.d32_sfloat_s8_uint_separate_layouts_stencil_33x128
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers.d16_unorm
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers.x8_d24_unorm_pack32
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers.d32_sfloat
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers.s8_uint
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers.d16_unorm_s8_uint
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers.d16_unorm_s8_uint_separate_layouts_depth
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers.d16_unorm_s8_uint_separate_layouts_stencil
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers.d24_unorm_s8_uint
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers.d24_unorm_s8_uint_separate_layouts_depth
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers.d24_unorm_s8_uint_separate_layouts_stencil
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers.d32_sfloat_s8_uint
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers.d32_sfloat_s8_uint_separate_layouts_depth
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers.d32_sfloat_s8_uint_separate_layouts_stencil
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers.d16_unorm_200x180
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers.x8_d24_unorm_pack32_200x180
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers.d32_sfloat_200x180
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers.s8_uint_200x180
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers.d16_unorm_s8_uint_200x180
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers.d16_unorm_s8_uint_separate_layouts_depth_200x180
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers.d16_unorm_s8_uint_separate_layouts_stencil_200x180
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers.d24_unorm_s8_uint_200x180
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers.d24_unorm_s8_uint_separate_layouts_depth_200x180
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers.d24_unorm_s8_uint_separate_layouts_stencil_200x180
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers.d32_sfloat_s8_uint_200x180
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers.d32_sfloat_s8_uint_separate_layouts_depth_200x180
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers.d32_sfloat_s8_uint_separate_layouts_stencil_200x180
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers.d16_unorm_1x33
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers.x8_d24_unorm_pack32_1x33
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers.d32_sfloat_1x33
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers.s8_uint_1x33
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers.d16_unorm_s8_uint_1x33
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers.d16_unorm_s8_uint_separate_layouts_depth_1x33
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers.d16_unorm_s8_uint_separate_layouts_stencil_1x33
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers.d24_unorm_s8_uint_1x33
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers.d24_unorm_s8_uint_separate_layouts_depth_1x33
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers.d24_unorm_s8_uint_separate_layouts_stencil_1x33
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers.d32_sfloat_s8_uint_1x33
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers.d32_sfloat_s8_uint_separate_layouts_depth_1x33
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers.d32_sfloat_s8_uint_separate_layouts_stencil_1x33
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers.d16_unorm_64x11
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers.x8_d24_unorm_pack32_64x11
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers.d32_sfloat_64x11
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers.s8_uint_64x11
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers.d16_unorm_s8_uint_64x11
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers.d16_unorm_s8_uint_separate_layouts_depth_64x11
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers.d16_unorm_s8_uint_separate_layouts_stencil_64x11
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers.d24_unorm_s8_uint_64x11
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers.d24_unorm_s8_uint_separate_layouts_depth_64x11
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers.d24_unorm_s8_uint_separate_layouts_stencil_64x11
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers.d32_sfloat_s8_uint_64x11
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers.d32_sfloat_s8_uint_separate_layouts_depth_64x11
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers.d32_sfloat_s8_uint_separate_layouts_stencil_64x11
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers.d16_unorm_33x128
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers.x8_d24_unorm_pack32_33x128
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers.d32_sfloat_33x128
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers.s8_uint_33x128
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers.d16_unorm_s8_uint_33x128
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers.d16_unorm_s8_uint_separate_layouts_depth_33x128
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers.d16_unorm_s8_uint_separate_layouts_stencil_33x128
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers.d24_unorm_s8_uint_33x128
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers.d24_unorm_s8_uint_separate_layouts_depth_33x128
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers.d24_unorm_s8_uint_separate_layouts_stencil_33x128
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers.d32_sfloat_s8_uint_33x128
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers.d32_sfloat_s8_uint_separate_layouts_depth_33x128
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers.d32_sfloat_s8_uint_separate_layouts_stencil_33x128
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers_twostep.d16_unorm
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers_twostep.x8_d24_unorm_pack32
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers_twostep.d32_sfloat
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers_twostep.s8_uint
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers_twostep.d16_unorm_s8_uint
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers_twostep.d16_unorm_s8_uint_separate_layouts_depth
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers_twostep.d16_unorm_s8_uint_separate_layouts_stencil
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers_twostep.d24_unorm_s8_uint
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers_twostep.d24_unorm_s8_uint_separate_layouts_depth
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers_twostep.d24_unorm_s8_uint_separate_layouts_stencil
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers_twostep.d32_sfloat_s8_uint
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers_twostep.d32_sfloat_s8_uint_separate_layouts_depth
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers_twostep.d32_sfloat_s8_uint_separate_layouts_stencil
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers_twostep.d16_unorm_200x180
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers_twostep.x8_d24_unorm_pack32_200x180
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers_twostep.d32_sfloat_200x180
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers_twostep.s8_uint_200x180
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers_twostep.d16_unorm_s8_uint_200x180
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers_twostep.d16_unorm_s8_uint_separate_layouts_depth_200x180
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers_twostep.d16_unorm_s8_uint_separate_layouts_stencil_200x180
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers_twostep.d24_unorm_s8_uint_200x180
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers_twostep.d24_unorm_s8_uint_separate_layouts_depth_200x180
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers_twostep.d24_unorm_s8_uint_separate_layouts_stencil_200x180
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers_twostep.d32_sfloat_s8_uint_200x180
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers_twostep.d32_sfloat_s8_uint_separate_layouts_depth_200x180
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers_twostep.d32_sfloat_s8_uint_separate_layouts_stencil_200x180
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers_twostep.d16_unorm_1x33
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers_twostep.x8_d24_unorm_pack32_1x33
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers_twostep.d32_sfloat_1x33
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers_twostep.s8_uint_1x33
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers_twostep.d16_unorm_s8_uint_1x33
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers_twostep.d16_unorm_s8_uint_separate_layouts_depth_1x33
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers_twostep.d16_unorm_s8_uint_separate_layouts_stencil_1x33
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers_twostep.d24_unorm_s8_uint_1x33
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers_twostep.d24_unorm_s8_uint_separate_layouts_depth_1x33
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers_twostep.d24_unorm_s8_uint_separate_layouts_stencil_1x33
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers_twostep.d32_sfloat_s8_uint_1x33
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers_twostep.d32_sfloat_s8_uint_separate_layouts_depth_1x33
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers_twostep.d32_sfloat_s8_uint_separate_layouts_stencil_1x33
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers_twostep.d16_unorm_64x11
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers_twostep.x8_d24_unorm_pack32_64x11
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers_twostep.d32_sfloat_64x11
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers_twostep.s8_uint_64x11
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers_twostep.d16_unorm_s8_uint_64x11
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers_twostep.d16_unorm_s8_uint_separate_layouts_depth_64x11
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers_twostep.d16_unorm_s8_uint_separate_layouts_stencil_64x11
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers_twostep.d24_unorm_s8_uint_64x11
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers_twostep.d24_unorm_s8_uint_separate_layouts_depth_64x11
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers_twostep.d24_unorm_s8_uint_separate_layouts_stencil_64x11
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers_twostep.d32_sfloat_s8_uint_64x11
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers_twostep.d32_sfloat_s8_uint_separate_layouts_depth_64x11
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers_twostep.d32_sfloat_s8_uint_separate_layouts_stencil_64x11
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers_twostep.d16_unorm_33x128
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers_twostep.x8_d24_unorm_pack32_33x128
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers_twostep.d32_sfloat_33x128
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers_twostep.s8_uint_33x128
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers_twostep.d16_unorm_s8_uint_33x128
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers_twostep.d16_unorm_s8_uint_separate_layouts_depth_33x128
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers_twostep.d16_unorm_s8_uint_separate_layouts_stencil_33x128
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers_twostep.d24_unorm_s8_uint_33x128
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers_twostep.d24_unorm_s8_uint_separate_layouts_depth_33x128
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers_twostep.d24_unorm_s8_uint_separate_layouts_stencil_33x128
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers_twostep.d32_sfloat_s8_uint_33x128
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers_twostep.d32_sfloat_s8_uint_separate_layouts_depth_33x128
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers_twostep.d32_sfloat_s8_uint_separate_layouts_stencil_33x128
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_color_attachment.single_layer.r4g4_unorm_pack8
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_color_attachment.single_layer.r4g4b4a4_unorm_pack16
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_color_attachment.single_layer.b4g4r4a4_unorm_pack16
@@ -106068,141 +106476,261 @@ dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.s
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.single_layer.d32_sfloat
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.single_layer.s8_uint
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.single_layer.d16_unorm_s8_uint
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.single_layer.d16_unorm_s8_uint_separate_layouts_depth
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.single_layer.d16_unorm_s8_uint_separate_layouts_stencil
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.single_layer.d24_unorm_s8_uint
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.single_layer.d24_unorm_s8_uint_separate_layouts_depth
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.single_layer.d24_unorm_s8_uint_separate_layouts_stencil
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.single_layer.d32_sfloat_s8_uint
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.single_layer.d32_sfloat_s8_uint_separate_layouts_depth
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.single_layer.d32_sfloat_s8_uint_separate_layouts_stencil
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.single_layer.d16_unorm_200x180
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.single_layer.x8_d24_unorm_pack32_200x180
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.single_layer.d32_sfloat_200x180
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.single_layer.s8_uint_200x180
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.single_layer.d16_unorm_s8_uint_200x180
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.single_layer.d16_unorm_s8_uint_separate_layouts_depth_200x180
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.single_layer.d16_unorm_s8_uint_separate_layouts_stencil_200x180
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.single_layer.d24_unorm_s8_uint_200x180
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.single_layer.d24_unorm_s8_uint_separate_layouts_depth_200x180
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.single_layer.d24_unorm_s8_uint_separate_layouts_stencil_200x180
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.single_layer.d32_sfloat_s8_uint_200x180
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.single_layer.d32_sfloat_s8_uint_separate_layouts_depth_200x180
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.single_layer.d32_sfloat_s8_uint_separate_layouts_stencil_200x180
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.single_layer.d16_unorm_1x33
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.single_layer.x8_d24_unorm_pack32_1x33
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.single_layer.d32_sfloat_1x33
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.single_layer.s8_uint_1x33
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.single_layer.d16_unorm_s8_uint_1x33
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.single_layer.d16_unorm_s8_uint_separate_layouts_depth_1x33
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.single_layer.d16_unorm_s8_uint_separate_layouts_stencil_1x33
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.single_layer.d24_unorm_s8_uint_1x33
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.single_layer.d24_unorm_s8_uint_separate_layouts_depth_1x33
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.single_layer.d24_unorm_s8_uint_separate_layouts_stencil_1x33
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.single_layer.d32_sfloat_s8_uint_1x33
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.single_layer.d32_sfloat_s8_uint_separate_layouts_depth_1x33
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.single_layer.d32_sfloat_s8_uint_separate_layouts_stencil_1x33
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.single_layer.d16_unorm_64x11
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.single_layer.x8_d24_unorm_pack32_64x11
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.single_layer.d32_sfloat_64x11
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.single_layer.s8_uint_64x11
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.single_layer.d16_unorm_s8_uint_64x11
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.single_layer.d16_unorm_s8_uint_separate_layouts_depth_64x11
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.single_layer.d16_unorm_s8_uint_separate_layouts_stencil_64x11
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.single_layer.d24_unorm_s8_uint_64x11
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.single_layer.d24_unorm_s8_uint_separate_layouts_depth_64x11
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.single_layer.d24_unorm_s8_uint_separate_layouts_stencil_64x11
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.single_layer.d32_sfloat_s8_uint_64x11
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.single_layer.d32_sfloat_s8_uint_separate_layouts_depth_64x11
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.single_layer.d32_sfloat_s8_uint_separate_layouts_stencil_64x11
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.single_layer.d16_unorm_33x128
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.single_layer.x8_d24_unorm_pack32_33x128
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.single_layer.d32_sfloat_33x128
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.single_layer.s8_uint_33x128
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.single_layer.d16_unorm_s8_uint_33x128
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.single_layer.d16_unorm_s8_uint_separate_layouts_depth_33x128
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.single_layer.d16_unorm_s8_uint_separate_layouts_stencil_33x128
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.single_layer.d24_unorm_s8_uint_33x128
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.single_layer.d24_unorm_s8_uint_separate_layouts_depth_33x128
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.single_layer.d24_unorm_s8_uint_separate_layouts_stencil_33x128
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.single_layer.d32_sfloat_s8_uint_33x128
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.single_layer.d32_sfloat_s8_uint_separate_layouts_depth_33x128
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.single_layer.d32_sfloat_s8_uint_separate_layouts_stencil_33x128
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.multiple_layers.d16_unorm
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.multiple_layers.x8_d24_unorm_pack32
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.multiple_layers.d32_sfloat
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.multiple_layers.s8_uint
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.multiple_layers.d16_unorm_s8_uint
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.multiple_layers.d16_unorm_s8_uint_separate_layouts_depth
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.multiple_layers.d16_unorm_s8_uint_separate_layouts_stencil
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.multiple_layers.d24_unorm_s8_uint
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.multiple_layers.d24_unorm_s8_uint_separate_layouts_depth
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.multiple_layers.d24_unorm_s8_uint_separate_layouts_stencil
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.multiple_layers.d32_sfloat_s8_uint
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.multiple_layers.d32_sfloat_s8_uint_separate_layouts_depth
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.multiple_layers.d32_sfloat_s8_uint_separate_layouts_stencil
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.multiple_layers.d16_unorm_200x180
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.multiple_layers.x8_d24_unorm_pack32_200x180
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.multiple_layers.d32_sfloat_200x180
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.multiple_layers.s8_uint_200x180
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.multiple_layers.d16_unorm_s8_uint_200x180
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.multiple_layers.d16_unorm_s8_uint_separate_layouts_depth_200x180
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.multiple_layers.d16_unorm_s8_uint_separate_layouts_stencil_200x180
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.multiple_layers.d24_unorm_s8_uint_200x180
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.multiple_layers.d24_unorm_s8_uint_separate_layouts_depth_200x180
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.multiple_layers.d24_unorm_s8_uint_separate_layouts_stencil_200x180
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.multiple_layers.d32_sfloat_s8_uint_200x180
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.multiple_layers.d32_sfloat_s8_uint_separate_layouts_depth_200x180
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.multiple_layers.d32_sfloat_s8_uint_separate_layouts_stencil_200x180
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.multiple_layers.d16_unorm_1x33
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.multiple_layers.x8_d24_unorm_pack32_1x33
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.multiple_layers.d32_sfloat_1x33
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.multiple_layers.s8_uint_1x33
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.multiple_layers.d16_unorm_s8_uint_1x33
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.multiple_layers.d16_unorm_s8_uint_separate_layouts_depth_1x33
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.multiple_layers.d16_unorm_s8_uint_separate_layouts_stencil_1x33
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.multiple_layers.d24_unorm_s8_uint_1x33
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.multiple_layers.d24_unorm_s8_uint_separate_layouts_depth_1x33
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.multiple_layers.d24_unorm_s8_uint_separate_layouts_stencil_1x33
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.multiple_layers.d32_sfloat_s8_uint_1x33
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.multiple_layers.d32_sfloat_s8_uint_separate_layouts_depth_1x33
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.multiple_layers.d32_sfloat_s8_uint_separate_layouts_stencil_1x33
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.multiple_layers.d16_unorm_64x11
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.multiple_layers.x8_d24_unorm_pack32_64x11
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.multiple_layers.d32_sfloat_64x11
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.multiple_layers.s8_uint_64x11
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.multiple_layers.d16_unorm_s8_uint_64x11
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.multiple_layers.d16_unorm_s8_uint_separate_layouts_depth_64x11
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.multiple_layers.d16_unorm_s8_uint_separate_layouts_stencil_64x11
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.multiple_layers.d24_unorm_s8_uint_64x11
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.multiple_layers.d24_unorm_s8_uint_separate_layouts_depth_64x11
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.multiple_layers.d24_unorm_s8_uint_separate_layouts_stencil_64x11
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.multiple_layers.d32_sfloat_s8_uint_64x11
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.multiple_layers.d32_sfloat_s8_uint_separate_layouts_depth_64x11
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.multiple_layers.d32_sfloat_s8_uint_separate_layouts_stencil_64x11
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.multiple_layers.d16_unorm_33x128
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.multiple_layers.x8_d24_unorm_pack32_33x128
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.multiple_layers.d32_sfloat_33x128
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.multiple_layers.s8_uint_33x128
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.multiple_layers.d16_unorm_s8_uint_33x128
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.multiple_layers.d16_unorm_s8_uint_separate_layouts_depth_33x128
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.multiple_layers.d16_unorm_s8_uint_separate_layouts_stencil_33x128
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.multiple_layers.d24_unorm_s8_uint_33x128
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.multiple_layers.d24_unorm_s8_uint_separate_layouts_depth_33x128
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.multiple_layers.d24_unorm_s8_uint_separate_layouts_stencil_33x128
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.multiple_layers.d32_sfloat_s8_uint_33x128
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.multiple_layers.d32_sfloat_s8_uint_separate_layouts_depth_33x128
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.multiple_layers.d32_sfloat_s8_uint_separate_layouts_stencil_33x128
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.cube_layers.d16_unorm
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.cube_layers.x8_d24_unorm_pack32
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.cube_layers.d32_sfloat
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.cube_layers.s8_uint
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.cube_layers.d16_unorm_s8_uint
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.cube_layers.d16_unorm_s8_uint_separate_layouts_depth
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.cube_layers.d16_unorm_s8_uint_separate_layouts_stencil
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.cube_layers.d24_unorm_s8_uint
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.cube_layers.d24_unorm_s8_uint_separate_layouts_depth
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.cube_layers.d24_unorm_s8_uint_separate_layouts_stencil
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.cube_layers.d32_sfloat_s8_uint
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.cube_layers.d32_sfloat_s8_uint_separate_layouts_depth
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.cube_layers.d32_sfloat_s8_uint_separate_layouts_stencil
 dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.single_layer.d16_unorm
 dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.single_layer.x8_d24_unorm_pack32
 dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.single_layer.d32_sfloat
 dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.single_layer.s8_uint
 dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.single_layer.d16_unorm_s8_uint
+dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.single_layer.d16_unorm_s8_uint_separate_layouts_depth
+dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.single_layer.d16_unorm_s8_uint_separate_layouts_stencil
 dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.single_layer.d24_unorm_s8_uint
+dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.single_layer.d24_unorm_s8_uint_separate_layouts_depth
+dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.single_layer.d24_unorm_s8_uint_separate_layouts_stencil
 dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.single_layer.d32_sfloat_s8_uint
+dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.single_layer.d32_sfloat_s8_uint_separate_layouts_depth
+dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.single_layer.d32_sfloat_s8_uint_separate_layouts_stencil
 dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.single_layer.d16_unorm_200x180
 dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.single_layer.x8_d24_unorm_pack32_200x180
 dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.single_layer.d32_sfloat_200x180
 dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.single_layer.s8_uint_200x180
 dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.single_layer.d16_unorm_s8_uint_200x180
+dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.single_layer.d16_unorm_s8_uint_separate_layouts_depth_200x180
+dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.single_layer.d16_unorm_s8_uint_separate_layouts_stencil_200x180
 dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.single_layer.d24_unorm_s8_uint_200x180
+dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.single_layer.d24_unorm_s8_uint_separate_layouts_depth_200x180
+dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.single_layer.d24_unorm_s8_uint_separate_layouts_stencil_200x180
 dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.single_layer.d32_sfloat_s8_uint_200x180
+dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.single_layer.d32_sfloat_s8_uint_separate_layouts_depth_200x180
+dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.single_layer.d32_sfloat_s8_uint_separate_layouts_stencil_200x180
 dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.single_layer.d16_unorm_64x11
 dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.single_layer.x8_d24_unorm_pack32_64x11
 dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.single_layer.d32_sfloat_64x11
 dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.single_layer.s8_uint_64x11
 dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.single_layer.d16_unorm_s8_uint_64x11
+dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.single_layer.d16_unorm_s8_uint_separate_layouts_depth_64x11
+dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.single_layer.d16_unorm_s8_uint_separate_layouts_stencil_64x11
 dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.single_layer.d24_unorm_s8_uint_64x11
+dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.single_layer.d24_unorm_s8_uint_separate_layouts_depth_64x11
+dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.single_layer.d24_unorm_s8_uint_separate_layouts_stencil_64x11
 dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.single_layer.d32_sfloat_s8_uint_64x11
+dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.single_layer.d32_sfloat_s8_uint_separate_layouts_depth_64x11
+dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.single_layer.d32_sfloat_s8_uint_separate_layouts_stencil_64x11
 dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.single_layer.d16_unorm_33x128
 dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.single_layer.x8_d24_unorm_pack32_33x128
 dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.single_layer.d32_sfloat_33x128
 dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.single_layer.s8_uint_33x128
 dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.single_layer.d16_unorm_s8_uint_33x128
+dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.single_layer.d16_unorm_s8_uint_separate_layouts_depth_33x128
+dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.single_layer.d16_unorm_s8_uint_separate_layouts_stencil_33x128
 dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.single_layer.d24_unorm_s8_uint_33x128
+dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.single_layer.d24_unorm_s8_uint_separate_layouts_depth_33x128
+dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.single_layer.d24_unorm_s8_uint_separate_layouts_stencil_33x128
 dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.single_layer.d32_sfloat_s8_uint_33x128
+dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.single_layer.d32_sfloat_s8_uint_separate_layouts_depth_33x128
+dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.single_layer.d32_sfloat_s8_uint_separate_layouts_stencil_33x128
 dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.multiple_layers.d16_unorm
 dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.multiple_layers.x8_d24_unorm_pack32
 dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.multiple_layers.d32_sfloat
 dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.multiple_layers.s8_uint
 dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.multiple_layers.d16_unorm_s8_uint
+dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.multiple_layers.d16_unorm_s8_uint_separate_layouts_depth
+dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.multiple_layers.d16_unorm_s8_uint_separate_layouts_stencil
 dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.multiple_layers.d24_unorm_s8_uint
+dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.multiple_layers.d24_unorm_s8_uint_separate_layouts_depth
+dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.multiple_layers.d24_unorm_s8_uint_separate_layouts_stencil
 dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.multiple_layers.d32_sfloat_s8_uint
+dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.multiple_layers.d32_sfloat_s8_uint_separate_layouts_depth
+dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.multiple_layers.d32_sfloat_s8_uint_separate_layouts_stencil
 dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.multiple_layers.d16_unorm_200x180
 dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.multiple_layers.x8_d24_unorm_pack32_200x180
 dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.multiple_layers.d32_sfloat_200x180
 dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.multiple_layers.s8_uint_200x180
 dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.multiple_layers.d16_unorm_s8_uint_200x180
+dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.multiple_layers.d16_unorm_s8_uint_separate_layouts_depth_200x180
+dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.multiple_layers.d16_unorm_s8_uint_separate_layouts_stencil_200x180
 dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.multiple_layers.d24_unorm_s8_uint_200x180
+dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.multiple_layers.d24_unorm_s8_uint_separate_layouts_depth_200x180
+dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.multiple_layers.d24_unorm_s8_uint_separate_layouts_stencil_200x180
 dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.multiple_layers.d32_sfloat_s8_uint_200x180
+dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.multiple_layers.d32_sfloat_s8_uint_separate_layouts_depth_200x180
+dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.multiple_layers.d32_sfloat_s8_uint_separate_layouts_stencil_200x180
 dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.multiple_layers.d16_unorm_64x11
 dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.multiple_layers.x8_d24_unorm_pack32_64x11
 dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.multiple_layers.d32_sfloat_64x11
 dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.multiple_layers.s8_uint_64x11
 dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.multiple_layers.d16_unorm_s8_uint_64x11
+dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.multiple_layers.d16_unorm_s8_uint_separate_layouts_depth_64x11
+dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.multiple_layers.d16_unorm_s8_uint_separate_layouts_stencil_64x11
 dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.multiple_layers.d24_unorm_s8_uint_64x11
+dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.multiple_layers.d24_unorm_s8_uint_separate_layouts_depth_64x11
+dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.multiple_layers.d24_unorm_s8_uint_separate_layouts_stencil_64x11
 dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.multiple_layers.d32_sfloat_s8_uint_64x11
+dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.multiple_layers.d32_sfloat_s8_uint_separate_layouts_depth_64x11
+dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.multiple_layers.d32_sfloat_s8_uint_separate_layouts_stencil_64x11
 dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.multiple_layers.d16_unorm_33x128
 dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.multiple_layers.x8_d24_unorm_pack32_33x128
 dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.multiple_layers.d32_sfloat_33x128
 dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.multiple_layers.s8_uint_33x128
 dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.multiple_layers.d16_unorm_s8_uint_33x128
+dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.multiple_layers.d16_unorm_s8_uint_separate_layouts_depth_33x128
+dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.multiple_layers.d16_unorm_s8_uint_separate_layouts_stencil_33x128
 dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.multiple_layers.d24_unorm_s8_uint_33x128
+dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.multiple_layers.d24_unorm_s8_uint_separate_layouts_depth_33x128
+dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.multiple_layers.d24_unorm_s8_uint_separate_layouts_stencil_33x128
 dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.multiple_layers.d32_sfloat_s8_uint_33x128
+dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.multiple_layers.d32_sfloat_s8_uint_separate_layouts_depth_33x128
+dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.multiple_layers.d32_sfloat_s8_uint_separate_layouts_stencil_33x128
 dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.cube_layers.d16_unorm
 dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.cube_layers.x8_d24_unorm_pack32
 dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.cube_layers.d32_sfloat
 dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.cube_layers.s8_uint
 dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.cube_layers.d16_unorm_s8_uint
+dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.cube_layers.d16_unorm_s8_uint_separate_layouts_depth
+dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.cube_layers.d16_unorm_s8_uint_separate_layouts_stencil
 dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.cube_layers.d24_unorm_s8_uint
+dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.cube_layers.d24_unorm_s8_uint_separate_layouts_depth
+dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.cube_layers.d24_unorm_s8_uint_separate_layouts_stencil
 dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.cube_layers.d32_sfloat_s8_uint
+dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.cube_layers.d32_sfloat_s8_uint_separate_layouts_depth
+dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.cube_layers.d32_sfloat_s8_uint_separate_layouts_stencil
 dEQP-VK.api.fill_and_update_buffer.suballocation.fill_buffer_whole
 dEQP-VK.api.fill_and_update_buffer.suballocation.update_buffer_whole
 dEQP-VK.api.fill_and_update_buffer.suballocation.fill_buffer_first_one
@@ -118240,6 +118768,4102 @@ dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_decw.dfa
 dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_decw.dfail_decw.comp_not_equal
 dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_decw.dfail_decw.comp_greater_or_equal
 dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_decw.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decw.comp_always
 dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_keep.dfail_keep.comp_never
 dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_keep.dfail_keep.comp_less
 dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_keep.dfail_keep.comp_equal
@@ -122336,6 +126960,4102 @@ dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_decw.dfa
 dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_decw.dfail_decw.comp_not_equal
 dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_decw.dfail_decw.comp_greater_or_equal
 dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_decw.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decw.comp_always
 dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_keep.dfail_keep.comp_never
 dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_keep.dfail_keep.comp_less
 dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_keep.dfail_keep.comp_equal
@@ -126432,6 +135152,4102 @@ dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_decw.df
 dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_decw.dfail_decw.comp_not_equal
 dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_decw.dfail_decw.comp_greater_or_equal
 dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_decw.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decw.comp_always
 dEQP-VK.pipeline.stencil.nocolor.format.s8_uint.states.fail_keep.pass_keep.dfail_keep.comp_never
 dEQP-VK.pipeline.stencil.nocolor.format.s8_uint.states.fail_keep.pass_keep.dfail_keep.comp_less
 dEQP-VK.pipeline.stencil.nocolor.format.s8_uint.states.fail_keep.pass_keep.dfail_keep.comp_equal
@@ -134624,6 +147440,4102 @@ dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint.states.fail_decw.pass_
 dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint.states.fail_decw.pass_decw.dfail_decw.comp_not_equal
 dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint.states.fail_decw.pass_decw.dfail_decw.comp_greater_or_equal
 dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint.states.fail_decw.pass_decw.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decw.comp_always
 dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint.states.fail_keep.pass_keep.dfail_keep.comp_never
 dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint.states.fail_keep.pass_keep.dfail_keep.comp_less
 dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint.states.fail_keep.pass_keep.dfail_keep.comp_equal
@@ -138720,6 +155632,4102 @@ dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint.states.fail_decw.pass_
 dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint.states.fail_decw.pass_decw.dfail_decw.comp_not_equal
 dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint.states.fail_decw.pass_decw.dfail_decw.comp_greater_or_equal
 dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint.states.fail_decw.pass_decw.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decw.comp_always
 dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint.states.fail_keep.pass_keep.dfail_keep.comp_never
 dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint.states.fail_keep.pass_keep.dfail_keep.comp_less
 dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint.states.fail_keep.pass_keep.dfail_keep.comp_equal
@@ -142816,6 +163824,4102 @@ dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint.states.fail_decw.pass
 dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint.states.fail_decw.pass_decw.dfail_decw.comp_not_equal
 dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint.states.fail_decw.pass_decw.dfail_decw.comp_greater_or_equal
 dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint.states.fail_decw.pass_decw.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decw.comp_always
 dEQP-VK.pipeline.blend.format.r4g4_unorm_pack8.states.color_dc_sas_rsub_alpha_1mdc_1msc_sub-color_1msa_1msc_add_alpha_ca_da_min-color_1msc_da_sub_alpha_1mca_ca_sub-color_o_1mda_max_alpha_sa_dc_min
 dEQP-VK.pipeline.blend.format.r4g4_unorm_pack8.states.color_sas_1mda_rsub_alpha_1mda_1mcc_sub-color_1mda_1mca_min_alpha_o_cc_min-color_1mdc_da_min_alpha_1mda_da_min-color_sas_1msa_max_alpha_sas_o_min
 dEQP-VK.pipeline.blend.format.r4g4_unorm_pack8.states.color_ca_1mcc_rsub_alpha_sa_1msc_rsub-color_1mca_ca_rsub_alpha_1msc_da_rsub-color_1mcc_1mdc_sub_alpha_z_da_sub-color_sc_dc_add_alpha_1mdc_1msa_min
@@ -147111,6 +172215,156 @@ dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint.compare_ops.not_equal_less_or_eq
 dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint.compare_ops.not_equal_less_or_equal_not_equal_greater_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint.compare_ops.never_zerodepthbounds_depthdisabled_stencilenabled
 dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint.depth_test_disabled.depth_write_enabled
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.not_equal_not_equal_not_equal_not_equal
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.not_equal_not_equal_not_equal_not_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.not_equal_equal_equal_greater
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.not_equal_equal_equal_greater_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.not_equal_greater_greater_less_or_equal
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.not_equal_greater_greater_less_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.not_equal_greater_or_equal_greater_or_equal_greater_or_equal
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.not_equal_greater_or_equal_greater_or_equal_greater_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.not_equal_less_or_equal_less_or_equal_always
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.not_equal_less_or_equal_less_or_equal_always_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.not_equal_less_less_less
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.not_equal_less_less_less_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.not_equal_never_never_never
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.not_equal_never_never_never_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.equal_not_equal_equal_equal
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.equal_not_equal_equal_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.equal_equal_not_equal_less
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.equal_equal_not_equal_less_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.equal_greater_greater_or_equal_not_equal
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.equal_greater_greater_or_equal_not_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.equal_greater_or_equal_greater_greater
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.equal_greater_or_equal_greater_greater_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.equal_less_or_equal_less_less_or_equal
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.equal_less_or_equal_less_less_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.not_equal_always_always_equal
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.not_equal_always_always_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.equal_less_never_always
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.equal_less_never_always_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.equal_never_less_or_equal_greater_or_equal
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.equal_never_less_or_equal_greater_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.greater_not_equal_greater_less
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.greater_not_equal_greater_less_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.greater_equal_greater_or_equal_always
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.greater_equal_greater_or_equal_always_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.greater_greater_not_equal_greater
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.greater_greater_not_equal_greater_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.greater_greater_or_equal_less_or_equal_not_equal
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.greater_greater_or_equal_less_or_equal_not_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.greater_less_or_equal_never_greater_or_equal
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.greater_less_or_equal_never_greater_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.greater_less_equal_never
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.greater_less_equal_never_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.greater_or_equal_not_equal_greater_or_equal_greater
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.greater_or_equal_not_equal_greater_or_equal_greater_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.greater_never_always_less_or_equal
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.greater_never_always_less_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.greater_or_equal_equal_greater_not_equal
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.greater_or_equal_equal_greater_not_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.greater_or_equal_greater_equal_greater_or_equal
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.greater_or_equal_greater_equal_greater_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.greater_or_equal_greater_or_equal_not_equal_less_or_equal
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.greater_or_equal_greater_or_equal_not_equal_less_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.greater_or_equal_less_or_equal_always_less
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.greater_or_equal_less_or_equal_always_less_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.greater_or_equal_less_less_or_equal_equal
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.greater_or_equal_less_less_or_equal_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.greater_or_equal_always_less_never
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.greater_or_equal_always_less_never_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.less_or_equal_not_equal_less_or_equal_less_or_equal
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.less_or_equal_not_equal_less_or_equal_less_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.less_or_equal_equal_less_equal
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.less_or_equal_equal_less_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.less_or_equal_greater_never_less
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.less_or_equal_greater_never_less_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.less_or_equal_greater_or_equal_equal_always
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.less_or_equal_greater_or_equal_equal_always_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.less_or_equal_less_not_equal_greater_or_equal
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.less_or_equal_less_not_equal_greater_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.less_or_equal_less_or_equal_greater_or_equal_never
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.less_or_equal_less_or_equal_greater_or_equal_never_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.less_not_equal_less_greater_or_equal
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.less_not_equal_less_greater_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.less_equal_never_less_or_equal
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.less_equal_never_less_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.less_greater_less_or_equal_never
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.less_greater_less_or_equal_never_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.less_less_or_equal_greater_equal
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.less_less_or_equal_greater_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.less_less_always_not_equal
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.less_less_always_not_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.less_never_not_equal_always
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.less_never_not_equal_always_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.never_not_equal_always_always
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.never_not_equal_always_always_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.less_always_greater_or_equal_less
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.less_always_greater_or_equal_less_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.never_greater_or_equal_never_equal
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.never_greater_or_equal_never_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.never_never_less_greater
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.never_never_less_greater_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.never_less_or_equal_equal_not_equal
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.never_less_or_equal_equal_not_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.never_less_greater_or_equal_less_or_equal
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.never_less_greater_or_equal_less_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.never_always_greater_greater_or_equal
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.never_always_greater_greater_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.always_equal_always_never
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.always_equal_always_never_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.always_never_equal_less
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.always_never_equal_less_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.always_greater_less_always
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.always_greater_less_always_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.always_always_never_greater
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.always_always_never_greater_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.always_less_or_equal_not_equal_equal
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.always_less_or_equal_not_equal_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.less_or_equal_never_greater_not_equal
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.less_or_equal_never_greater_not_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.never_equal_less_or_equal_less
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.never_equal_less_or_equal_less_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.equal_greater_or_equal_always_never
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.equal_greater_or_equal_always_never_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.greater_always_less_not_equal
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.greater_always_less_not_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.greater_never_greater_or_equal_equal
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.greater_never_greater_or_equal_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.equal_always_equal_less_or_equal
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.equal_always_equal_less_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.less_or_equal_greater_always_greater
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.less_or_equal_greater_always_greater_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.never_not_equal_not_equal_never
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.never_not_equal_not_equal_never_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.always_less_greater_greater
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.always_less_greater_greater_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.always_not_equal_never_not_equal
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.always_not_equal_never_not_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.greater_or_equal_always_not_equal_always
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.greater_or_equal_always_not_equal_always_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.less_or_equal_always_less_or_equal_greater
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.less_or_equal_always_less_or_equal_greater_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.less_greater_or_equal_less_greater
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.less_greater_or_equal_less_greater_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.always_equal_less_or_equal_greater_or_equal
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.always_equal_less_or_equal_greater_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.always_greater_or_equal_greater_or_equal_less_or_equal
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.always_greater_or_equal_greater_or_equal_less_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.greater_or_equal_greater_or_equal_never_less
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.greater_or_equal_greater_or_equal_never_less_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.greater_or_equal_never_greater_never
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.greater_or_equal_never_greater_never_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.less_greater_equal_equal
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.less_greater_equal_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.never_greater_always_greater_or_equal
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.never_greater_always_greater_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.not_equal_not_equal_greater_always
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.not_equal_not_equal_greater_always_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.not_equal_less_or_equal_not_equal_greater
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.not_equal_less_or_equal_not_equal_greater_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.never_zerodepthbounds_depthdisabled_stencilenabled
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.depth_test_disabled.depth_write_enabled
 dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint.compare_ops.not_equal_not_equal_not_equal_not_equal
 dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint.compare_ops.not_equal_not_equal_not_equal_not_equal_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint.compare_ops.not_equal_equal_equal_greater
@@ -147261,6 +172515,156 @@ dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint.compare_ops.not_equal_less_or_eq
 dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint.compare_ops.not_equal_less_or_equal_not_equal_greater_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint.compare_ops.never_zerodepthbounds_depthdisabled_stencilenabled
 dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint.depth_test_disabled.depth_write_enabled
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.not_equal_not_equal_not_equal_not_equal
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.not_equal_not_equal_not_equal_not_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.not_equal_equal_equal_greater
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.not_equal_equal_equal_greater_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.not_equal_greater_greater_less_or_equal
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.not_equal_greater_greater_less_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.not_equal_greater_or_equal_greater_or_equal_greater_or_equal
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.not_equal_greater_or_equal_greater_or_equal_greater_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.not_equal_less_or_equal_less_or_equal_always
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.not_equal_less_or_equal_less_or_equal_always_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.not_equal_less_less_less
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.not_equal_less_less_less_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.not_equal_never_never_never
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.not_equal_never_never_never_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.equal_not_equal_equal_equal
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.equal_not_equal_equal_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.equal_equal_not_equal_less
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.equal_equal_not_equal_less_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.equal_greater_greater_or_equal_not_equal
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.equal_greater_greater_or_equal_not_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.equal_greater_or_equal_greater_greater
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.equal_greater_or_equal_greater_greater_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.equal_less_or_equal_less_less_or_equal
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.equal_less_or_equal_less_less_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.not_equal_always_always_equal
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.not_equal_always_always_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.equal_less_never_always
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.equal_less_never_always_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.equal_never_less_or_equal_greater_or_equal
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.equal_never_less_or_equal_greater_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.greater_not_equal_greater_less
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.greater_not_equal_greater_less_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.greater_equal_greater_or_equal_always
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.greater_equal_greater_or_equal_always_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.greater_greater_not_equal_greater
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.greater_greater_not_equal_greater_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.greater_greater_or_equal_less_or_equal_not_equal
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.greater_greater_or_equal_less_or_equal_not_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.greater_less_or_equal_never_greater_or_equal
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.greater_less_or_equal_never_greater_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.greater_less_equal_never
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.greater_less_equal_never_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.greater_or_equal_not_equal_greater_or_equal_greater
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.greater_or_equal_not_equal_greater_or_equal_greater_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.greater_never_always_less_or_equal
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.greater_never_always_less_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.greater_or_equal_equal_greater_not_equal
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.greater_or_equal_equal_greater_not_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.greater_or_equal_greater_equal_greater_or_equal
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.greater_or_equal_greater_equal_greater_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.greater_or_equal_greater_or_equal_not_equal_less_or_equal
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.greater_or_equal_greater_or_equal_not_equal_less_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.greater_or_equal_less_or_equal_always_less
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.greater_or_equal_less_or_equal_always_less_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.greater_or_equal_less_less_or_equal_equal
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.greater_or_equal_less_less_or_equal_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.greater_or_equal_always_less_never
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.greater_or_equal_always_less_never_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.less_or_equal_not_equal_less_or_equal_less_or_equal
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.less_or_equal_not_equal_less_or_equal_less_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.less_or_equal_equal_less_equal
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.less_or_equal_equal_less_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.less_or_equal_greater_never_less
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.less_or_equal_greater_never_less_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.less_or_equal_greater_or_equal_equal_always
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.less_or_equal_greater_or_equal_equal_always_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.less_or_equal_less_not_equal_greater_or_equal
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.less_or_equal_less_not_equal_greater_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.less_or_equal_less_or_equal_greater_or_equal_never
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.less_or_equal_less_or_equal_greater_or_equal_never_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.less_not_equal_less_greater_or_equal
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.less_not_equal_less_greater_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.less_equal_never_less_or_equal
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.less_equal_never_less_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.less_greater_less_or_equal_never
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.less_greater_less_or_equal_never_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.less_less_or_equal_greater_equal
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.less_less_or_equal_greater_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.less_less_always_not_equal
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.less_less_always_not_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.less_never_not_equal_always
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.less_never_not_equal_always_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.never_not_equal_always_always
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.never_not_equal_always_always_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.less_always_greater_or_equal_less
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.less_always_greater_or_equal_less_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.never_greater_or_equal_never_equal
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.never_greater_or_equal_never_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.never_never_less_greater
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.never_never_less_greater_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.never_less_or_equal_equal_not_equal
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.never_less_or_equal_equal_not_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.never_less_greater_or_equal_less_or_equal
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.never_less_greater_or_equal_less_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.never_always_greater_greater_or_equal
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.never_always_greater_greater_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.always_equal_always_never
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.always_equal_always_never_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.always_never_equal_less
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.always_never_equal_less_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.always_greater_less_always
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.always_greater_less_always_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.always_always_never_greater
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.always_always_never_greater_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.always_less_or_equal_not_equal_equal
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.always_less_or_equal_not_equal_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.less_or_equal_never_greater_not_equal
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.less_or_equal_never_greater_not_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.never_equal_less_or_equal_less
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.never_equal_less_or_equal_less_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.equal_greater_or_equal_always_never
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.equal_greater_or_equal_always_never_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.greater_always_less_not_equal
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.greater_always_less_not_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.greater_never_greater_or_equal_equal
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.greater_never_greater_or_equal_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.equal_always_equal_less_or_equal
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.equal_always_equal_less_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.less_or_equal_greater_always_greater
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.less_or_equal_greater_always_greater_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.never_not_equal_not_equal_never
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.never_not_equal_not_equal_never_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.always_less_greater_greater
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.always_less_greater_greater_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.always_not_equal_never_not_equal
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.always_not_equal_never_not_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.greater_or_equal_always_not_equal_always
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.greater_or_equal_always_not_equal_always_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.less_or_equal_always_less_or_equal_greater
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.less_or_equal_always_less_or_equal_greater_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.less_greater_or_equal_less_greater
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.less_greater_or_equal_less_greater_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.always_equal_less_or_equal_greater_or_equal
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.always_equal_less_or_equal_greater_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.always_greater_or_equal_greater_or_equal_less_or_equal
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.always_greater_or_equal_greater_or_equal_less_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.greater_or_equal_greater_or_equal_never_less
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.greater_or_equal_greater_or_equal_never_less_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.greater_or_equal_never_greater_never
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.greater_or_equal_never_greater_never_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.less_greater_equal_equal
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.less_greater_equal_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.never_greater_always_greater_or_equal
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.never_greater_always_greater_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.not_equal_not_equal_greater_always
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.not_equal_not_equal_greater_always_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.not_equal_less_or_equal_not_equal_greater
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.not_equal_less_or_equal_not_equal_greater_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.never_zerodepthbounds_depthdisabled_stencilenabled
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.depth_test_disabled.depth_write_enabled
 dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint.compare_ops.not_equal_not_equal_not_equal_not_equal
 dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint.compare_ops.not_equal_not_equal_not_equal_not_equal_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint.compare_ops.not_equal_equal_equal_greater
@@ -147411,6 +172815,156 @@ dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint.compare_ops.not_equal_less_or_e
 dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint.compare_ops.not_equal_less_or_equal_not_equal_greater_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint.compare_ops.never_zerodepthbounds_depthdisabled_stencilenabled
 dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint.depth_test_disabled.depth_write_enabled
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.not_equal_not_equal_not_equal_not_equal
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.not_equal_not_equal_not_equal_not_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.not_equal_equal_equal_greater
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.not_equal_equal_equal_greater_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.not_equal_greater_greater_less_or_equal
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.not_equal_greater_greater_less_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.not_equal_greater_or_equal_greater_or_equal_greater_or_equal
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.not_equal_greater_or_equal_greater_or_equal_greater_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.not_equal_less_or_equal_less_or_equal_always
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.not_equal_less_or_equal_less_or_equal_always_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.not_equal_less_less_less
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.not_equal_less_less_less_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.not_equal_never_never_never
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.not_equal_never_never_never_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.equal_not_equal_equal_equal
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.equal_not_equal_equal_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.equal_equal_not_equal_less
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.equal_equal_not_equal_less_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.equal_greater_greater_or_equal_not_equal
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.equal_greater_greater_or_equal_not_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.equal_greater_or_equal_greater_greater
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.equal_greater_or_equal_greater_greater_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.equal_less_or_equal_less_less_or_equal
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.equal_less_or_equal_less_less_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.not_equal_always_always_equal
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.not_equal_always_always_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.equal_less_never_always
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.equal_less_never_always_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.equal_never_less_or_equal_greater_or_equal
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.equal_never_less_or_equal_greater_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.greater_not_equal_greater_less
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.greater_not_equal_greater_less_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.greater_equal_greater_or_equal_always
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.greater_equal_greater_or_equal_always_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.greater_greater_not_equal_greater
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.greater_greater_not_equal_greater_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.greater_greater_or_equal_less_or_equal_not_equal
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.greater_greater_or_equal_less_or_equal_not_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.greater_less_or_equal_never_greater_or_equal
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.greater_less_or_equal_never_greater_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.greater_less_equal_never
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.greater_less_equal_never_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.greater_or_equal_not_equal_greater_or_equal_greater
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.greater_or_equal_not_equal_greater_or_equal_greater_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.greater_never_always_less_or_equal
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.greater_never_always_less_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.greater_or_equal_equal_greater_not_equal
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.greater_or_equal_equal_greater_not_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.greater_or_equal_greater_equal_greater_or_equal
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.greater_or_equal_greater_equal_greater_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.greater_or_equal_greater_or_equal_not_equal_less_or_equal
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.greater_or_equal_greater_or_equal_not_equal_less_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.greater_or_equal_less_or_equal_always_less
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.greater_or_equal_less_or_equal_always_less_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.greater_or_equal_less_less_or_equal_equal
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.greater_or_equal_less_less_or_equal_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.greater_or_equal_always_less_never
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.greater_or_equal_always_less_never_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.less_or_equal_not_equal_less_or_equal_less_or_equal
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.less_or_equal_not_equal_less_or_equal_less_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.less_or_equal_equal_less_equal
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.less_or_equal_equal_less_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.less_or_equal_greater_never_less
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.less_or_equal_greater_never_less_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.less_or_equal_greater_or_equal_equal_always
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.less_or_equal_greater_or_equal_equal_always_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.less_or_equal_less_not_equal_greater_or_equal
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.less_or_equal_less_not_equal_greater_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.less_or_equal_less_or_equal_greater_or_equal_never
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.less_or_equal_less_or_equal_greater_or_equal_never_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.less_not_equal_less_greater_or_equal
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.less_not_equal_less_greater_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.less_equal_never_less_or_equal
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.less_equal_never_less_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.less_greater_less_or_equal_never
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.less_greater_less_or_equal_never_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.less_less_or_equal_greater_equal
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.less_less_or_equal_greater_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.less_less_always_not_equal
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.less_less_always_not_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.less_never_not_equal_always
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.less_never_not_equal_always_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.never_not_equal_always_always
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.never_not_equal_always_always_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.less_always_greater_or_equal_less
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.less_always_greater_or_equal_less_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.never_greater_or_equal_never_equal
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.never_greater_or_equal_never_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.never_never_less_greater
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.never_never_less_greater_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.never_less_or_equal_equal_not_equal
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.never_less_or_equal_equal_not_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.never_less_greater_or_equal_less_or_equal
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.never_less_greater_or_equal_less_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.never_always_greater_greater_or_equal
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.never_always_greater_greater_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.always_equal_always_never
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.always_equal_always_never_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.always_never_equal_less
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.always_never_equal_less_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.always_greater_less_always
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.always_greater_less_always_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.always_always_never_greater
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.always_always_never_greater_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.always_less_or_equal_not_equal_equal
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.always_less_or_equal_not_equal_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.less_or_equal_never_greater_not_equal
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.less_or_equal_never_greater_not_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.never_equal_less_or_equal_less
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.never_equal_less_or_equal_less_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.equal_greater_or_equal_always_never
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.equal_greater_or_equal_always_never_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.greater_always_less_not_equal
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.greater_always_less_not_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.greater_never_greater_or_equal_equal
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.greater_never_greater_or_equal_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.equal_always_equal_less_or_equal
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.equal_always_equal_less_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.less_or_equal_greater_always_greater
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.less_or_equal_greater_always_greater_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.never_not_equal_not_equal_never
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.never_not_equal_not_equal_never_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.always_less_greater_greater
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.always_less_greater_greater_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.always_not_equal_never_not_equal
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.always_not_equal_never_not_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.greater_or_equal_always_not_equal_always
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.greater_or_equal_always_not_equal_always_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.less_or_equal_always_less_or_equal_greater
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.less_or_equal_always_less_or_equal_greater_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.less_greater_or_equal_less_greater
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.less_greater_or_equal_less_greater_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.always_equal_less_or_equal_greater_or_equal
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.always_equal_less_or_equal_greater_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.always_greater_or_equal_greater_or_equal_less_or_equal
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.always_greater_or_equal_greater_or_equal_less_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.greater_or_equal_greater_or_equal_never_less
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.greater_or_equal_greater_or_equal_never_less_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.greater_or_equal_never_greater_never
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.greater_or_equal_never_greater_never_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.less_greater_equal_equal
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.less_greater_equal_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.never_greater_always_greater_or_equal
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.never_greater_always_greater_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.not_equal_not_equal_greater_always
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.not_equal_not_equal_greater_always_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.not_equal_less_or_equal_not_equal_greater
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.not_equal_less_or_equal_not_equal_greater_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.never_zerodepthbounds_depthdisabled_stencilenabled
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.depth_test_disabled.depth_write_enabled
 dEQP-VK.pipeline.depth.nocolor.format.d16_unorm.compare_ops.not_equal_not_equal_not_equal_not_equal
 dEQP-VK.pipeline.depth.nocolor.format.d16_unorm.compare_ops.not_equal_not_equal_not_equal_not_equal_depth_bounds_test
 dEQP-VK.pipeline.depth.nocolor.format.d16_unorm.compare_ops.not_equal_equal_equal_greater
@@ -148011,6 +173565,156 @@ dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint.compare_ops.not_equal_le
 dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint.compare_ops.not_equal_less_or_equal_not_equal_greater_depth_bounds_test
 dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint.compare_ops.never_zerodepthbounds_depthdisabled_stencilenabled
 dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint.depth_test_disabled.depth_write_enabled
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.not_equal_not_equal_not_equal_not_equal
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.not_equal_not_equal_not_equal_not_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.not_equal_equal_equal_greater
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.not_equal_equal_equal_greater_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.not_equal_greater_greater_less_or_equal
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.not_equal_greater_greater_less_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.not_equal_greater_or_equal_greater_or_equal_greater_or_equal
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.not_equal_greater_or_equal_greater_or_equal_greater_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.not_equal_less_or_equal_less_or_equal_always
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.not_equal_less_or_equal_less_or_equal_always_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.not_equal_less_less_less
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.not_equal_less_less_less_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.not_equal_never_never_never
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.not_equal_never_never_never_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.equal_not_equal_equal_equal
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.equal_not_equal_equal_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.equal_equal_not_equal_less
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.equal_equal_not_equal_less_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.equal_greater_greater_or_equal_not_equal
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.equal_greater_greater_or_equal_not_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.equal_greater_or_equal_greater_greater
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.equal_greater_or_equal_greater_greater_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.equal_less_or_equal_less_less_or_equal
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.equal_less_or_equal_less_less_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.not_equal_always_always_equal
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.not_equal_always_always_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.equal_less_never_always
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.equal_less_never_always_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.equal_never_less_or_equal_greater_or_equal
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.equal_never_less_or_equal_greater_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.greater_not_equal_greater_less
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.greater_not_equal_greater_less_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.greater_equal_greater_or_equal_always
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.greater_equal_greater_or_equal_always_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.greater_greater_not_equal_greater
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.greater_greater_not_equal_greater_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.greater_greater_or_equal_less_or_equal_not_equal
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.greater_greater_or_equal_less_or_equal_not_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.greater_less_or_equal_never_greater_or_equal
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.greater_less_or_equal_never_greater_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.greater_less_equal_never
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.greater_less_equal_never_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.greater_or_equal_not_equal_greater_or_equal_greater
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.greater_or_equal_not_equal_greater_or_equal_greater_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.greater_never_always_less_or_equal
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.greater_never_always_less_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.greater_or_equal_equal_greater_not_equal
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.greater_or_equal_equal_greater_not_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.greater_or_equal_greater_equal_greater_or_equal
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.greater_or_equal_greater_equal_greater_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.greater_or_equal_greater_or_equal_not_equal_less_or_equal
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.greater_or_equal_greater_or_equal_not_equal_less_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.greater_or_equal_less_or_equal_always_less
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.greater_or_equal_less_or_equal_always_less_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.greater_or_equal_less_less_or_equal_equal
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.greater_or_equal_less_less_or_equal_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.greater_or_equal_always_less_never
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.greater_or_equal_always_less_never_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.less_or_equal_not_equal_less_or_equal_less_or_equal
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.less_or_equal_not_equal_less_or_equal_less_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.less_or_equal_equal_less_equal
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.less_or_equal_equal_less_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.less_or_equal_greater_never_less
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.less_or_equal_greater_never_less_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.less_or_equal_greater_or_equal_equal_always
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.less_or_equal_greater_or_equal_equal_always_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.less_or_equal_less_not_equal_greater_or_equal
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.less_or_equal_less_not_equal_greater_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.less_or_equal_less_or_equal_greater_or_equal_never
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.less_or_equal_less_or_equal_greater_or_equal_never_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.less_not_equal_less_greater_or_equal
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.less_not_equal_less_greater_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.less_equal_never_less_or_equal
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.less_equal_never_less_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.less_greater_less_or_equal_never
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.less_greater_less_or_equal_never_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.less_less_or_equal_greater_equal
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.less_less_or_equal_greater_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.less_less_always_not_equal
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.less_less_always_not_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.less_never_not_equal_always
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.less_never_not_equal_always_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.never_not_equal_always_always
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.never_not_equal_always_always_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.less_always_greater_or_equal_less
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.less_always_greater_or_equal_less_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.never_greater_or_equal_never_equal
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.never_greater_or_equal_never_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.never_never_less_greater
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.never_never_less_greater_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.never_less_or_equal_equal_not_equal
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.never_less_or_equal_equal_not_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.never_less_greater_or_equal_less_or_equal
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.never_less_greater_or_equal_less_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.never_always_greater_greater_or_equal
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.never_always_greater_greater_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.always_equal_always_never
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.always_equal_always_never_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.always_never_equal_less
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.always_never_equal_less_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.always_greater_less_always
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.always_greater_less_always_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.always_always_never_greater
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.always_always_never_greater_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.always_less_or_equal_not_equal_equal
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.always_less_or_equal_not_equal_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.less_or_equal_never_greater_not_equal
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.less_or_equal_never_greater_not_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.never_equal_less_or_equal_less
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.never_equal_less_or_equal_less_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.equal_greater_or_equal_always_never
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.equal_greater_or_equal_always_never_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.greater_always_less_not_equal
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.greater_always_less_not_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.greater_never_greater_or_equal_equal
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.greater_never_greater_or_equal_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.equal_always_equal_less_or_equal
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.equal_always_equal_less_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.less_or_equal_greater_always_greater
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.less_or_equal_greater_always_greater_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.never_not_equal_not_equal_never
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.never_not_equal_not_equal_never_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.always_less_greater_greater
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.always_less_greater_greater_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.always_not_equal_never_not_equal
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.always_not_equal_never_not_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.greater_or_equal_always_not_equal_always
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.greater_or_equal_always_not_equal_always_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.less_or_equal_always_less_or_equal_greater
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.less_or_equal_always_less_or_equal_greater_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.less_greater_or_equal_less_greater
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.less_greater_or_equal_less_greater_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.always_equal_less_or_equal_greater_or_equal
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.always_equal_less_or_equal_greater_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.always_greater_or_equal_greater_or_equal_less_or_equal
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.always_greater_or_equal_greater_or_equal_less_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.greater_or_equal_greater_or_equal_never_less
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.greater_or_equal_greater_or_equal_never_less_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.greater_or_equal_never_greater_never
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.greater_or_equal_never_greater_never_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.less_greater_equal_equal
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.less_greater_equal_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.never_greater_always_greater_or_equal
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.never_greater_always_greater_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.not_equal_not_equal_greater_always
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.not_equal_not_equal_greater_always_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.not_equal_less_or_equal_not_equal_greater
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.not_equal_less_or_equal_not_equal_greater_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.never_zerodepthbounds_depthdisabled_stencilenabled
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.depth_test_disabled.depth_write_enabled
 dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint.compare_ops.not_equal_not_equal_not_equal_not_equal
 dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint.compare_ops.not_equal_not_equal_not_equal_not_equal_depth_bounds_test
 dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint.compare_ops.not_equal_equal_equal_greater
@@ -148161,6 +173865,156 @@ dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint.compare_ops.not_equal_le
 dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint.compare_ops.not_equal_less_or_equal_not_equal_greater_depth_bounds_test
 dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint.compare_ops.never_zerodepthbounds_depthdisabled_stencilenabled
 dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint.depth_test_disabled.depth_write_enabled
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.not_equal_not_equal_not_equal_not_equal
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.not_equal_not_equal_not_equal_not_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.not_equal_equal_equal_greater
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.not_equal_equal_equal_greater_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.not_equal_greater_greater_less_or_equal
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.not_equal_greater_greater_less_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.not_equal_greater_or_equal_greater_or_equal_greater_or_equal
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.not_equal_greater_or_equal_greater_or_equal_greater_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.not_equal_less_or_equal_less_or_equal_always
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.not_equal_less_or_equal_less_or_equal_always_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.not_equal_less_less_less
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.not_equal_less_less_less_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.not_equal_never_never_never
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.not_equal_never_never_never_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.equal_not_equal_equal_equal
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.equal_not_equal_equal_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.equal_equal_not_equal_less
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.equal_equal_not_equal_less_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.equal_greater_greater_or_equal_not_equal
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.equal_greater_greater_or_equal_not_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.equal_greater_or_equal_greater_greater
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.equal_greater_or_equal_greater_greater_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.equal_less_or_equal_less_less_or_equal
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.equal_less_or_equal_less_less_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.not_equal_always_always_equal
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.not_equal_always_always_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.equal_less_never_always
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.equal_less_never_always_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.equal_never_less_or_equal_greater_or_equal
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.equal_never_less_or_equal_greater_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.greater_not_equal_greater_less
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.greater_not_equal_greater_less_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.greater_equal_greater_or_equal_always
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.greater_equal_greater_or_equal_always_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.greater_greater_not_equal_greater
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.greater_greater_not_equal_greater_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.greater_greater_or_equal_less_or_equal_not_equal
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.greater_greater_or_equal_less_or_equal_not_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.greater_less_or_equal_never_greater_or_equal
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.greater_less_or_equal_never_greater_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.greater_less_equal_never
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.greater_less_equal_never_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.greater_or_equal_not_equal_greater_or_equal_greater
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.greater_or_equal_not_equal_greater_or_equal_greater_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.greater_never_always_less_or_equal
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.greater_never_always_less_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.greater_or_equal_equal_greater_not_equal
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.greater_or_equal_equal_greater_not_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.greater_or_equal_greater_equal_greater_or_equal
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.greater_or_equal_greater_equal_greater_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.greater_or_equal_greater_or_equal_not_equal_less_or_equal
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.greater_or_equal_greater_or_equal_not_equal_less_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.greater_or_equal_less_or_equal_always_less
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.greater_or_equal_less_or_equal_always_less_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.greater_or_equal_less_less_or_equal_equal
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.greater_or_equal_less_less_or_equal_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.greater_or_equal_always_less_never
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.greater_or_equal_always_less_never_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.less_or_equal_not_equal_less_or_equal_less_or_equal
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.less_or_equal_not_equal_less_or_equal_less_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.less_or_equal_equal_less_equal
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.less_or_equal_equal_less_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.less_or_equal_greater_never_less
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.less_or_equal_greater_never_less_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.less_or_equal_greater_or_equal_equal_always
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.less_or_equal_greater_or_equal_equal_always_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.less_or_equal_less_not_equal_greater_or_equal
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.less_or_equal_less_not_equal_greater_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.less_or_equal_less_or_equal_greater_or_equal_never
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.less_or_equal_less_or_equal_greater_or_equal_never_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.less_not_equal_less_greater_or_equal
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.less_not_equal_less_greater_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.less_equal_never_less_or_equal
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.less_equal_never_less_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.less_greater_less_or_equal_never
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.less_greater_less_or_equal_never_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.less_less_or_equal_greater_equal
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.less_less_or_equal_greater_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.less_less_always_not_equal
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.less_less_always_not_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.less_never_not_equal_always
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.less_never_not_equal_always_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.never_not_equal_always_always
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.never_not_equal_always_always_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.less_always_greater_or_equal_less
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.less_always_greater_or_equal_less_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.never_greater_or_equal_never_equal
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.never_greater_or_equal_never_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.never_never_less_greater
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.never_never_less_greater_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.never_less_or_equal_equal_not_equal
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.never_less_or_equal_equal_not_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.never_less_greater_or_equal_less_or_equal
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.never_less_greater_or_equal_less_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.never_always_greater_greater_or_equal
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.never_always_greater_greater_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.always_equal_always_never
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.always_equal_always_never_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.always_never_equal_less
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.always_never_equal_less_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.always_greater_less_always
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.always_greater_less_always_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.always_always_never_greater
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.always_always_never_greater_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.always_less_or_equal_not_equal_equal
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.always_less_or_equal_not_equal_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.less_or_equal_never_greater_not_equal
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.less_or_equal_never_greater_not_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.never_equal_less_or_equal_less
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.never_equal_less_or_equal_less_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.equal_greater_or_equal_always_never
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.equal_greater_or_equal_always_never_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.greater_always_less_not_equal
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.greater_always_less_not_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.greater_never_greater_or_equal_equal
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.greater_never_greater_or_equal_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.equal_always_equal_less_or_equal
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.equal_always_equal_less_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.less_or_equal_greater_always_greater
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.less_or_equal_greater_always_greater_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.never_not_equal_not_equal_never
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.never_not_equal_not_equal_never_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.always_less_greater_greater
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.always_less_greater_greater_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.always_not_equal_never_not_equal
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.always_not_equal_never_not_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.greater_or_equal_always_not_equal_always
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.greater_or_equal_always_not_equal_always_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.less_or_equal_always_less_or_equal_greater
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.less_or_equal_always_less_or_equal_greater_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.less_greater_or_equal_less_greater
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.less_greater_or_equal_less_greater_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.always_equal_less_or_equal_greater_or_equal
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.always_equal_less_or_equal_greater_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.always_greater_or_equal_greater_or_equal_less_or_equal
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.always_greater_or_equal_greater_or_equal_less_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.greater_or_equal_greater_or_equal_never_less
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.greater_or_equal_greater_or_equal_never_less_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.greater_or_equal_never_greater_never
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.greater_or_equal_never_greater_never_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.less_greater_equal_equal
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.less_greater_equal_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.never_greater_always_greater_or_equal
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.never_greater_always_greater_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.not_equal_not_equal_greater_always
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.not_equal_not_equal_greater_always_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.not_equal_less_or_equal_not_equal_greater
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.not_equal_less_or_equal_not_equal_greater_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.never_zerodepthbounds_depthdisabled_stencilenabled
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.depth_test_disabled.depth_write_enabled
 dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint.compare_ops.not_equal_not_equal_not_equal_not_equal
 dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint.compare_ops.not_equal_not_equal_not_equal_not_equal_depth_bounds_test
 dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint.compare_ops.not_equal_equal_equal_greater
@@ -148311,6 +174165,156 @@ dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint.compare_ops.not_equal_l
 dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint.compare_ops.not_equal_less_or_equal_not_equal_greater_depth_bounds_test
 dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint.compare_ops.never_zerodepthbounds_depthdisabled_stencilenabled
 dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint.depth_test_disabled.depth_write_enabled
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.not_equal_not_equal_not_equal_not_equal
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.not_equal_not_equal_not_equal_not_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.not_equal_equal_equal_greater
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.not_equal_equal_equal_greater_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.not_equal_greater_greater_less_or_equal
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.not_equal_greater_greater_less_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.not_equal_greater_or_equal_greater_or_equal_greater_or_equal
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.not_equal_greater_or_equal_greater_or_equal_greater_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.not_equal_less_or_equal_less_or_equal_always
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.not_equal_less_or_equal_less_or_equal_always_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.not_equal_less_less_less
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.not_equal_less_less_less_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.not_equal_never_never_never
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.not_equal_never_never_never_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.equal_not_equal_equal_equal
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.equal_not_equal_equal_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.equal_equal_not_equal_less
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.equal_equal_not_equal_less_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.equal_greater_greater_or_equal_not_equal
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.equal_greater_greater_or_equal_not_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.equal_greater_or_equal_greater_greater
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.equal_greater_or_equal_greater_greater_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.equal_less_or_equal_less_less_or_equal
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.equal_less_or_equal_less_less_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.not_equal_always_always_equal
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.not_equal_always_always_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.equal_less_never_always
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.equal_less_never_always_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.equal_never_less_or_equal_greater_or_equal
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.equal_never_less_or_equal_greater_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.greater_not_equal_greater_less
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.greater_not_equal_greater_less_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.greater_equal_greater_or_equal_always
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.greater_equal_greater_or_equal_always_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.greater_greater_not_equal_greater
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.greater_greater_not_equal_greater_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.greater_greater_or_equal_less_or_equal_not_equal
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.greater_greater_or_equal_less_or_equal_not_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.greater_less_or_equal_never_greater_or_equal
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.greater_less_or_equal_never_greater_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.greater_less_equal_never
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.greater_less_equal_never_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.greater_or_equal_not_equal_greater_or_equal_greater
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.greater_or_equal_not_equal_greater_or_equal_greater_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.greater_never_always_less_or_equal
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.greater_never_always_less_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.greater_or_equal_equal_greater_not_equal
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.greater_or_equal_equal_greater_not_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.greater_or_equal_greater_equal_greater_or_equal
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.greater_or_equal_greater_equal_greater_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.greater_or_equal_greater_or_equal_not_equal_less_or_equal
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.greater_or_equal_greater_or_equal_not_equal_less_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.greater_or_equal_less_or_equal_always_less
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.greater_or_equal_less_or_equal_always_less_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.greater_or_equal_less_less_or_equal_equal
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.greater_or_equal_less_less_or_equal_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.greater_or_equal_always_less_never
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.greater_or_equal_always_less_never_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.less_or_equal_not_equal_less_or_equal_less_or_equal
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.less_or_equal_not_equal_less_or_equal_less_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.less_or_equal_equal_less_equal
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.less_or_equal_equal_less_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.less_or_equal_greater_never_less
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.less_or_equal_greater_never_less_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.less_or_equal_greater_or_equal_equal_always
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.less_or_equal_greater_or_equal_equal_always_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.less_or_equal_less_not_equal_greater_or_equal
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.less_or_equal_less_not_equal_greater_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.less_or_equal_less_or_equal_greater_or_equal_never
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.less_or_equal_less_or_equal_greater_or_equal_never_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.less_not_equal_less_greater_or_equal
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.less_not_equal_less_greater_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.less_equal_never_less_or_equal
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.less_equal_never_less_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.less_greater_less_or_equal_never
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.less_greater_less_or_equal_never_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.less_less_or_equal_greater_equal
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.less_less_or_equal_greater_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.less_less_always_not_equal
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.less_less_always_not_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.less_never_not_equal_always
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.less_never_not_equal_always_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.never_not_equal_always_always
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.never_not_equal_always_always_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.less_always_greater_or_equal_less
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.less_always_greater_or_equal_less_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.never_greater_or_equal_never_equal
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.never_greater_or_equal_never_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.never_never_less_greater
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.never_never_less_greater_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.never_less_or_equal_equal_not_equal
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.never_less_or_equal_equal_not_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.never_less_greater_or_equal_less_or_equal
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.never_less_greater_or_equal_less_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.never_always_greater_greater_or_equal
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.never_always_greater_greater_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.always_equal_always_never
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.always_equal_always_never_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.always_never_equal_less
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.always_never_equal_less_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.always_greater_less_always
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.always_greater_less_always_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.always_always_never_greater
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.always_always_never_greater_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.always_less_or_equal_not_equal_equal
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.always_less_or_equal_not_equal_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.less_or_equal_never_greater_not_equal
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.less_or_equal_never_greater_not_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.never_equal_less_or_equal_less
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.never_equal_less_or_equal_less_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.equal_greater_or_equal_always_never
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.equal_greater_or_equal_always_never_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.greater_always_less_not_equal
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.greater_always_less_not_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.greater_never_greater_or_equal_equal
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.greater_never_greater_or_equal_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.equal_always_equal_less_or_equal
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.equal_always_equal_less_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.less_or_equal_greater_always_greater
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.less_or_equal_greater_always_greater_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.never_not_equal_not_equal_never
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.never_not_equal_not_equal_never_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.always_less_greater_greater
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.always_less_greater_greater_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.always_not_equal_never_not_equal
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.always_not_equal_never_not_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.greater_or_equal_always_not_equal_always
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.greater_or_equal_always_not_equal_always_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.less_or_equal_always_less_or_equal_greater
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.less_or_equal_always_less_or_equal_greater_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.less_greater_or_equal_less_greater
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.less_greater_or_equal_less_greater_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.always_equal_less_or_equal_greater_or_equal
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.always_equal_less_or_equal_greater_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.always_greater_or_equal_greater_or_equal_less_or_equal
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.always_greater_or_equal_greater_or_equal_less_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.greater_or_equal_greater_or_equal_never_less
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.greater_or_equal_greater_or_equal_never_less_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.greater_or_equal_never_greater_never
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.greater_or_equal_never_greater_never_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.less_greater_equal_equal
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.less_greater_equal_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.never_greater_always_greater_or_equal
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.never_greater_always_greater_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.not_equal_not_equal_greater_always
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.not_equal_not_equal_greater_always_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.not_equal_less_or_equal_not_equal_greater
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.not_equal_less_or_equal_not_equal_greater_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.never_zerodepthbounds_depthdisabled_stencilenabled
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.depth_test_disabled.depth_write_enabled
 dEQP-VK.pipeline.dynamic_offset.graphics.uniform_buffer.numcmdbuffers_1.sameorder.numdescriptorsetbindings_1.numdynamicbindings_1.numnondynamicbindings_0
 dEQP-VK.pipeline.dynamic_offset.graphics.uniform_buffer.numcmdbuffers_1.sameorder.numdescriptorsetbindings_1.numdynamicbindings_1.numnondynamicbindings_1
 dEQP-VK.pipeline.dynamic_offset.graphics.uniform_buffer.numcmdbuffers_1.sameorder.numdescriptorsetbindings_1.numdynamicbindings_2.numnondynamicbindings_0
@@ -334866,6 +360870,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d16_unorm_s8_
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d16_unorm_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d16_unorm_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d16_unorm_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d24_unorm_s8_uint.depth_none_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d24_unorm_s8_uint.depth_none_stencil_zero_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d24_unorm_s8_uint.depth_none_stencil_min_testing_depth
@@ -334904,6 +360946,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d24_unorm_s8_
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d24_unorm_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d24_unorm_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d24_unorm_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d32_sfloat_s8_uint.depth_none_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d32_sfloat_s8_uint.depth_none_stencil_zero_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d32_sfloat_s8_uint.depth_none_stencil_min_testing_depth
@@ -334942,6 +361022,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d32_sfloat_s8
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d32_sfloat_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d32_sfloat_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d32_sfloat_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d16_unorm.depth_zero_stencil_none_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d16_unorm.depth_zero_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d16_unorm.depth_average_stencil_none_testing_depth
@@ -335007,6 +361125,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d16_unorm_s8_
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d16_unorm_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d16_unorm_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d16_unorm_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d24_unorm_s8_uint.depth_none_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d24_unorm_s8_uint.depth_none_stencil_zero_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d24_unorm_s8_uint.depth_none_stencil_min_testing_depth
@@ -335045,6 +361201,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d24_unorm_s8_
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d24_unorm_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d24_unorm_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d24_unorm_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d32_sfloat_s8_uint.depth_none_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d32_sfloat_s8_uint.depth_none_stencil_zero_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d32_sfloat_s8_uint.depth_none_stencil_min_testing_depth
@@ -335083,6 +361277,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d32_sfloat_s8
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d32_sfloat_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d32_sfloat_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d32_sfloat_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d16_unorm.depth_zero_stencil_none_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d16_unorm.depth_zero_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d16_unorm.depth_average_stencil_none_testing_depth
@@ -335148,6 +361380,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d16_unorm_s8_
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d16_unorm_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d16_unorm_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d16_unorm_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d24_unorm_s8_uint.depth_none_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d24_unorm_s8_uint.depth_none_stencil_zero_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d24_unorm_s8_uint.depth_none_stencil_min_testing_depth
@@ -335186,6 +361456,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d24_unorm_s8_
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d24_unorm_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d24_unorm_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d24_unorm_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d32_sfloat_s8_uint.depth_none_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d32_sfloat_s8_uint.depth_none_stencil_zero_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d32_sfloat_s8_uint.depth_none_stencil_min_testing_depth
@@ -335224,6 +361532,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d32_sfloat_s8
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d32_sfloat_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d32_sfloat_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d32_sfloat_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d16_unorm.depth_zero_stencil_none_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d16_unorm.depth_zero_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d16_unorm.depth_average_stencil_none_testing_depth
@@ -335289,6 +361635,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d16_unorm_s8
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d16_unorm_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d16_unorm_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d16_unorm_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d24_unorm_s8_uint.depth_none_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d24_unorm_s8_uint.depth_none_stencil_zero_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d24_unorm_s8_uint.depth_none_stencil_min_testing_depth
@@ -335327,6 +361711,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d24_unorm_s8
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d24_unorm_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d24_unorm_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d24_unorm_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d32_sfloat_s8_uint.depth_none_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d32_sfloat_s8_uint.depth_none_stencil_zero_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d32_sfloat_s8_uint.depth_none_stencil_min_testing_depth
@@ -335365,6 +361787,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d32_sfloat_s
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d32_sfloat_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d32_sfloat_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d32_sfloat_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d16_unorm.depth_zero_stencil_none_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d16_unorm.depth_zero_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d16_unorm.depth_average_stencil_none_testing_depth
@@ -335430,6 +361890,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d16_unorm_s8
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d16_unorm_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d16_unorm_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d16_unorm_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d24_unorm_s8_uint.depth_none_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d24_unorm_s8_uint.depth_none_stencil_zero_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d24_unorm_s8_uint.depth_none_stencil_min_testing_depth
@@ -335468,6 +361966,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d24_unorm_s8
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d24_unorm_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d24_unorm_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d24_unorm_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d32_sfloat_s8_uint.depth_none_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d32_sfloat_s8_uint.depth_none_stencil_zero_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d32_sfloat_s8_uint.depth_none_stencil_min_testing_depth
@@ -335506,6 +362042,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d32_sfloat_s
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d32_sfloat_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d32_sfloat_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d32_sfloat_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d16_unorm.depth_zero_stencil_none_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d16_unorm.depth_zero_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d16_unorm.depth_average_stencil_none_testing_depth
@@ -335571,6 +362145,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d16_unorm_s8
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d16_unorm_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d16_unorm_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d16_unorm_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d24_unorm_s8_uint.depth_none_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d24_unorm_s8_uint.depth_none_stencil_zero_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d24_unorm_s8_uint.depth_none_stencil_min_testing_depth
@@ -335609,6 +362221,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d24_unorm_s8
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d24_unorm_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d24_unorm_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d24_unorm_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d32_sfloat_s8_uint.depth_none_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d32_sfloat_s8_uint.depth_none_stencil_zero_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d32_sfloat_s8_uint.depth_none_stencil_min_testing_depth
@@ -335647,6 +362297,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d32_sfloat_s
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d32_sfloat_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d32_sfloat_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d32_sfloat_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d16_unorm.depth_zero_stencil_none_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d16_unorm.depth_zero_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d16_unorm.depth_average_stencil_none_testing_depth
@@ -335712,6 +362400,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d16_unorm_s8_u
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d16_unorm_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d16_unorm_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d16_unorm_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d24_unorm_s8_uint.depth_none_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d24_unorm_s8_uint.depth_none_stencil_zero_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d24_unorm_s8_uint.depth_none_stencil_min_testing_depth
@@ -335750,6 +362476,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d24_unorm_s8_u
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d24_unorm_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d24_unorm_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d24_unorm_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d32_sfloat_s8_uint.depth_none_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d32_sfloat_s8_uint.depth_none_stencil_zero_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d32_sfloat_s8_uint.depth_none_stencil_min_testing_depth
@@ -335788,6 +362552,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d32_sfloat_s8_
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d32_sfloat_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d32_sfloat_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d32_sfloat_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d16_unorm.depth_zero_stencil_none_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d16_unorm.depth_zero_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d16_unorm.depth_average_stencil_none_testing_depth
@@ -335853,6 +362655,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d16_unorm_s8_u
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d16_unorm_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d16_unorm_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d16_unorm_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d24_unorm_s8_uint.depth_none_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d24_unorm_s8_uint.depth_none_stencil_zero_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d24_unorm_s8_uint.depth_none_stencil_min_testing_depth
@@ -335891,6 +362731,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d24_unorm_s8_u
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d24_unorm_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d24_unorm_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d24_unorm_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d32_sfloat_s8_uint.depth_none_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d32_sfloat_s8_uint.depth_none_stencil_zero_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d32_sfloat_s8_uint.depth_none_stencil_min_testing_depth
@@ -335929,6 +362807,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d32_sfloat_s8_
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d32_sfloat_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d32_sfloat_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d32_sfloat_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d16_unorm.depth_zero_stencil_none_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d16_unorm.depth_zero_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d16_unorm.depth_average_stencil_none_testing_depth
@@ -335994,6 +362910,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d16_unorm_s8_u
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d16_unorm_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d16_unorm_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d16_unorm_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d24_unorm_s8_uint.depth_none_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d24_unorm_s8_uint.depth_none_stencil_zero_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d24_unorm_s8_uint.depth_none_stencil_min_testing_depth
@@ -336032,6 +362986,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d24_unorm_s8_u
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d24_unorm_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d24_unorm_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d24_unorm_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d32_sfloat_s8_uint.depth_none_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d32_sfloat_s8_uint.depth_none_stencil_zero_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d32_sfloat_s8_uint.depth_none_stencil_min_testing_depth
@@ -336070,6 +363062,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d32_sfloat_s8_
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d32_sfloat_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d32_sfloat_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d32_sfloat_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d16_unorm.depth_zero_stencil_none_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d16_unorm.depth_zero_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d16_unorm.depth_average_stencil_none_testing_depth
@@ -336135,6 +363165,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d16_unorm_s8_
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d16_unorm_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d16_unorm_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d16_unorm_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d24_unorm_s8_uint.depth_none_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d24_unorm_s8_uint.depth_none_stencil_zero_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d24_unorm_s8_uint.depth_none_stencil_min_testing_depth
@@ -336173,6 +363241,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d24_unorm_s8_
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d24_unorm_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d24_unorm_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d24_unorm_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d32_sfloat_s8_uint.depth_none_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d32_sfloat_s8_uint.depth_none_stencil_zero_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d32_sfloat_s8_uint.depth_none_stencil_min_testing_depth
@@ -336211,6 +363317,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d32_sfloat_s8
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d32_sfloat_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d32_sfloat_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d32_sfloat_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d16_unorm.depth_zero_stencil_none_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d16_unorm.depth_zero_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d16_unorm.depth_average_stencil_none_testing_depth
@@ -336276,6 +363420,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d16_unorm_s8_
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d16_unorm_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d16_unorm_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d16_unorm_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d24_unorm_s8_uint.depth_none_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d24_unorm_s8_uint.depth_none_stencil_zero_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d24_unorm_s8_uint.depth_none_stencil_min_testing_depth
@@ -336314,6 +363496,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d24_unorm_s8_
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d24_unorm_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d24_unorm_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d24_unorm_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d32_sfloat_s8_uint.depth_none_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d32_sfloat_s8_uint.depth_none_stencil_zero_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d32_sfloat_s8_uint.depth_none_stencil_min_testing_depth
@@ -336352,6 +363572,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d32_sfloat_s8
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d32_sfloat_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d32_sfloat_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d32_sfloat_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d16_unorm.depth_zero_stencil_none_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d16_unorm.depth_zero_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d16_unorm.depth_average_stencil_none_testing_depth
@@ -336417,6 +363675,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d16_unorm_s8_
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d16_unorm_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d16_unorm_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d16_unorm_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d24_unorm_s8_uint.depth_none_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d24_unorm_s8_uint.depth_none_stencil_zero_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d24_unorm_s8_uint.depth_none_stencil_min_testing_depth
@@ -336455,6 +363751,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d24_unorm_s8_
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d24_unorm_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d24_unorm_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d24_unorm_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d32_sfloat_s8_uint.depth_none_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d32_sfloat_s8_uint.depth_none_stencil_zero_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d32_sfloat_s8_uint.depth_none_stencil_min_testing_depth
@@ -336493,6 +363827,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d32_sfloat_s8
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d32_sfloat_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d32_sfloat_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d32_sfloat_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d16_unorm.depth_zero_stencil_none_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d16_unorm.depth_zero_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d16_unorm.depth_average_stencil_none_testing_depth
@@ -336558,6 +363930,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d16_unorm_s8_
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d16_unorm_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d16_unorm_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d16_unorm_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d24_unorm_s8_uint.depth_none_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d24_unorm_s8_uint.depth_none_stencil_zero_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d24_unorm_s8_uint.depth_none_stencil_min_testing_depth
@@ -336596,6 +364006,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d24_unorm_s8_
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d24_unorm_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d24_unorm_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d24_unorm_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d32_sfloat_s8_uint.depth_none_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d32_sfloat_s8_uint.depth_none_stencil_zero_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d32_sfloat_s8_uint.depth_none_stencil_min_testing_depth
@@ -336634,6 +364082,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d32_sfloat_s8
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d32_sfloat_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d32_sfloat_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d32_sfloat_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d16_unorm.depth_zero_stencil_none_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d16_unorm.depth_zero_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d16_unorm.depth_average_stencil_none_testing_depth
@@ -336699,6 +364185,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d16_unorm_s8_
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d16_unorm_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d16_unorm_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d16_unorm_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d24_unorm_s8_uint.depth_none_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d24_unorm_s8_uint.depth_none_stencil_zero_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d24_unorm_s8_uint.depth_none_stencil_min_testing_depth
@@ -336737,6 +364261,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d24_unorm_s8_
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d24_unorm_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d24_unorm_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d24_unorm_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d32_sfloat_s8_uint.depth_none_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d32_sfloat_s8_uint.depth_none_stencil_zero_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d32_sfloat_s8_uint.depth_none_stencil_min_testing_depth
@@ -336775,6 +364337,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d32_sfloat_s8
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d32_sfloat_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d32_sfloat_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d32_sfloat_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d16_unorm.depth_zero_stencil_none_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d16_unorm.depth_zero_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d16_unorm.depth_average_stencil_none_testing_depth
@@ -336840,6 +364440,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d16_unorm_s8_
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d16_unorm_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d16_unorm_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d16_unorm_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d24_unorm_s8_uint.depth_none_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d24_unorm_s8_uint.depth_none_stencil_zero_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d24_unorm_s8_uint.depth_none_stencil_min_testing_depth
@@ -336878,6 +364516,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d24_unorm_s8_
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d24_unorm_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d24_unorm_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d24_unorm_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d32_sfloat_s8_uint.depth_none_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d32_sfloat_s8_uint.depth_none_stencil_zero_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d32_sfloat_s8_uint.depth_none_stencil_min_testing_depth
@@ -336916,6 +364592,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d32_sfloat_s8
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d32_sfloat_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d32_sfloat_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d32_sfloat_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d16_unorm.depth_zero_stencil_none_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d16_unorm.depth_zero_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d16_unorm.depth_average_stencil_none_testing_depth
@@ -336981,6 +364695,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d16_unorm_s8
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d16_unorm_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d16_unorm_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d16_unorm_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d24_unorm_s8_uint.depth_none_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d24_unorm_s8_uint.depth_none_stencil_zero_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d24_unorm_s8_uint.depth_none_stencil_min_testing_depth
@@ -337019,6 +364771,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d24_unorm_s8
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d24_unorm_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d24_unorm_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d24_unorm_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d32_sfloat_s8_uint.depth_none_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d32_sfloat_s8_uint.depth_none_stencil_zero_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d32_sfloat_s8_uint.depth_none_stencil_min_testing_depth
@@ -337057,6 +364847,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d32_sfloat_s
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d32_sfloat_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d32_sfloat_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d32_sfloat_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d16_unorm.depth_zero_stencil_none_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d16_unorm.depth_zero_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d16_unorm.depth_average_stencil_none_testing_depth
@@ -337122,6 +364950,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d16_unorm_s8
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d16_unorm_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d16_unorm_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d16_unorm_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d24_unorm_s8_uint.depth_none_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d24_unorm_s8_uint.depth_none_stencil_zero_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d24_unorm_s8_uint.depth_none_stencil_min_testing_depth
@@ -337160,6 +365026,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d24_unorm_s8
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d24_unorm_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d24_unorm_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d24_unorm_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d32_sfloat_s8_uint.depth_none_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d32_sfloat_s8_uint.depth_none_stencil_zero_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d32_sfloat_s8_uint.depth_none_stencil_min_testing_depth
@@ -337198,6 +365102,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d32_sfloat_s
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d32_sfloat_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d32_sfloat_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d32_sfloat_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d16_unorm.depth_zero_stencil_none_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d16_unorm.depth_zero_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d16_unorm.depth_average_stencil_none_testing_depth
@@ -337263,6 +365205,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d16_unorm_s8
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d16_unorm_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d16_unorm_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d16_unorm_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d24_unorm_s8_uint.depth_none_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d24_unorm_s8_uint.depth_none_stencil_zero_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d24_unorm_s8_uint.depth_none_stencil_min_testing_depth
@@ -337301,6 +365281,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d24_unorm_s8
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d24_unorm_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d24_unorm_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d24_unorm_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d32_sfloat_s8_uint.depth_none_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d32_sfloat_s8_uint.depth_none_stencil_zero_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d32_sfloat_s8_uint.depth_none_stencil_min_testing_depth
@@ -337339,6 +365357,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d32_sfloat_s
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d32_sfloat_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d32_sfloat_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d32_sfloat_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d16_unorm.depth_zero_stencil_none_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d16_unorm.depth_zero_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d16_unorm.depth_average_stencil_none_testing_depth
@@ -337404,6 +365460,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d16_unorm_s8_ui
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d16_unorm_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d16_unorm_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d16_unorm_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d24_unorm_s8_uint.depth_none_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d24_unorm_s8_uint.depth_none_stencil_zero_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d24_unorm_s8_uint.depth_none_stencil_min_testing_depth
@@ -337442,6 +365536,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d24_unorm_s8_ui
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d24_unorm_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d24_unorm_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d24_unorm_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d32_sfloat_s8_uint.depth_none_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d32_sfloat_s8_uint.depth_none_stencil_zero_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d32_sfloat_s8_uint.depth_none_stencil_min_testing_depth
@@ -337480,6 +365612,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d32_sfloat_s8_u
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d32_sfloat_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d32_sfloat_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d32_sfloat_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d16_unorm.depth_zero_stencil_none_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d16_unorm.depth_zero_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d16_unorm.depth_average_stencil_none_testing_depth
@@ -337545,6 +365715,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d16_unorm_s8_ui
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d16_unorm_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d16_unorm_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d16_unorm_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d24_unorm_s8_uint.depth_none_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d24_unorm_s8_uint.depth_none_stencil_zero_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d24_unorm_s8_uint.depth_none_stencil_min_testing_depth
@@ -337583,6 +365791,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d24_unorm_s8_ui
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d24_unorm_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d24_unorm_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d24_unorm_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d32_sfloat_s8_uint.depth_none_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d32_sfloat_s8_uint.depth_none_stencil_zero_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d32_sfloat_s8_uint.depth_none_stencil_min_testing_depth
@@ -337621,6 +365867,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d32_sfloat_s8_u
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d32_sfloat_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d32_sfloat_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d32_sfloat_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d16_unorm.depth_zero_stencil_none_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d16_unorm.depth_zero_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d16_unorm.depth_average_stencil_none_testing_depth
@@ -337686,6 +365970,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d16_unorm_s8_ui
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d16_unorm_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d16_unorm_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d16_unorm_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d24_unorm_s8_uint.depth_none_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d24_unorm_s8_uint.depth_none_stencil_zero_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d24_unorm_s8_uint.depth_none_stencil_min_testing_depth
@@ -337724,6 +366046,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d24_unorm_s8_ui
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d24_unorm_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d24_unorm_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d24_unorm_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d32_sfloat_s8_uint.depth_none_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d32_sfloat_s8_uint.depth_none_stencil_zero_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d32_sfloat_s8_uint.depth_none_stencil_min_testing_depth
@@ -337762,6 +366122,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d32_sfloat_s8_u
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d32_sfloat_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d32_sfloat_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d32_sfloat_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d16_unorm.depth_zero_stencil_none_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d16_unorm.depth_zero_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d16_unorm.depth_average_stencil_none_testing_depth
@@ -337827,6 +366225,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d16_unorm_s8_u
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d16_unorm_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d16_unorm_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d16_unorm_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d24_unorm_s8_uint.depth_none_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d24_unorm_s8_uint.depth_none_stencil_zero_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d24_unorm_s8_uint.depth_none_stencil_min_testing_depth
@@ -337865,6 +366301,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d24_unorm_s8_u
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d24_unorm_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d24_unorm_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d24_unorm_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d32_sfloat_s8_uint.depth_none_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d32_sfloat_s8_uint.depth_none_stencil_zero_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d32_sfloat_s8_uint.depth_none_stencil_min_testing_depth
@@ -337903,6 +366377,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d32_sfloat_s8_
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d32_sfloat_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d32_sfloat_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d32_sfloat_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d16_unorm.depth_zero_stencil_none_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d16_unorm.depth_zero_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d16_unorm.depth_average_stencil_none_testing_depth
@@ -337968,6 +366480,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d16_unorm_s8_u
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d16_unorm_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d16_unorm_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d16_unorm_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d24_unorm_s8_uint.depth_none_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d24_unorm_s8_uint.depth_none_stencil_zero_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d24_unorm_s8_uint.depth_none_stencil_min_testing_depth
@@ -338006,6 +366556,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d24_unorm_s8_u
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d24_unorm_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d24_unorm_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d24_unorm_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d32_sfloat_s8_uint.depth_none_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d32_sfloat_s8_uint.depth_none_stencil_zero_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d32_sfloat_s8_uint.depth_none_stencil_min_testing_depth
@@ -338044,6 +366632,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d32_sfloat_s8_
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d32_sfloat_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d32_sfloat_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d32_sfloat_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d16_unorm.depth_zero_stencil_none_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d16_unorm.depth_zero_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d16_unorm.depth_average_stencil_none_testing_depth
@@ -338109,6 +366735,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d16_unorm_s8_u
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d16_unorm_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d16_unorm_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d16_unorm_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d24_unorm_s8_uint.depth_none_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d24_unorm_s8_uint.depth_none_stencil_zero_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d24_unorm_s8_uint.depth_none_stencil_min_testing_depth
@@ -338147,6 +366811,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d24_unorm_s8_u
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d24_unorm_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d24_unorm_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d24_unorm_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d32_sfloat_s8_uint.depth_none_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d32_sfloat_s8_uint.depth_none_stencil_zero_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d32_sfloat_s8_uint.depth_none_stencil_min_testing_depth
@@ -338185,6 +366887,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d32_sfloat_s8_
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d32_sfloat_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d32_sfloat_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d32_sfloat_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d16_unorm.depth_zero_stencil_none_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d16_unorm.depth_zero_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d16_unorm.depth_average_stencil_none_testing_depth
@@ -338250,6 +366990,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d16_unorm_s8_u
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d16_unorm_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d16_unorm_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d16_unorm_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d24_unorm_s8_uint.depth_none_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d24_unorm_s8_uint.depth_none_stencil_zero_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d24_unorm_s8_uint.depth_none_stencil_min_testing_depth
@@ -338288,6 +367066,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d24_unorm_s8_u
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d24_unorm_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d24_unorm_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d24_unorm_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d32_sfloat_s8_uint.depth_none_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d32_sfloat_s8_uint.depth_none_stencil_zero_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d32_sfloat_s8_uint.depth_none_stencil_min_testing_depth
@@ -338326,6 +367142,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d32_sfloat_s8_
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d32_sfloat_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d32_sfloat_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d32_sfloat_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d16_unorm.depth_zero_stencil_none_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d16_unorm.depth_zero_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d16_unorm.depth_average_stencil_none_testing_depth
@@ -338391,6 +367245,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d16_unorm_s8_u
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d16_unorm_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d16_unorm_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d16_unorm_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d24_unorm_s8_uint.depth_none_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d24_unorm_s8_uint.depth_none_stencil_zero_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d24_unorm_s8_uint.depth_none_stencil_min_testing_depth
@@ -338429,6 +367321,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d24_unorm_s8_u
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d24_unorm_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d24_unorm_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d24_unorm_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d32_sfloat_s8_uint.depth_none_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d32_sfloat_s8_uint.depth_none_stencil_zero_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d32_sfloat_s8_uint.depth_none_stencil_min_testing_depth
@@ -338467,6 +367397,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d32_sfloat_s8_
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d32_sfloat_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d32_sfloat_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d32_sfloat_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d16_unorm.depth_zero_stencil_none_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d16_unorm.depth_zero_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d16_unorm.depth_average_stencil_none_testing_depth
@@ -338532,6 +367500,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d16_unorm_s8_u
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d16_unorm_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d16_unorm_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d16_unorm_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d24_unorm_s8_uint.depth_none_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d24_unorm_s8_uint.depth_none_stencil_zero_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d24_unorm_s8_uint.depth_none_stencil_min_testing_depth
@@ -338570,6 +367576,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d24_unorm_s8_u
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d24_unorm_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d24_unorm_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d24_unorm_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d32_sfloat_s8_uint.depth_none_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d32_sfloat_s8_uint.depth_none_stencil_zero_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d32_sfloat_s8_uint.depth_none_stencil_min_testing_depth
@@ -338608,6 +367652,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d32_sfloat_s8_
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d32_sfloat_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d32_sfloat_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d32_sfloat_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d16_unorm.depth_zero_stencil_none_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d16_unorm.depth_zero_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d16_unorm.depth_average_stencil_none_testing_depth
@@ -338673,6 +367755,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d16_unorm_s8_
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d16_unorm_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d16_unorm_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d16_unorm_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d24_unorm_s8_uint.depth_none_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d24_unorm_s8_uint.depth_none_stencil_zero_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d24_unorm_s8_uint.depth_none_stencil_min_testing_depth
@@ -338711,6 +367831,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d24_unorm_s8_
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d24_unorm_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d24_unorm_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d24_unorm_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d32_sfloat_s8_uint.depth_none_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d32_sfloat_s8_uint.depth_none_stencil_zero_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d32_sfloat_s8_uint.depth_none_stencil_min_testing_depth
@@ -338749,6 +367907,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d32_sfloat_s8
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d32_sfloat_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d32_sfloat_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d32_sfloat_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d16_unorm.depth_zero_stencil_none_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d16_unorm.depth_zero_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d16_unorm.depth_average_stencil_none_testing_depth
@@ -338814,6 +368010,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d16_unorm_s8_
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d16_unorm_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d16_unorm_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d16_unorm_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d24_unorm_s8_uint.depth_none_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d24_unorm_s8_uint.depth_none_stencil_zero_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d24_unorm_s8_uint.depth_none_stencil_min_testing_depth
@@ -338852,6 +368086,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d24_unorm_s8_
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d24_unorm_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d24_unorm_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d24_unorm_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d32_sfloat_s8_uint.depth_none_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d32_sfloat_s8_uint.depth_none_stencil_zero_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d32_sfloat_s8_uint.depth_none_stencil_min_testing_depth
@@ -338890,6 +368162,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d32_sfloat_s8
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d32_sfloat_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d32_sfloat_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d32_sfloat_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d16_unorm.depth_zero_stencil_none_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d16_unorm.depth_zero_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d16_unorm.depth_average_stencil_none_testing_depth
@@ -338955,6 +368265,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d16_unorm_s8_
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d16_unorm_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d16_unorm_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d16_unorm_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d24_unorm_s8_uint.depth_none_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d24_unorm_s8_uint.depth_none_stencil_zero_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d24_unorm_s8_uint.depth_none_stencil_min_testing_depth
@@ -338993,6 +368341,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d24_unorm_s8_
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d24_unorm_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d24_unorm_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d24_unorm_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d32_sfloat_s8_uint.depth_none_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d32_sfloat_s8_uint.depth_none_stencil_zero_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d32_sfloat_s8_uint.depth_none_stencil_min_testing_depth
@@ -339031,6 +368417,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d32_sfloat_s8
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d32_sfloat_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d32_sfloat_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d32_sfloat_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_2.d16_unorm.depth_none
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_2.d16_unorm.depth_zero
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_2.d16_unorm.depth_average
@@ -339059,6 +368483,15 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_2.d16_unorm_s
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_2.d16_unorm_s8_uint.stencil_min
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_2.d16_unorm_s8_uint.depth_max
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_2.d16_unorm_s8_uint.stencil_max
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_2.d16_unorm_s8_uint_separate_layouts.depth_none
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_2.d16_unorm_s8_uint_separate_layouts.stencil_none
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_2.d16_unorm_s8_uint_separate_layouts.depth_zero
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_2.d16_unorm_s8_uint_separate_layouts.stencil_zero
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_2.d16_unorm_s8_uint_separate_layouts.depth_average
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_2.d16_unorm_s8_uint_separate_layouts.depth_min
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_2.d16_unorm_s8_uint_separate_layouts.stencil_min
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_2.d16_unorm_s8_uint_separate_layouts.depth_max
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_2.d16_unorm_s8_uint_separate_layouts.stencil_max
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_2.d24_unorm_s8_uint.depth_none
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_2.d24_unorm_s8_uint.stencil_none
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_2.d24_unorm_s8_uint.depth_zero
@@ -339068,6 +368501,15 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_2.d24_unorm_s
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_2.d24_unorm_s8_uint.stencil_min
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_2.d24_unorm_s8_uint.depth_max
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_2.d24_unorm_s8_uint.stencil_max
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_2.d24_unorm_s8_uint_separate_layouts.depth_none
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_2.d24_unorm_s8_uint_separate_layouts.stencil_none
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_2.d24_unorm_s8_uint_separate_layouts.depth_zero
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_2.d24_unorm_s8_uint_separate_layouts.stencil_zero
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_2.d24_unorm_s8_uint_separate_layouts.depth_average
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_2.d24_unorm_s8_uint_separate_layouts.depth_min
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_2.d24_unorm_s8_uint_separate_layouts.stencil_min
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_2.d24_unorm_s8_uint_separate_layouts.depth_max
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_2.d24_unorm_s8_uint_separate_layouts.stencil_max
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_2.d32_sfloat_s8_uint.depth_none
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_2.d32_sfloat_s8_uint.stencil_none
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_2.d32_sfloat_s8_uint.depth_zero
@@ -339077,6 +368519,15 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_2.d32_sfloat_
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_2.d32_sfloat_s8_uint.stencil_min
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_2.d32_sfloat_s8_uint.depth_max
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_2.d32_sfloat_s8_uint.stencil_max
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_none
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_2.d32_sfloat_s8_uint_separate_layouts.stencil_none
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_zero
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_2.d32_sfloat_s8_uint_separate_layouts.stencil_zero
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_average
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_min
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_2.d32_sfloat_s8_uint_separate_layouts.stencil_min
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_max
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_2.d32_sfloat_s8_uint_separate_layouts.stencil_max
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_4.d16_unorm.depth_none
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_4.d16_unorm.depth_zero
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_4.d16_unorm.depth_average
@@ -339105,6 +368556,15 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_4.d16_unorm_s
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_4.d16_unorm_s8_uint.stencil_min
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_4.d16_unorm_s8_uint.depth_max
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_4.d16_unorm_s8_uint.stencil_max
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_4.d16_unorm_s8_uint_separate_layouts.depth_none
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_4.d16_unorm_s8_uint_separate_layouts.stencil_none
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_4.d16_unorm_s8_uint_separate_layouts.depth_zero
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_4.d16_unorm_s8_uint_separate_layouts.stencil_zero
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_4.d16_unorm_s8_uint_separate_layouts.depth_average
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_4.d16_unorm_s8_uint_separate_layouts.depth_min
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_4.d16_unorm_s8_uint_separate_layouts.stencil_min
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_4.d16_unorm_s8_uint_separate_layouts.depth_max
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_4.d16_unorm_s8_uint_separate_layouts.stencil_max
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_4.d24_unorm_s8_uint.depth_none
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_4.d24_unorm_s8_uint.stencil_none
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_4.d24_unorm_s8_uint.depth_zero
@@ -339114,6 +368574,15 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_4.d24_unorm_s
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_4.d24_unorm_s8_uint.stencil_min
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_4.d24_unorm_s8_uint.depth_max
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_4.d24_unorm_s8_uint.stencil_max
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_4.d24_unorm_s8_uint_separate_layouts.depth_none
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_4.d24_unorm_s8_uint_separate_layouts.stencil_none
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_4.d24_unorm_s8_uint_separate_layouts.depth_zero
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_4.d24_unorm_s8_uint_separate_layouts.stencil_zero
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_4.d24_unorm_s8_uint_separate_layouts.depth_average
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_4.d24_unorm_s8_uint_separate_layouts.depth_min
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_4.d24_unorm_s8_uint_separate_layouts.stencil_min
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_4.d24_unorm_s8_uint_separate_layouts.depth_max
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_4.d24_unorm_s8_uint_separate_layouts.stencil_max
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_4.d32_sfloat_s8_uint.depth_none
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_4.d32_sfloat_s8_uint.stencil_none
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_4.d32_sfloat_s8_uint.depth_zero
@@ -339123,6 +368592,15 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_4.d32_sfloat_
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_4.d32_sfloat_s8_uint.stencil_min
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_4.d32_sfloat_s8_uint.depth_max
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_4.d32_sfloat_s8_uint.stencil_max
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_none
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_4.d32_sfloat_s8_uint_separate_layouts.stencil_none
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_zero
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_4.d32_sfloat_s8_uint_separate_layouts.stencil_zero
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_average
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_min
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_4.d32_sfloat_s8_uint_separate_layouts.stencil_min
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_max
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_4.d32_sfloat_s8_uint_separate_layouts.stencil_max
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_8.d16_unorm.depth_none
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_8.d16_unorm.depth_zero
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_8.d16_unorm.depth_average
@@ -339151,6 +368629,15 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_8.d16_unorm_s
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_8.d16_unorm_s8_uint.stencil_min
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_8.d16_unorm_s8_uint.depth_max
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_8.d16_unorm_s8_uint.stencil_max
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_8.d16_unorm_s8_uint_separate_layouts.depth_none
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_8.d16_unorm_s8_uint_separate_layouts.stencil_none
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_8.d16_unorm_s8_uint_separate_layouts.depth_zero
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_8.d16_unorm_s8_uint_separate_layouts.stencil_zero
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_8.d16_unorm_s8_uint_separate_layouts.depth_average
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_8.d16_unorm_s8_uint_separate_layouts.depth_min
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_8.d16_unorm_s8_uint_separate_layouts.stencil_min
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_8.d16_unorm_s8_uint_separate_layouts.depth_max
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_8.d16_unorm_s8_uint_separate_layouts.stencil_max
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_8.d24_unorm_s8_uint.depth_none
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_8.d24_unorm_s8_uint.stencil_none
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_8.d24_unorm_s8_uint.depth_zero
@@ -339160,6 +368647,15 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_8.d24_unorm_s
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_8.d24_unorm_s8_uint.stencil_min
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_8.d24_unorm_s8_uint.depth_max
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_8.d24_unorm_s8_uint.stencil_max
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_8.d24_unorm_s8_uint_separate_layouts.depth_none
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_8.d24_unorm_s8_uint_separate_layouts.stencil_none
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_8.d24_unorm_s8_uint_separate_layouts.depth_zero
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_8.d24_unorm_s8_uint_separate_layouts.stencil_zero
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_8.d24_unorm_s8_uint_separate_layouts.depth_average
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_8.d24_unorm_s8_uint_separate_layouts.depth_min
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_8.d24_unorm_s8_uint_separate_layouts.stencil_min
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_8.d24_unorm_s8_uint_separate_layouts.depth_max
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_8.d24_unorm_s8_uint_separate_layouts.stencil_max
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_8.d32_sfloat_s8_uint.depth_none
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_8.d32_sfloat_s8_uint.stencil_none
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_8.d32_sfloat_s8_uint.depth_zero
@@ -339169,6 +368665,15 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_8.d32_sfloat_
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_8.d32_sfloat_s8_uint.stencil_min
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_8.d32_sfloat_s8_uint.depth_max
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_8.d32_sfloat_s8_uint.stencil_max
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_none
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_8.d32_sfloat_s8_uint_separate_layouts.stencil_none
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_zero
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_8.d32_sfloat_s8_uint_separate_layouts.stencil_zero
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_average
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_min
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_8.d32_sfloat_s8_uint_separate_layouts.stencil_min
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_max
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_8.d32_sfloat_s8_uint_separate_layouts.stencil_max
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_16.d16_unorm.depth_none
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_16.d16_unorm.depth_zero
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_16.d16_unorm.depth_average
@@ -339197,6 +368702,15 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_16.d16_unorm_
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_16.d16_unorm_s8_uint.stencil_min
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_16.d16_unorm_s8_uint.depth_max
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_16.d16_unorm_s8_uint.stencil_max
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_16.d16_unorm_s8_uint_separate_layouts.depth_none
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_16.d16_unorm_s8_uint_separate_layouts.stencil_none
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_16.d16_unorm_s8_uint_separate_layouts.depth_zero
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_16.d16_unorm_s8_uint_separate_layouts.stencil_zero
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_16.d16_unorm_s8_uint_separate_layouts.depth_average
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_16.d16_unorm_s8_uint_separate_layouts.depth_min
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_16.d16_unorm_s8_uint_separate_layouts.stencil_min
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_16.d16_unorm_s8_uint_separate_layouts.depth_max
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_16.d16_unorm_s8_uint_separate_layouts.stencil_max
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_16.d24_unorm_s8_uint.depth_none
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_16.d24_unorm_s8_uint.stencil_none
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_16.d24_unorm_s8_uint.depth_zero
@@ -339206,6 +368720,15 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_16.d24_unorm_
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_16.d24_unorm_s8_uint.stencil_min
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_16.d24_unorm_s8_uint.depth_max
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_16.d24_unorm_s8_uint.stencil_max
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_16.d24_unorm_s8_uint_separate_layouts.depth_none
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_16.d24_unorm_s8_uint_separate_layouts.stencil_none
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_16.d24_unorm_s8_uint_separate_layouts.depth_zero
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_16.d24_unorm_s8_uint_separate_layouts.stencil_zero
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_16.d24_unorm_s8_uint_separate_layouts.depth_average
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_16.d24_unorm_s8_uint_separate_layouts.depth_min
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_16.d24_unorm_s8_uint_separate_layouts.stencil_min
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_16.d24_unorm_s8_uint_separate_layouts.depth_max
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_16.d24_unorm_s8_uint_separate_layouts.stencil_max
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_16.d32_sfloat_s8_uint.depth_none
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_16.d32_sfloat_s8_uint.stencil_none
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_16.d32_sfloat_s8_uint.depth_zero
@@ -339215,6 +368738,15 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_16.d32_sfloat
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_16.d32_sfloat_s8_uint.stencil_min
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_16.d32_sfloat_s8_uint.depth_max
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_16.d32_sfloat_s8_uint.stencil_max
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_none
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_16.d32_sfloat_s8_uint_separate_layouts.stencil_none
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_zero
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_16.d32_sfloat_s8_uint_separate_layouts.stencil_zero
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_average
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_min
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_16.d32_sfloat_s8_uint_separate_layouts.stencil_min
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_max
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_16.d32_sfloat_s8_uint_separate_layouts.stencil_max
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_32.d16_unorm.depth_none
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_32.d16_unorm.depth_zero
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_32.d16_unorm.depth_average
@@ -339243,6 +368775,15 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_32.d16_unorm_
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_32.d16_unorm_s8_uint.stencil_min
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_32.d16_unorm_s8_uint.depth_max
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_32.d16_unorm_s8_uint.stencil_max
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_32.d16_unorm_s8_uint_separate_layouts.depth_none
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_32.d16_unorm_s8_uint_separate_layouts.stencil_none
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_32.d16_unorm_s8_uint_separate_layouts.depth_zero
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_32.d16_unorm_s8_uint_separate_layouts.stencil_zero
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_32.d16_unorm_s8_uint_separate_layouts.depth_average
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_32.d16_unorm_s8_uint_separate_layouts.depth_min
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_32.d16_unorm_s8_uint_separate_layouts.stencil_min
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_32.d16_unorm_s8_uint_separate_layouts.depth_max
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_32.d16_unorm_s8_uint_separate_layouts.stencil_max
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_32.d24_unorm_s8_uint.depth_none
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_32.d24_unorm_s8_uint.stencil_none
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_32.d24_unorm_s8_uint.depth_zero
@@ -339252,6 +368793,15 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_32.d24_unorm_
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_32.d24_unorm_s8_uint.stencil_min
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_32.d24_unorm_s8_uint.depth_max
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_32.d24_unorm_s8_uint.stencil_max
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_32.d24_unorm_s8_uint_separate_layouts.depth_none
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_32.d24_unorm_s8_uint_separate_layouts.stencil_none
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_32.d24_unorm_s8_uint_separate_layouts.depth_zero
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_32.d24_unorm_s8_uint_separate_layouts.stencil_zero
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_32.d24_unorm_s8_uint_separate_layouts.depth_average
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_32.d24_unorm_s8_uint_separate_layouts.depth_min
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_32.d24_unorm_s8_uint_separate_layouts.stencil_min
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_32.d24_unorm_s8_uint_separate_layouts.depth_max
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_32.d24_unorm_s8_uint_separate_layouts.stencil_max
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_32.d32_sfloat_s8_uint.depth_none
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_32.d32_sfloat_s8_uint.stencil_none
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_32.d32_sfloat_s8_uint.depth_zero
@@ -339261,6 +368811,15 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_32.d32_sfloat
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_32.d32_sfloat_s8_uint.stencil_min
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_32.d32_sfloat_s8_uint.depth_max
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_32.d32_sfloat_s8_uint.stencil_max
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_none
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_32.d32_sfloat_s8_uint_separate_layouts.stencil_none
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_zero
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_32.d32_sfloat_s8_uint_separate_layouts.stencil_zero
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_average
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_min
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_32.d32_sfloat_s8_uint_separate_layouts.stencil_min
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_max
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_32.d32_sfloat_s8_uint_separate_layouts.stencil_max
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_64.d16_unorm.depth_none
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_64.d16_unorm.depth_zero
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_64.d16_unorm.depth_average
@@ -339289,6 +368848,15 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_64.d16_unorm_
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_64.d16_unorm_s8_uint.stencil_min
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_64.d16_unorm_s8_uint.depth_max
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_64.d16_unorm_s8_uint.stencil_max
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_64.d16_unorm_s8_uint_separate_layouts.depth_none
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_64.d16_unorm_s8_uint_separate_layouts.stencil_none
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_64.d16_unorm_s8_uint_separate_layouts.depth_zero
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_64.d16_unorm_s8_uint_separate_layouts.stencil_zero
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_64.d16_unorm_s8_uint_separate_layouts.depth_average
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_64.d16_unorm_s8_uint_separate_layouts.depth_min
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_64.d16_unorm_s8_uint_separate_layouts.stencil_min
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_64.d16_unorm_s8_uint_separate_layouts.depth_max
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_64.d16_unorm_s8_uint_separate_layouts.stencil_max
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_64.d24_unorm_s8_uint.depth_none
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_64.d24_unorm_s8_uint.stencil_none
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_64.d24_unorm_s8_uint.depth_zero
@@ -339298,6 +368866,15 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_64.d24_unorm_
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_64.d24_unorm_s8_uint.stencil_min
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_64.d24_unorm_s8_uint.depth_max
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_64.d24_unorm_s8_uint.stencil_max
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_64.d24_unorm_s8_uint_separate_layouts.depth_none
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_64.d24_unorm_s8_uint_separate_layouts.stencil_none
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_64.d24_unorm_s8_uint_separate_layouts.depth_zero
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_64.d24_unorm_s8_uint_separate_layouts.stencil_zero
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_64.d24_unorm_s8_uint_separate_layouts.depth_average
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_64.d24_unorm_s8_uint_separate_layouts.depth_min
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_64.d24_unorm_s8_uint_separate_layouts.stencil_min
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_64.d24_unorm_s8_uint_separate_layouts.depth_max
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_64.d24_unorm_s8_uint_separate_layouts.stencil_max
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_64.d32_sfloat_s8_uint.depth_none
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_64.d32_sfloat_s8_uint.stencil_none
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_64.d32_sfloat_s8_uint.depth_zero
@@ -339307,6 +368884,15 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_64.d32_sfloat
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_64.d32_sfloat_s8_uint.stencil_min
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_64.d32_sfloat_s8_uint.depth_max
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_64.d32_sfloat_s8_uint.stencil_max
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_none
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_64.d32_sfloat_s8_uint_separate_layouts.stencil_none
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_zero
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_64.d32_sfloat_s8_uint_separate_layouts.stencil_zero
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_average
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_min
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_64.d32_sfloat_s8_uint_separate_layouts.stencil_min
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_max
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_64.d32_sfloat_s8_uint_separate_layouts.stencil_max
 dEQP-VK.ubo.2_level_array.std140.float.vertex
 dEQP-VK.ubo.2_level_array.std140.float.fragment
 dEQP-VK.ubo.2_level_array.std140.float.both

diff --git a/external/vulkancts/framework/vulkan/vkBasicTypes.inl b/external/vulkancts/framework/vulkan/vkBasicTypes.inl
index 3f03a73..4fa4153 100644 (file)
--- a/external/vulkancts/framework/vulkan/vkBasicTypes.inl
+++ b/external/vulkancts/framework/vulkan/vkBasicTypes.inl
@@ -459,6 +459,9 @@ enum VkStructureType
        VK_STRUCTURE_TYPE_MEMORY_PRIORITY_ALLOCATE_INFO_EXT                                                                     = 1000238001,
        VK_STRUCTURE_TYPE_SURFACE_PROTECTED_CAPABILITIES_KHR                                                            = 1000239000,
        VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_DEDICATED_ALLOCATION_IMAGE_ALIASING_FEATURES_NV       = 1000240000,
+       VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_SEPARATE_DEPTH_STENCIL_LAYOUTS_FEATURES_KHR           = 1000241000,
+       VK_STRUCTURE_TYPE_ATTACHMENT_REFERENCE_STENCIL_LAYOUT_KHR                                                       = 1000241001,
+       VK_STRUCTURE_TYPE_ATTACHMENT_DESCRIPTION_STENCIL_LAYOUT_KHR                                                     = 1000241002,
        VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_BUFFER_DEVICE_ADDRESS_FEATURES_EXT                            = 1000244000,
        VK_STRUCTURE_TYPE_BUFFER_DEVICE_ADDRESS_INFO_EXT                                                                        = 1000244001,
        VK_STRUCTURE_TYPE_BUFFER_DEVICE_ADDRESS_CREATE_INFO_EXT                                                         = 1000244002,
@@ -922,6 +925,10 @@ enum VkImageLayout
        VK_IMAGE_LAYOUT_SHARED_PRESENT_KHR                                                              = 1000111000,
        VK_IMAGE_LAYOUT_SHADING_RATE_OPTIMAL_NV                                                 = 1000164003,
        VK_IMAGE_LAYOUT_FRAGMENT_DENSITY_MAP_OPTIMAL_EXT                                = 1000218000,
+       VK_IMAGE_LAYOUT_DEPTH_ATTACHMENT_OPTIMAL_KHR                                    = 1000241000,
+       VK_IMAGE_LAYOUT_DEPTH_READ_ONLY_OPTIMAL_KHR                                             = 1000241001,
+       VK_IMAGE_LAYOUT_STENCIL_ATTACHMENT_OPTIMAL_KHR                                  = 1000241002,
+       VK_IMAGE_LAYOUT_STENCIL_READ_ONLY_OPTIMAL_KHR                                   = 1000241003,
        VK_IMAGE_LAYOUT_DEPTH_READ_ONLY_STENCIL_ATTACHMENT_OPTIMAL_KHR  = VK_IMAGE_LAYOUT_DEPTH_READ_ONLY_STENCIL_ATTACHMENT_OPTIMAL,
        VK_IMAGE_LAYOUT_DEPTH_ATTACHMENT_STENCIL_READ_ONLY_OPTIMAL_KHR  = VK_IMAGE_LAYOUT_DEPTH_ATTACHMENT_STENCIL_READ_ONLY_OPTIMAL,
        VK_IMAGE_LAYOUT_MAX_ENUM                                                                                = 0x7FFFFFFF,
@@ -2888,6 +2895,7 @@ VK_DEFINE_PLATFORM_TYPE(CAMetalLayer,                             void*);
 #define VK_KHR_VULKAN_MEMORY_MODEL_SPEC_VERSION 3
 #define VK_KHR_SPIRV_1_4_SPEC_VERSION 1
 #define VK_KHR_SURFACE_PROTECTED_CAPABILITIES_SPEC_VERSION 1
+#define VK_KHR_SEPARATE_DEPTH_STENCIL_LAYOUTS_SPEC_VERSION 1
 #define VK_KHR_UNIFORM_BUFFER_STANDARD_LAYOUT_SPEC_VERSION 1
 #define VK_KHR_PIPELINE_EXECUTABLE_PROPERTIES_SPEC_VERSION 1
 #define VK_EXT_DEBUG_REPORT_SPEC_VERSION 9

diff --git a/external/vulkancts/framework/vulkan/vkDeviceExtensions.inl b/external/vulkancts/framework/vulkan/vkDeviceExtensions.inl
index 95540d6..beb4f8d 100644 (file)
--- a/external/vulkancts/framework/vulkan/vkDeviceExtensions.inl
+++ b/external/vulkancts/framework/vulkan/vkDeviceExtensions.inl
@@ -52,5 +52,6 @@ static const char* s_allowedDeviceKhrExtensions[] =
        "VK_KHR_shader_clock",
        "VK_KHR_spirv_1_4",
        "VK_KHR_shader_subgroup_extended_types",
+       "VK_KHR_separate_depth_stencil_layouts",
 };
 

diff --git a/external/vulkancts/framework/vulkan/vkDeviceFeatures.inl b/external/vulkancts/framework/vulkan/vkDeviceFeatures.inl
index 00161a8..acf163f 100644 (file)
--- a/external/vulkancts/framework/vulkan/vkDeviceFeatures.inl
+++ b/external/vulkancts/framework/vulkan/vkDeviceFeatures.inl
@@ -35,6 +35,7 @@ namespace vk
 #define VK_NV_REPRESENTATIVE_FRAGMENT_TEST_EXTENSION_NAME "VK_NV_representative_fragment_test"
 #define VK_KHR_SAMPLER_YCBCR_CONVERSION_EXTENSION_NAME "VK_KHR_sampler_ycbcr_conversion"
 #define VK_EXT_SCALAR_BLOCK_LAYOUT_EXTENSION_NAME "VK_EXT_scalar_block_layout"
+#define VK_KHR_SEPARATE_DEPTH_STENCIL_LAYOUTS_EXTENSION_NAME "VK_KHR_separate_depth_stencil_layouts"
 #define VK_KHR_SHADER_ATOMIC_INT64_EXTENSION_NAME "VK_KHR_shader_atomic_int64"
 #define VK_KHR_SHADER_CLOCK_EXTENSION_NAME "VK_KHR_shader_clock"
 #define VK_EXT_SHADER_DEMOTE_TO_HELPER_INVOCATION_EXTENSION_NAME "VK_EXT_shader_demote_to_helper_invocation"
@@ -55,36 +56,37 @@ namespace vk
 #define VK_EXT_YCBCR_IMAGE_ARRAYS_EXTENSION_NAME "VK_EXT_ycbcr_image_arrays"
 
 
-template<> FeatureDesc makeFeatureDesc<VkPhysicalDevice16BitStorageFeatures>(void) { return FeatureDesc(VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_16BIT_STORAGE_FEATURES, VK_KHR_16BIT_STORAGE_EXTENSION_NAME, VK_KHR_16BIT_STORAGE_SPEC_VERSION, 48); }
-template<> FeatureDesc makeFeatureDesc<VkPhysicalDevice8BitStorageFeaturesKHR>(void) { return FeatureDesc(VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_8BIT_STORAGE_FEATURES_KHR, VK_KHR_8BIT_STORAGE_EXTENSION_NAME, VK_KHR_8BIT_STORAGE_SPEC_VERSION, 47); }
-template<> FeatureDesc makeFeatureDesc<VkPhysicalDeviceBlendOperationAdvancedFeaturesEXT>(void) { return FeatureDesc(VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_BLEND_OPERATION_ADVANCED_FEATURES_EXT, VK_EXT_BLEND_OPERATION_ADVANCED_EXTENSION_NAME, VK_EXT_BLEND_OPERATION_ADVANCED_SPEC_VERSION, 46); }
-template<> FeatureDesc makeFeatureDesc<VkPhysicalDeviceBufferDeviceAddressFeaturesEXT>(void) { return FeatureDesc(VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_BUFFER_DEVICE_ADDRESS_FEATURES_EXT, VK_EXT_BUFFER_DEVICE_ADDRESS_EXTENSION_NAME, VK_EXT_BUFFER_DEVICE_ADDRESS_SPEC_VERSION, 45); }
-template<> FeatureDesc makeFeatureDesc<VkPhysicalDeviceCoherentMemoryFeaturesAMD>(void) { return FeatureDesc(VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_COHERENT_MEMORY_FEATURES_AMD, DECL_AMD_COHERENT_MEMORY_EXTENSION_NAME, 0, 44); }
-template<> FeatureDesc makeFeatureDesc<VkPhysicalDeviceComputeShaderDerivativesFeaturesNV>(void) { return FeatureDesc(VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_COMPUTE_SHADER_DERIVATIVES_FEATURES_NV, VK_NV_COMPUTE_SHADER_DERIVATIVES_EXTENSION_NAME, VK_NV_COMPUTE_SHADER_DERIVATIVES_SPEC_VERSION, 43); }
-template<> FeatureDesc makeFeatureDesc<VkPhysicalDeviceConditionalRenderingFeaturesEXT>(void) { return FeatureDesc(VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_CONDITIONAL_RENDERING_FEATURES_EXT, VK_EXT_CONDITIONAL_RENDERING_EXTENSION_NAME, VK_EXT_CONDITIONAL_RENDERING_SPEC_VERSION, 42); }
-template<> FeatureDesc makeFeatureDesc<VkPhysicalDeviceCooperativeMatrixFeaturesNV>(void) { return FeatureDesc(VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_COOPERATIVE_MATRIX_FEATURES_NV, VK_NV_COOPERATIVE_MATRIX_EXTENSION_NAME, VK_NV_COOPERATIVE_MATRIX_SPEC_VERSION, 41); }
-template<> FeatureDesc makeFeatureDesc<VkPhysicalDeviceCornerSampledImageFeaturesNV>(void) { return FeatureDesc(VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_CORNER_SAMPLED_IMAGE_FEATURES_NV, VK_NV_CORNER_SAMPLED_IMAGE_EXTENSION_NAME, VK_NV_CORNER_SAMPLED_IMAGE_SPEC_VERSION, 40); }
-template<> FeatureDesc makeFeatureDesc<VkPhysicalDeviceCoverageReductionModeFeaturesNV>(void) { return FeatureDesc(VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_COVERAGE_REDUCTION_MODE_FEATURES_NV, VK_NV_COVERAGE_REDUCTION_MODE_EXTENSION_NAME, VK_NV_COVERAGE_REDUCTION_MODE_SPEC_VERSION, 39); }
-template<> FeatureDesc makeFeatureDesc<VkPhysicalDeviceDedicatedAllocationImageAliasingFeaturesNV>(void) { return FeatureDesc(VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_DEDICATED_ALLOCATION_IMAGE_ALIASING_FEATURES_NV, VK_NV_DEDICATED_ALLOCATION_IMAGE_ALIASING_EXTENSION_NAME, VK_NV_DEDICATED_ALLOCATION_IMAGE_ALIASING_SPEC_VERSION, 38); }
-template<> FeatureDesc makeFeatureDesc<VkPhysicalDeviceDepthClipEnableFeaturesEXT>(void) { return FeatureDesc(VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_DEPTH_CLIP_ENABLE_FEATURES_EXT, VK_EXT_DEPTH_CLIP_ENABLE_EXTENSION_NAME, VK_EXT_DEPTH_CLIP_ENABLE_SPEC_VERSION, 37); }
-template<> FeatureDesc makeFeatureDesc<VkPhysicalDeviceDescriptorIndexingFeaturesEXT>(void) { return FeatureDesc(VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_DESCRIPTOR_INDEXING_FEATURES_EXT, VK_EXT_DESCRIPTOR_INDEXING_EXTENSION_NAME, VK_EXT_DESCRIPTOR_INDEXING_SPEC_VERSION, 36); }
-template<> FeatureDesc makeFeatureDesc<VkPhysicalDeviceExclusiveScissorFeaturesNV>(void) { return FeatureDesc(VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_EXCLUSIVE_SCISSOR_FEATURES_NV, VK_NV_SCISSOR_EXCLUSIVE_EXTENSION_NAME, VK_NV_SCISSOR_EXCLUSIVE_SPEC_VERSION, 35); }
-template<> FeatureDesc makeFeatureDesc<VkPhysicalDeviceFragmentDensityMapFeaturesEXT>(void) { return FeatureDesc(VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_FRAGMENT_DENSITY_MAP_FEATURES_EXT, VK_EXT_FRAGMENT_DENSITY_MAP_EXTENSION_NAME, VK_EXT_FRAGMENT_DENSITY_MAP_SPEC_VERSION, 34); }
-template<> FeatureDesc makeFeatureDesc<VkPhysicalDeviceFragmentShaderBarycentricFeaturesNV>(void) { return FeatureDesc(VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_FRAGMENT_SHADER_BARYCENTRIC_FEATURES_NV, VK_NV_FRAGMENT_SHADER_BARYCENTRIC_EXTENSION_NAME, VK_NV_FRAGMENT_SHADER_BARYCENTRIC_SPEC_VERSION, 33); }
-template<> FeatureDesc makeFeatureDesc<VkPhysicalDeviceFragmentShaderInterlockFeaturesEXT>(void) { return FeatureDesc(VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_FRAGMENT_SHADER_INTERLOCK_FEATURES_EXT, VK_EXT_FRAGMENT_SHADER_INTERLOCK_EXTENSION_NAME, VK_EXT_FRAGMENT_SHADER_INTERLOCK_SPEC_VERSION, 32); }
-template<> FeatureDesc makeFeatureDesc<VkPhysicalDeviceHostQueryResetFeaturesEXT>(void) { return FeatureDesc(VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_HOST_QUERY_RESET_FEATURES_EXT, VK_EXT_HOST_QUERY_RESET_EXTENSION_NAME, VK_EXT_HOST_QUERY_RESET_SPEC_VERSION, 31); }
-template<> FeatureDesc makeFeatureDesc<VkPhysicalDeviceImagelessFramebufferFeaturesKHR>(void) { return FeatureDesc(VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_IMAGELESS_FRAMEBUFFER_FEATURES_KHR, VK_KHR_IMAGELESS_FRAMEBUFFER_EXTENSION_NAME, VK_KHR_IMAGELESS_FRAMEBUFFER_SPEC_VERSION, 30); }
-template<> FeatureDesc makeFeatureDesc<VkPhysicalDeviceIndexTypeUint8FeaturesEXT>(void) { return FeatureDesc(VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_INDEX_TYPE_UINT8_FEATURES_EXT, VK_EXT_INDEX_TYPE_UINT8_EXTENSION_NAME, VK_EXT_INDEX_TYPE_UINT8_SPEC_VERSION, 29); }
-template<> FeatureDesc makeFeatureDesc<VkPhysicalDeviceInlineUniformBlockFeaturesEXT>(void) { return FeatureDesc(VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_INLINE_UNIFORM_BLOCK_FEATURES_EXT, VK_EXT_INLINE_UNIFORM_BLOCK_EXTENSION_NAME, VK_EXT_INLINE_UNIFORM_BLOCK_SPEC_VERSION, 28); }
-template<> FeatureDesc makeFeatureDesc<VkPhysicalDeviceLineRasterizationFeaturesEXT>(void) { return FeatureDesc(VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_LINE_RASTERIZATION_FEATURES_EXT, VK_EXT_LINE_RASTERIZATION_EXTENSION_NAME, VK_EXT_LINE_RASTERIZATION_SPEC_VERSION, 27); }
-template<> FeatureDesc makeFeatureDesc<VkPhysicalDeviceMemoryPriorityFeaturesEXT>(void) { return FeatureDesc(VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_MEMORY_PRIORITY_FEATURES_EXT, VK_EXT_MEMORY_PRIORITY_EXTENSION_NAME, VK_EXT_MEMORY_PRIORITY_SPEC_VERSION, 26); }
-template<> FeatureDesc makeFeatureDesc<VkPhysicalDeviceMeshShaderFeaturesNV>(void) { return FeatureDesc(VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_MESH_SHADER_FEATURES_NV, VK_NV_MESH_SHADER_EXTENSION_NAME, VK_NV_MESH_SHADER_SPEC_VERSION, 25); }
-template<> FeatureDesc makeFeatureDesc<VkPhysicalDeviceMultiviewFeatures>(void) { return FeatureDesc(VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_MULTIVIEW_FEATURES, VK_KHR_MULTIVIEW_EXTENSION_NAME, VK_KHR_MULTIVIEW_SPEC_VERSION, 24); }
-template<> FeatureDesc makeFeatureDesc<VkPhysicalDevicePipelineExecutablePropertiesFeaturesKHR>(void) { return FeatureDesc(VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_PIPELINE_EXECUTABLE_PROPERTIES_FEATURES_KHR, VK_KHR_PIPELINE_EXECUTABLE_PROPERTIES_EXTENSION_NAME, VK_KHR_PIPELINE_EXECUTABLE_PROPERTIES_SPEC_VERSION, 23); }
-template<> FeatureDesc makeFeatureDesc<VkPhysicalDeviceProtectedMemoryFeatures>(void) { return FeatureDesc(VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_PROTECTED_MEMORY_FEATURES, DECL_PROTECTED_MEMORY_EXTENSION_NAME, 0, 22); }
-template<> FeatureDesc makeFeatureDesc<VkPhysicalDeviceRepresentativeFragmentTestFeaturesNV>(void) { return FeatureDesc(VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_REPRESENTATIVE_FRAGMENT_TEST_FEATURES_NV, VK_NV_REPRESENTATIVE_FRAGMENT_TEST_EXTENSION_NAME, VK_NV_REPRESENTATIVE_FRAGMENT_TEST_SPEC_VERSION, 21); }
-template<> FeatureDesc makeFeatureDesc<VkPhysicalDeviceSamplerYcbcrConversionFeatures>(void) { return FeatureDesc(VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_SAMPLER_YCBCR_CONVERSION_FEATURES, VK_KHR_SAMPLER_YCBCR_CONVERSION_EXTENSION_NAME, VK_KHR_SAMPLER_YCBCR_CONVERSION_SPEC_VERSION, 20); }
-template<> FeatureDesc makeFeatureDesc<VkPhysicalDeviceScalarBlockLayoutFeaturesEXT>(void) { return FeatureDesc(VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_SCALAR_BLOCK_LAYOUT_FEATURES_EXT, VK_EXT_SCALAR_BLOCK_LAYOUT_EXTENSION_NAME, VK_EXT_SCALAR_BLOCK_LAYOUT_SPEC_VERSION, 19); }
+template<> FeatureDesc makeFeatureDesc<VkPhysicalDevice16BitStorageFeatures>(void) { return FeatureDesc(VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_16BIT_STORAGE_FEATURES, VK_KHR_16BIT_STORAGE_EXTENSION_NAME, VK_KHR_16BIT_STORAGE_SPEC_VERSION, 49); }
+template<> FeatureDesc makeFeatureDesc<VkPhysicalDevice8BitStorageFeaturesKHR>(void) { return FeatureDesc(VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_8BIT_STORAGE_FEATURES_KHR, VK_KHR_8BIT_STORAGE_EXTENSION_NAME, VK_KHR_8BIT_STORAGE_SPEC_VERSION, 48); }
+template<> FeatureDesc makeFeatureDesc<VkPhysicalDeviceBlendOperationAdvancedFeaturesEXT>(void) { return FeatureDesc(VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_BLEND_OPERATION_ADVANCED_FEATURES_EXT, VK_EXT_BLEND_OPERATION_ADVANCED_EXTENSION_NAME, VK_EXT_BLEND_OPERATION_ADVANCED_SPEC_VERSION, 47); }
+template<> FeatureDesc makeFeatureDesc<VkPhysicalDeviceBufferDeviceAddressFeaturesEXT>(void) { return FeatureDesc(VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_BUFFER_DEVICE_ADDRESS_FEATURES_EXT, VK_EXT_BUFFER_DEVICE_ADDRESS_EXTENSION_NAME, VK_EXT_BUFFER_DEVICE_ADDRESS_SPEC_VERSION, 46); }
+template<> FeatureDesc makeFeatureDesc<VkPhysicalDeviceCoherentMemoryFeaturesAMD>(void) { return FeatureDesc(VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_COHERENT_MEMORY_FEATURES_AMD, DECL_AMD_COHERENT_MEMORY_EXTENSION_NAME, 0, 45); }
+template<> FeatureDesc makeFeatureDesc<VkPhysicalDeviceComputeShaderDerivativesFeaturesNV>(void) { return FeatureDesc(VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_COMPUTE_SHADER_DERIVATIVES_FEATURES_NV, VK_NV_COMPUTE_SHADER_DERIVATIVES_EXTENSION_NAME, VK_NV_COMPUTE_SHADER_DERIVATIVES_SPEC_VERSION, 44); }
+template<> FeatureDesc makeFeatureDesc<VkPhysicalDeviceConditionalRenderingFeaturesEXT>(void) { return FeatureDesc(VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_CONDITIONAL_RENDERING_FEATURES_EXT, VK_EXT_CONDITIONAL_RENDERING_EXTENSION_NAME, VK_EXT_CONDITIONAL_RENDERING_SPEC_VERSION, 43); }
+template<> FeatureDesc makeFeatureDesc<VkPhysicalDeviceCooperativeMatrixFeaturesNV>(void) { return FeatureDesc(VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_COOPERATIVE_MATRIX_FEATURES_NV, VK_NV_COOPERATIVE_MATRIX_EXTENSION_NAME, VK_NV_COOPERATIVE_MATRIX_SPEC_VERSION, 42); }
+template<> FeatureDesc makeFeatureDesc<VkPhysicalDeviceCornerSampledImageFeaturesNV>(void) { return FeatureDesc(VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_CORNER_SAMPLED_IMAGE_FEATURES_NV, VK_NV_CORNER_SAMPLED_IMAGE_EXTENSION_NAME, VK_NV_CORNER_SAMPLED_IMAGE_SPEC_VERSION, 41); }
+template<> FeatureDesc makeFeatureDesc<VkPhysicalDeviceCoverageReductionModeFeaturesNV>(void) { return FeatureDesc(VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_COVERAGE_REDUCTION_MODE_FEATURES_NV, VK_NV_COVERAGE_REDUCTION_MODE_EXTENSION_NAME, VK_NV_COVERAGE_REDUCTION_MODE_SPEC_VERSION, 40); }
+template<> FeatureDesc makeFeatureDesc<VkPhysicalDeviceDedicatedAllocationImageAliasingFeaturesNV>(void) { return FeatureDesc(VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_DEDICATED_ALLOCATION_IMAGE_ALIASING_FEATURES_NV, VK_NV_DEDICATED_ALLOCATION_IMAGE_ALIASING_EXTENSION_NAME, VK_NV_DEDICATED_ALLOCATION_IMAGE_ALIASING_SPEC_VERSION, 39); }
+template<> FeatureDesc makeFeatureDesc<VkPhysicalDeviceDepthClipEnableFeaturesEXT>(void) { return FeatureDesc(VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_DEPTH_CLIP_ENABLE_FEATURES_EXT, VK_EXT_DEPTH_CLIP_ENABLE_EXTENSION_NAME, VK_EXT_DEPTH_CLIP_ENABLE_SPEC_VERSION, 38); }
+template<> FeatureDesc makeFeatureDesc<VkPhysicalDeviceDescriptorIndexingFeaturesEXT>(void) { return FeatureDesc(VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_DESCRIPTOR_INDEXING_FEATURES_EXT, VK_EXT_DESCRIPTOR_INDEXING_EXTENSION_NAME, VK_EXT_DESCRIPTOR_INDEXING_SPEC_VERSION, 37); }
+template<> FeatureDesc makeFeatureDesc<VkPhysicalDeviceExclusiveScissorFeaturesNV>(void) { return FeatureDesc(VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_EXCLUSIVE_SCISSOR_FEATURES_NV, VK_NV_SCISSOR_EXCLUSIVE_EXTENSION_NAME, VK_NV_SCISSOR_EXCLUSIVE_SPEC_VERSION, 36); }
+template<> FeatureDesc makeFeatureDesc<VkPhysicalDeviceFragmentDensityMapFeaturesEXT>(void) { return FeatureDesc(VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_FRAGMENT_DENSITY_MAP_FEATURES_EXT, VK_EXT_FRAGMENT_DENSITY_MAP_EXTENSION_NAME, VK_EXT_FRAGMENT_DENSITY_MAP_SPEC_VERSION, 35); }
+template<> FeatureDesc makeFeatureDesc<VkPhysicalDeviceFragmentShaderBarycentricFeaturesNV>(void) { return FeatureDesc(VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_FRAGMENT_SHADER_BARYCENTRIC_FEATURES_NV, VK_NV_FRAGMENT_SHADER_BARYCENTRIC_EXTENSION_NAME, VK_NV_FRAGMENT_SHADER_BARYCENTRIC_SPEC_VERSION, 34); }
+template<> FeatureDesc makeFeatureDesc<VkPhysicalDeviceFragmentShaderInterlockFeaturesEXT>(void) { return FeatureDesc(VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_FRAGMENT_SHADER_INTERLOCK_FEATURES_EXT, VK_EXT_FRAGMENT_SHADER_INTERLOCK_EXTENSION_NAME, VK_EXT_FRAGMENT_SHADER_INTERLOCK_SPEC_VERSION, 33); }
+template<> FeatureDesc makeFeatureDesc<VkPhysicalDeviceHostQueryResetFeaturesEXT>(void) { return FeatureDesc(VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_HOST_QUERY_RESET_FEATURES_EXT, VK_EXT_HOST_QUERY_RESET_EXTENSION_NAME, VK_EXT_HOST_QUERY_RESET_SPEC_VERSION, 32); }
+template<> FeatureDesc makeFeatureDesc<VkPhysicalDeviceImagelessFramebufferFeaturesKHR>(void) { return FeatureDesc(VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_IMAGELESS_FRAMEBUFFER_FEATURES_KHR, VK_KHR_IMAGELESS_FRAMEBUFFER_EXTENSION_NAME, VK_KHR_IMAGELESS_FRAMEBUFFER_SPEC_VERSION, 31); }
+template<> FeatureDesc makeFeatureDesc<VkPhysicalDeviceIndexTypeUint8FeaturesEXT>(void) { return FeatureDesc(VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_INDEX_TYPE_UINT8_FEATURES_EXT, VK_EXT_INDEX_TYPE_UINT8_EXTENSION_NAME, VK_EXT_INDEX_TYPE_UINT8_SPEC_VERSION, 30); }
+template<> FeatureDesc makeFeatureDesc<VkPhysicalDeviceInlineUniformBlockFeaturesEXT>(void) { return FeatureDesc(VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_INLINE_UNIFORM_BLOCK_FEATURES_EXT, VK_EXT_INLINE_UNIFORM_BLOCK_EXTENSION_NAME, VK_EXT_INLINE_UNIFORM_BLOCK_SPEC_VERSION, 29); }
+template<> FeatureDesc makeFeatureDesc<VkPhysicalDeviceLineRasterizationFeaturesEXT>(void) { return FeatureDesc(VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_LINE_RASTERIZATION_FEATURES_EXT, VK_EXT_LINE_RASTERIZATION_EXTENSION_NAME, VK_EXT_LINE_RASTERIZATION_SPEC_VERSION, 28); }
+template<> FeatureDesc makeFeatureDesc<VkPhysicalDeviceMemoryPriorityFeaturesEXT>(void) { return FeatureDesc(VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_MEMORY_PRIORITY_FEATURES_EXT, VK_EXT_MEMORY_PRIORITY_EXTENSION_NAME, VK_EXT_MEMORY_PRIORITY_SPEC_VERSION, 27); }
+template<> FeatureDesc makeFeatureDesc<VkPhysicalDeviceMeshShaderFeaturesNV>(void) { return FeatureDesc(VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_MESH_SHADER_FEATURES_NV, VK_NV_MESH_SHADER_EXTENSION_NAME, VK_NV_MESH_SHADER_SPEC_VERSION, 26); }
+template<> FeatureDesc makeFeatureDesc<VkPhysicalDeviceMultiviewFeatures>(void) { return FeatureDesc(VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_MULTIVIEW_FEATURES, VK_KHR_MULTIVIEW_EXTENSION_NAME, VK_KHR_MULTIVIEW_SPEC_VERSION, 25); }
+template<> FeatureDesc makeFeatureDesc<VkPhysicalDevicePipelineExecutablePropertiesFeaturesKHR>(void) { return FeatureDesc(VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_PIPELINE_EXECUTABLE_PROPERTIES_FEATURES_KHR, VK_KHR_PIPELINE_EXECUTABLE_PROPERTIES_EXTENSION_NAME, VK_KHR_PIPELINE_EXECUTABLE_PROPERTIES_SPEC_VERSION, 24); }
+template<> FeatureDesc makeFeatureDesc<VkPhysicalDeviceProtectedMemoryFeatures>(void) { return FeatureDesc(VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_PROTECTED_MEMORY_FEATURES, DECL_PROTECTED_MEMORY_EXTENSION_NAME, 0, 23); }
+template<> FeatureDesc makeFeatureDesc<VkPhysicalDeviceRepresentativeFragmentTestFeaturesNV>(void) { return FeatureDesc(VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_REPRESENTATIVE_FRAGMENT_TEST_FEATURES_NV, VK_NV_REPRESENTATIVE_FRAGMENT_TEST_EXTENSION_NAME, VK_NV_REPRESENTATIVE_FRAGMENT_TEST_SPEC_VERSION, 22); }
+template<> FeatureDesc makeFeatureDesc<VkPhysicalDeviceSamplerYcbcrConversionFeatures>(void) { return FeatureDesc(VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_SAMPLER_YCBCR_CONVERSION_FEATURES, VK_KHR_SAMPLER_YCBCR_CONVERSION_EXTENSION_NAME, VK_KHR_SAMPLER_YCBCR_CONVERSION_SPEC_VERSION, 21); }
+template<> FeatureDesc makeFeatureDesc<VkPhysicalDeviceScalarBlockLayoutFeaturesEXT>(void) { return FeatureDesc(VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_SCALAR_BLOCK_LAYOUT_FEATURES_EXT, VK_EXT_SCALAR_BLOCK_LAYOUT_EXTENSION_NAME, VK_EXT_SCALAR_BLOCK_LAYOUT_SPEC_VERSION, 20); }
+template<> FeatureDesc makeFeatureDesc<VkPhysicalDeviceSeparateDepthStencilLayoutsFeaturesKHR>(void) { return FeatureDesc(VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_SEPARATE_DEPTH_STENCIL_LAYOUTS_FEATURES_KHR, VK_KHR_SEPARATE_DEPTH_STENCIL_LAYOUTS_EXTENSION_NAME, VK_KHR_SEPARATE_DEPTH_STENCIL_LAYOUTS_SPEC_VERSION, 19); }
 template<> FeatureDesc makeFeatureDesc<VkPhysicalDeviceShaderAtomicInt64FeaturesKHR>(void) { return FeatureDesc(VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_SHADER_ATOMIC_INT64_FEATURES_KHR, VK_KHR_SHADER_ATOMIC_INT64_EXTENSION_NAME, VK_KHR_SHADER_ATOMIC_INT64_SPEC_VERSION, 18); }
 template<> FeatureDesc makeFeatureDesc<VkPhysicalDeviceShaderClockFeaturesKHR>(void) { return FeatureDesc(VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_SHADER_CLOCK_FEATURES_KHR, VK_KHR_SHADER_CLOCK_EXTENSION_NAME, VK_KHR_SHADER_CLOCK_SPEC_VERSION, 17); }
 template<> FeatureDesc makeFeatureDesc<VkPhysicalDeviceShaderDemoteToHelperInvocationFeaturesEXT>(void) { return FeatureDesc(VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_SHADER_DEMOTE_TO_HELPER_INVOCATION_FEATURES_EXT, VK_EXT_SHADER_DEMOTE_TO_HELPER_INVOCATION_EXTENSION_NAME, VK_EXT_SHADER_DEMOTE_TO_HELPER_INVOCATION_SPEC_VERSION, 16); }
@@ -137,6 +139,7 @@ static const FeatureStructMapItem featureStructCreatorMap[] =
        { createFeatureStructWrapper<VkPhysicalDeviceRepresentativeFragmentTestFeaturesNV>, VK_NV_REPRESENTATIVE_FRAGMENT_TEST_EXTENSION_NAME, VK_NV_REPRESENTATIVE_FRAGMENT_TEST_SPEC_VERSION },
        { createFeatureStructWrapper<VkPhysicalDeviceSamplerYcbcrConversionFeatures>, VK_KHR_SAMPLER_YCBCR_CONVERSION_EXTENSION_NAME, VK_KHR_SAMPLER_YCBCR_CONVERSION_SPEC_VERSION },
        { createFeatureStructWrapper<VkPhysicalDeviceScalarBlockLayoutFeaturesEXT>, VK_EXT_SCALAR_BLOCK_LAYOUT_EXTENSION_NAME, VK_EXT_SCALAR_BLOCK_LAYOUT_SPEC_VERSION },
+       { createFeatureStructWrapper<VkPhysicalDeviceSeparateDepthStencilLayoutsFeaturesKHR>, VK_KHR_SEPARATE_DEPTH_STENCIL_LAYOUTS_EXTENSION_NAME, VK_KHR_SEPARATE_DEPTH_STENCIL_LAYOUTS_SPEC_VERSION },
        { createFeatureStructWrapper<VkPhysicalDeviceShaderAtomicInt64FeaturesKHR>, VK_KHR_SHADER_ATOMIC_INT64_EXTENSION_NAME, VK_KHR_SHADER_ATOMIC_INT64_SPEC_VERSION },
        { createFeatureStructWrapper<VkPhysicalDeviceShaderClockFeaturesKHR>, VK_KHR_SHADER_CLOCK_EXTENSION_NAME, VK_KHR_SHADER_CLOCK_SPEC_VERSION },
        { createFeatureStructWrapper<VkPhysicalDeviceShaderDemoteToHelperInvocationFeaturesEXT>, VK_EXT_SHADER_DEMOTE_TO_HELPER_INVOCATION_EXTENSION_NAME, VK_EXT_SHADER_DEMOTE_TO_HELPER_INVOCATION_SPEC_VERSION },

diff --git a/external/vulkancts/framework/vulkan/vkDeviceFeaturesForContextDecl.inl b/external/vulkancts/framework/vulkan/vkDeviceFeaturesForContextDecl.inl
index a75d92d..4fcb921 100644 (file)
--- a/external/vulkancts/framework/vulkan/vkDeviceFeaturesForContextDecl.inl
+++ b/external/vulkancts/framework/vulkan/vkDeviceFeaturesForContextDecl.inl
@@ -31,6 +31,7 @@ const vk::VkPhysicalDeviceProtectedMemoryFeatures&                                            getProtectedMemoryFeatur
 const vk::VkPhysicalDeviceRepresentativeFragmentTestFeaturesNV&                        getRepresentativeFragmentTestFeatures           (void) const;
 const vk::VkPhysicalDeviceSamplerYcbcrConversionFeatures&                              getSamplerYcbcrConversionFeatures                       (void) const;
 const vk::VkPhysicalDeviceScalarBlockLayoutFeaturesEXT&                                        getScalarBlockLayoutFeatures                            (void) const;
+const vk::VkPhysicalDeviceSeparateDepthStencilLayoutsFeaturesKHR&              getSeparateDepthStencilLayoutsFeatures          (void) const;
 const vk::VkPhysicalDeviceShaderAtomicInt64FeaturesKHR&                                        getShaderAtomicInt64Features                            (void) const;
 const vk::VkPhysicalDeviceShaderClockFeaturesKHR&                                              getShaderClockFeatures                                          (void) const;
 const vk::VkPhysicalDeviceShaderDemoteToHelperInvocationFeaturesEXT&   getShaderDemoteToHelperInvocationFeatures       (void) const;

diff --git a/external/vulkancts/framework/vulkan/vkDeviceFeaturesForContextDefs.inl b/external/vulkancts/framework/vulkan/vkDeviceFeaturesForContextDefs.inl
index 2d07873..d2c30e1 100644 (file)
--- a/external/vulkancts/framework/vulkan/vkDeviceFeaturesForContextDefs.inl
+++ b/external/vulkancts/framework/vulkan/vkDeviceFeaturesForContextDefs.inl
@@ -31,6 +31,7 @@ const vk::VkPhysicalDeviceProtectedMemoryFeatures&                                            Context::getProtectedMem
 const vk::VkPhysicalDeviceRepresentativeFragmentTestFeaturesNV&                        Context::getRepresentativeFragmentTestFeatures                  (void) const { return m_device->getRepresentativeFragmentTestFeatures();                }
 const vk::VkPhysicalDeviceSamplerYcbcrConversionFeatures&                              Context::getSamplerYcbcrConversionFeatures                              (void) const { return m_device->getSamplerYcbcrConversionFeatures();                    }
 const vk::VkPhysicalDeviceScalarBlockLayoutFeaturesEXT&                                        Context::getScalarBlockLayoutFeatures                                   (void) const { return m_device->getScalarBlockLayoutFeatures();                                 }
+const vk::VkPhysicalDeviceSeparateDepthStencilLayoutsFeaturesKHR&              Context::getSeparateDepthStencilLayoutsFeatures                 (void) const { return m_device->getSeparateDepthStencilLayoutsFeatures();               }
 const vk::VkPhysicalDeviceShaderAtomicInt64FeaturesKHR&                                        Context::getShaderAtomicInt64Features                                   (void) const { return m_device->getShaderAtomicInt64Features();                                 }
 const vk::VkPhysicalDeviceShaderClockFeaturesKHR&                                              Context::getShaderClockFeatures                                                 (void) const { return m_device->getShaderClockFeatures();                                               }
 const vk::VkPhysicalDeviceShaderDemoteToHelperInvocationFeaturesEXT&   Context::getShaderDemoteToHelperInvocationFeatures              (void) const { return m_device->getShaderDemoteToHelperInvocationFeatures();    }

diff --git a/external/vulkancts/framework/vulkan/vkDeviceFeaturesForDefaultDeviceDefs.inl b/external/vulkancts/framework/vulkan/vkDeviceFeaturesForDefaultDeviceDefs.inl
index 52ad7da..ea0e973 100644 (file)
--- a/external/vulkancts/framework/vulkan/vkDeviceFeaturesForDefaultDeviceDefs.inl
+++ b/external/vulkancts/framework/vulkan/vkDeviceFeaturesForDefaultDeviceDefs.inl
@@ -31,6 +31,7 @@ const VkPhysicalDeviceProtectedMemoryFeatures&                                                getProtectedMemoryFeatures
 const VkPhysicalDeviceRepresentativeFragmentTestFeaturesNV&                    getRepresentativeFragmentTestFeatures           (void) const { return m_deviceFeatures.getFeatureType<VkPhysicalDeviceRepresentativeFragmentTestFeaturesNV>();                  }
 const VkPhysicalDeviceSamplerYcbcrConversionFeatures&                          getSamplerYcbcrConversionFeatures                       (void) const { return m_deviceFeatures.getFeatureType<VkPhysicalDeviceSamplerYcbcrConversionFeatures>();                                }
 const VkPhysicalDeviceScalarBlockLayoutFeaturesEXT&                                    getScalarBlockLayoutFeatures                            (void) const { return m_deviceFeatures.getFeatureType<VkPhysicalDeviceScalarBlockLayoutFeaturesEXT>();                                  }
+const VkPhysicalDeviceSeparateDepthStencilLayoutsFeaturesKHR&          getSeparateDepthStencilLayoutsFeatures          (void) const { return m_deviceFeatures.getFeatureType<VkPhysicalDeviceSeparateDepthStencilLayoutsFeaturesKHR>();                }
 const VkPhysicalDeviceShaderAtomicInt64FeaturesKHR&                                    getShaderAtomicInt64Features                            (void) const { return m_deviceFeatures.getFeatureType<VkPhysicalDeviceShaderAtomicInt64FeaturesKHR>();                                  }
 const VkPhysicalDeviceShaderClockFeaturesKHR&                                          getShaderClockFeatures                                          (void) const { return m_deviceFeatures.getFeatureType<VkPhysicalDeviceShaderClockFeaturesKHR>();                                                }
 const VkPhysicalDeviceShaderDemoteToHelperInvocationFeaturesEXT&       getShaderDemoteToHelperInvocationFeatures       (void) const { return m_deviceFeatures.getFeatureType<VkPhysicalDeviceShaderDemoteToHelperInvocationFeaturesEXT>();             }

diff --git a/external/vulkancts/framework/vulkan/vkGetStructureTypeImpl.inl b/external/vulkancts/framework/vulkan/vkGetStructureTypeImpl.inl
index 5221da0..46d441b 100644 (file)
--- a/external/vulkancts/framework/vulkan/vkGetStructureTypeImpl.inl
+++ b/external/vulkancts/framework/vulkan/vkGetStructureTypeImpl.inl
@@ -851,6 +851,21 @@ template<> VkStructureType getStructureType<VkSurfaceProtectedCapabilitiesKHR> (
        return VK_STRUCTURE_TYPE_SURFACE_PROTECTED_CAPABILITIES_KHR;
 }
 
+template<> VkStructureType getStructureType<VkPhysicalDeviceSeparateDepthStencilLayoutsFeaturesKHR> (void)
+{
+       return VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_SEPARATE_DEPTH_STENCIL_LAYOUTS_FEATURES_KHR;
+}
+
+template<> VkStructureType getStructureType<VkAttachmentReferenceStencilLayoutKHR> (void)
+{
+       return VK_STRUCTURE_TYPE_ATTACHMENT_REFERENCE_STENCIL_LAYOUT_KHR;
+}
+
+template<> VkStructureType getStructureType<VkAttachmentDescriptionStencilLayoutKHR> (void)
+{
+       return VK_STRUCTURE_TYPE_ATTACHMENT_DESCRIPTION_STENCIL_LAYOUT_KHR;
+}
+
 template<> VkStructureType getStructureType<VkPhysicalDeviceUniformBufferStandardLayoutFeaturesKHR> (void)
 {
        return VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_UNIFORM_BUFFER_STANDARD_LAYOUT_FEATURES_KHR;

diff --git a/external/vulkancts/framework/vulkan/vkStrUtil.inl b/external/vulkancts/framework/vulkan/vkStrUtil.inl
index 8586a53..a60d40e 100644 (file)
--- a/external/vulkancts/framework/vulkan/vkStrUtil.inl
+++ b/external/vulkancts/framework/vulkan/vkStrUtil.inl
@@ -630,6 +630,9 @@ std::ostream&       operator<<      (std::ostream& s, const VkSemaphoreWaitInfoKHR& value);
 std::ostream&  operator<<      (std::ostream& s, const VkSemaphoreSignalInfoKHR& value);
 std::ostream&  operator<<      (std::ostream& s, const VkPhysicalDeviceVulkanMemoryModelFeaturesKHR& value);
 std::ostream&  operator<<      (std::ostream& s, const VkSurfaceProtectedCapabilitiesKHR& value);
+std::ostream&  operator<<      (std::ostream& s, const VkPhysicalDeviceSeparateDepthStencilLayoutsFeaturesKHR& value);
+std::ostream&  operator<<      (std::ostream& s, const VkAttachmentReferenceStencilLayoutKHR& value);
+std::ostream&  operator<<      (std::ostream& s, const VkAttachmentDescriptionStencilLayoutKHR& value);
 std::ostream&  operator<<      (std::ostream& s, const VkPhysicalDeviceUniformBufferStandardLayoutFeaturesKHR& value);
 std::ostream&  operator<<      (std::ostream& s, const VkPhysicalDevicePipelineExecutablePropertiesFeaturesKHR& value);
 std::ostream&  operator<<      (std::ostream& s, const VkPipelineInfoKHR& value);

diff --git a/external/vulkancts/framework/vulkan/vkStrUtilImpl.inl b/external/vulkancts/framework/vulkan/vkStrUtilImpl.inl
index b11daf5..10ed741 100644 (file)
--- a/external/vulkancts/framework/vulkan/vkStrUtilImpl.inl
+++ b/external/vulkancts/framework/vulkan/vkStrUtilImpl.inl
@@ -470,6 +470,9 @@ const char* getStructureTypeName (VkStructureType value)
                case VK_STRUCTURE_TYPE_MEMORY_PRIORITY_ALLOCATE_INFO_EXT:                                                               return "VK_STRUCTURE_TYPE_MEMORY_PRIORITY_ALLOCATE_INFO_EXT";
                case VK_STRUCTURE_TYPE_SURFACE_PROTECTED_CAPABILITIES_KHR:                                                              return "VK_STRUCTURE_TYPE_SURFACE_PROTECTED_CAPABILITIES_KHR";
                case VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_DEDICATED_ALLOCATION_IMAGE_ALIASING_FEATURES_NV: return "VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_DEDICATED_ALLOCATION_IMAGE_ALIASING_FEATURES_NV";
+               case VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_SEPARATE_DEPTH_STENCIL_LAYOUTS_FEATURES_KHR:             return "VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_SEPARATE_DEPTH_STENCIL_LAYOUTS_FEATURES_KHR";
+               case VK_STRUCTURE_TYPE_ATTACHMENT_REFERENCE_STENCIL_LAYOUT_KHR:                                                 return "VK_STRUCTURE_TYPE_ATTACHMENT_REFERENCE_STENCIL_LAYOUT_KHR";
+               case VK_STRUCTURE_TYPE_ATTACHMENT_DESCRIPTION_STENCIL_LAYOUT_KHR:                                               return "VK_STRUCTURE_TYPE_ATTACHMENT_DESCRIPTION_STENCIL_LAYOUT_KHR";
                case VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_BUFFER_DEVICE_ADDRESS_FEATURES_EXT:                              return "VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_BUFFER_DEVICE_ADDRESS_FEATURES_EXT";
                case VK_STRUCTURE_TYPE_BUFFER_DEVICE_ADDRESS_INFO_EXT:                                                                  return "VK_STRUCTURE_TYPE_BUFFER_DEVICE_ADDRESS_INFO_EXT";
                case VK_STRUCTURE_TYPE_BUFFER_DEVICE_ADDRESS_CREATE_INFO_EXT:                                                   return "VK_STRUCTURE_TYPE_BUFFER_DEVICE_ADDRESS_CREATE_INFO_EXT";
@@ -864,6 +867,10 @@ const char* getImageLayoutName (VkImageLayout value)
                case VK_IMAGE_LAYOUT_SHARED_PRESENT_KHR:                                                        return "VK_IMAGE_LAYOUT_SHARED_PRESENT_KHR";
                case VK_IMAGE_LAYOUT_SHADING_RATE_OPTIMAL_NV:                                           return "VK_IMAGE_LAYOUT_SHADING_RATE_OPTIMAL_NV";
                case VK_IMAGE_LAYOUT_FRAGMENT_DENSITY_MAP_OPTIMAL_EXT:                          return "VK_IMAGE_LAYOUT_FRAGMENT_DENSITY_MAP_OPTIMAL_EXT";
+               case VK_IMAGE_LAYOUT_DEPTH_ATTACHMENT_OPTIMAL_KHR:                                      return "VK_IMAGE_LAYOUT_DEPTH_ATTACHMENT_OPTIMAL_KHR";
+               case VK_IMAGE_LAYOUT_DEPTH_READ_ONLY_OPTIMAL_KHR:                                       return "VK_IMAGE_LAYOUT_DEPTH_READ_ONLY_OPTIMAL_KHR";
+               case VK_IMAGE_LAYOUT_STENCIL_ATTACHMENT_OPTIMAL_KHR:                            return "VK_IMAGE_LAYOUT_STENCIL_ATTACHMENT_OPTIMAL_KHR";
+               case VK_IMAGE_LAYOUT_STENCIL_READ_ONLY_OPTIMAL_KHR:                                     return "VK_IMAGE_LAYOUT_STENCIL_READ_ONLY_OPTIMAL_KHR";
                case VK_IMAGE_LAYOUT_MAX_ENUM:                                                                          return "VK_IMAGE_LAYOUT_MAX_ENUM";
                default:                                                                                                                        return DE_NULL;
        }
@@ -6410,6 +6417,37 @@ std::ostream& operator<< (std::ostream& s, const VkSurfaceProtectedCapabilitiesK
        return s;
 }
 
+std::ostream& operator<< (std::ostream& s, const VkPhysicalDeviceSeparateDepthStencilLayoutsFeaturesKHR& value)
+{
+       s << "VkPhysicalDeviceSeparateDepthStencilLayoutsFeaturesKHR = {\n";
+       s << "\tsType = " << value.sType << '\n';
+       s << "\tpNext = " << value.pNext << '\n';
+       s << "\tseparateDepthStencilLayouts = " << value.separateDepthStencilLayouts << '\n';
+       s << '}';
+       return s;
+}
+
+std::ostream& operator<< (std::ostream& s, const VkAttachmentReferenceStencilLayoutKHR& value)
+{
+       s << "VkAttachmentReferenceStencilLayoutKHR = {\n";
+       s << "\tsType = " << value.sType << '\n';
+       s << "\tpNext = " << value.pNext << '\n';
+       s << "\tstencilLayout = " << value.stencilLayout << '\n';
+       s << '}';
+       return s;
+}
+
+std::ostream& operator<< (std::ostream& s, const VkAttachmentDescriptionStencilLayoutKHR& value)
+{
+       s << "VkAttachmentDescriptionStencilLayoutKHR = {\n";
+       s << "\tsType = " << value.sType << '\n';
+       s << "\tpNext = " << value.pNext << '\n';
+       s << "\tstencilInitialLayout = " << value.stencilInitialLayout << '\n';
+       s << "\tstencilFinalLayout = " << value.stencilFinalLayout << '\n';
+       s << '}';
+       return s;
+}
+
 std::ostream& operator<< (std::ostream& s, const VkPhysicalDeviceUniformBufferStandardLayoutFeaturesKHR& value)
 {
        s << "VkPhysicalDeviceUniformBufferStandardLayoutFeaturesKHR = {\n";

diff --git a/external/vulkancts/framework/vulkan/vkStructTypes.inl b/external/vulkancts/framework/vulkan/vkStructTypes.inl
index d30d6ab..9c2640e 100644 (file)
--- a/external/vulkancts/framework/vulkan/vkStructTypes.inl
+++ b/external/vulkancts/framework/vulkan/vkStructTypes.inl
@@ -2368,6 +2368,28 @@ struct VkSurfaceProtectedCapabilitiesKHR
        VkBool32                supportsProtected;
 };
 
+struct VkPhysicalDeviceSeparateDepthStencilLayoutsFeaturesKHR
+{
+       VkStructureType sType;
+       void*                   pNext;
+       VkBool32                separateDepthStencilLayouts;
+};
+
+struct VkAttachmentReferenceStencilLayoutKHR
+{
+       VkStructureType sType;
+       void*                   pNext;
+       VkImageLayout   stencilLayout;
+};
+
+struct VkAttachmentDescriptionStencilLayoutKHR
+{
+       VkStructureType sType;
+       void*                   pNext;
+       VkImageLayout   stencilInitialLayout;
+       VkImageLayout   stencilFinalLayout;
+};
+
 struct VkPhysicalDeviceUniformBufferStandardLayoutFeaturesKHR
 {
        VkStructureType sType;

diff --git a/external/vulkancts/framework/vulkan/vkVulkan_c.inl b/external/vulkancts/framework/vulkan/vkVulkan_c.inl
index 0ab85dc..ac08b81 100644 (file)
--- a/external/vulkancts/framework/vulkan/vkVulkan_c.inl
+++ b/external/vulkancts/framework/vulkan/vkVulkan_c.inl
@@ -508,6 +508,9 @@ typedef enum VkStructureType {
     VK_STRUCTURE_TYPE_MEMORY_PRIORITY_ALLOCATE_INFO_EXT = 1000238001,
     VK_STRUCTURE_TYPE_SURFACE_PROTECTED_CAPABILITIES_KHR = 1000239000,
     VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_DEDICATED_ALLOCATION_IMAGE_ALIASING_FEATURES_NV = 1000240000,
+    VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_SEPARATE_DEPTH_STENCIL_LAYOUTS_FEATURES_KHR = 1000241000,
+    VK_STRUCTURE_TYPE_ATTACHMENT_REFERENCE_STENCIL_LAYOUT_KHR = 1000241001,
+    VK_STRUCTURE_TYPE_ATTACHMENT_DESCRIPTION_STENCIL_LAYOUT_KHR = 1000241002,
     VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_BUFFER_DEVICE_ADDRESS_FEATURES_EXT = 1000244000,
     VK_STRUCTURE_TYPE_BUFFER_DEVICE_ADDRESS_INFO_EXT = 1000244001,
     VK_STRUCTURE_TYPE_BUFFER_DEVICE_ADDRESS_CREATE_INFO_EXT = 1000244002,
@@ -984,6 +987,10 @@ typedef enum VkImageLayout {
     VK_IMAGE_LAYOUT_SHARED_PRESENT_KHR = 1000111000,
     VK_IMAGE_LAYOUT_SHADING_RATE_OPTIMAL_NV = 1000164003,
     VK_IMAGE_LAYOUT_FRAGMENT_DENSITY_MAP_OPTIMAL_EXT = 1000218000,
+    VK_IMAGE_LAYOUT_DEPTH_ATTACHMENT_OPTIMAL_KHR = 1000241000,
+    VK_IMAGE_LAYOUT_DEPTH_READ_ONLY_OPTIMAL_KHR = 1000241001,
+    VK_IMAGE_LAYOUT_STENCIL_ATTACHMENT_OPTIMAL_KHR = 1000241002,
+    VK_IMAGE_LAYOUT_STENCIL_READ_ONLY_OPTIMAL_KHR = 1000241003,
     VK_IMAGE_LAYOUT_DEPTH_READ_ONLY_STENCIL_ATTACHMENT_OPTIMAL_KHR = VK_IMAGE_LAYOUT_DEPTH_READ_ONLY_STENCIL_ATTACHMENT_OPTIMAL,
     VK_IMAGE_LAYOUT_DEPTH_ATTACHMENT_STENCIL_READ_ONLY_OPTIMAL_KHR = VK_IMAGE_LAYOUT_DEPTH_ATTACHMENT_STENCIL_READ_ONLY_OPTIMAL,
     VK_IMAGE_LAYOUT_BEGIN_RANGE = VK_IMAGE_LAYOUT_UNDEFINED,
@@ -6487,6 +6494,30 @@ typedef struct VkSurfaceProtectedCapabilitiesKHR {
 
 
 
+#define VK_KHR_separate_depth_stencil_layouts 1
+#define VK_KHR_SEPARATE_DEPTH_STENCIL_LAYOUTS_SPEC_VERSION 1
+#define VK_KHR_SEPARATE_DEPTH_STENCIL_LAYOUTS_EXTENSION_NAME "VK_KHR_separate_depth_stencil_layouts"
+typedef struct VkPhysicalDeviceSeparateDepthStencilLayoutsFeaturesKHR {
+    VkStructureType    sType;
+    void*              pNext;
+    VkBool32           separateDepthStencilLayouts;
+} VkPhysicalDeviceSeparateDepthStencilLayoutsFeaturesKHR;
+
+typedef struct VkAttachmentReferenceStencilLayoutKHR {
+    VkStructureType    sType;
+    void*              pNext;
+    VkImageLayout      stencilLayout;
+} VkAttachmentReferenceStencilLayoutKHR;
+
+typedef struct VkAttachmentDescriptionStencilLayoutKHR {
+    VkStructureType    sType;
+    void*              pNext;
+    VkImageLayout      stencilInitialLayout;
+    VkImageLayout      stencilFinalLayout;
+} VkAttachmentDescriptionStencilLayoutKHR;
+
+
+
 #define VK_KHR_uniform_buffer_standard_layout 1
 #define VK_KHR_UNIFORM_BUFFER_STANDARD_LAYOUT_SPEC_VERSION 1
 #define VK_KHR_UNIFORM_BUFFER_STANDARD_LAYOUT_EXTENSION_NAME "VK_KHR_uniform_buffer_standard_layout"

diff --git a/external/vulkancts/modules/vulkan/api/vktApiCopiesAndBlittingTests.cpp b/external/vulkancts/modules/vulkan/api/vktApiCopiesAndBlittingTests.cpp
index 4a7addb..9ad1ddf 100644 (file)
--- a/external/vulkancts/modules/vulkan/api/vktApiCopiesAndBlittingTests.cpp
+++ b/external/vulkancts/modules/vulkan/api/vktApiCopiesAndBlittingTests.cpp
@@ -170,12 +170,14 @@ struct TestParams
        deUint32                mipLevels;
        deBool                  singleCommand;
        deUint32                barrierCount;
+       deBool                  separateDepthStencilLayouts;
 
        TestParams (void)
        {
-               mipLevels               = 1u;
-               singleCommand   = DE_TRUE;
-               barrierCount    = 1u;
+               mipLevels                                       = 1u;
+               singleCommand                           = DE_TRUE;
+               barrierCount                            = 1u;
+               separateDepthStencilLayouts     = DE_FALSE;
        }
 };
 
@@ -504,9 +506,10 @@ void CopiesAndBlittingTestInstance::uploadImageAspect (const tcu::ConstPixelBuff
                bufferSize                                                                              // VkDeviceSize         size;
        };
 
-       const VkImageAspectFlags                formatAspect            = getAspectFlags(parms.format);
-       const bool                                              skipPreImageBarrier     = formatAspect == (VK_IMAGE_ASPECT_DEPTH_BIT | VK_IMAGE_ASPECT_STENCIL_BIT) &&
-                                                                                                                 getAspectFlags(imageAccess.getFormat()) == VK_IMAGE_ASPECT_STENCIL_BIT;
+       const VkImageAspectFlags                formatAspect            = (m_params.separateDepthStencilLayouts) ? getAspectFlags(imageAccess.getFormat()) : getAspectFlags(parms.format);
+       const bool                                              skipPreImageBarrier     = (m_params.separateDepthStencilLayouts) ? false : ((formatAspect == (VK_IMAGE_ASPECT_DEPTH_BIT | VK_IMAGE_ASPECT_STENCIL_BIT) &&
+                                                                                                                 getAspectFlags(imageAccess.getFormat()) == VK_IMAGE_ASPECT_STENCIL_BIT));
+
        const VkImageMemoryBarrier              preImageBarrier         =
        {
                VK_STRUCTURE_TYPE_IMAGE_MEMORY_BARRIER,                 // VkStructureType                      sType;
@@ -1166,6 +1169,10 @@ public:
                                TCU_THROW(NotSupportedError, "VK_KHR_dedicated_allocation is not supported");
                }
 
+               if (m_params.separateDepthStencilLayouts)
+                       if (!context.isDeviceFunctionalitySupported("VK_KHR_separate_depth_stencil_layouts"))
+                               TCU_THROW(NotSupportedError, "VK_KHR_separate_depth_stencil_layouts is not supported");
+
                if ((m_params.dst.image.imageType == VK_IMAGE_TYPE_3D && m_params.src.image.imageType == VK_IMAGE_TYPE_2D) ||
                        (m_params.dst.image.imageType == VK_IMAGE_TYPE_2D && m_params.src.image.imageType == VK_IMAGE_TYPE_3D))
                {
@@ -4962,6 +4969,10 @@ void addImageToImageAllFormatsDepthStencilTests (tcu::TestCaseGroup* group, Allo
                params.src.image.tiling                         = VK_IMAGE_TILING_OPTIMAL;
                params.dst.image.tiling                         = VK_IMAGE_TILING_OPTIMAL;
                params.allocationKind                           = allocationKind;
+               params.separateDepthStencilLayouts      = DE_FALSE;
+
+               bool hasDepth   = tcu::hasDepthComponent(mapVkFormat(params.src.image.format).order);
+               bool hasStencil = tcu::hasStencilComponent(mapVkFormat(params.src.image.format).order);
 
                const VkImageSubresourceLayers          defaultDepthSourceLayer         = { VK_IMAGE_ASPECT_DEPTH_BIT, 0u, 0u, 1u };
                const VkImageSubresourceLayers          defaultStencilSourceLayer       = { VK_IMAGE_ASPECT_STENCIL_BIT, 0u, 0u, 1u };
@@ -4973,7 +4984,7 @@ void addImageToImageAllFormatsDepthStencilTests (tcu::TestCaseGroup* group, Allo
                        const VkOffset3D        dstOffset       = {i, defaultSize - i - defaultFourthSize, 0};
                        const VkExtent3D        extent          = {defaultFourthSize, defaultFourthSize, 1};
 
-                       if (tcu::hasDepthComponent(mapVkFormat(params.src.image.format).order))
+                       if (hasDepth)
                        {
                                const VkImageCopy                               testCopy        =
                                {
@@ -4987,7 +4998,7 @@ void addImageToImageAllFormatsDepthStencilTests (tcu::TestCaseGroup* group, Allo
                                copyRegion.imageCopy    = testCopy;
                                params.regions.push_back(copyRegion);
                        }
-                       if (tcu::hasStencilComponent(mapVkFormat(params.src.image.format).order))
+                       if (hasStencil)
                        {
                                const VkImageCopy                               testCopy        =
                                {
@@ -5084,6 +5095,9 @@ void addImageToImageAllFormatsDepthStencilTests (tcu::TestCaseGroup* group, Allo
                const VkImageSubresourceLayers          defaultDepthSourceLayer         = { VK_IMAGE_ASPECT_DEPTH_BIT, 0u, 0u, 1u };
                const VkImageSubresourceLayers          defaultStencilSourceLayer       = { VK_IMAGE_ASPECT_STENCIL_BIT, 0u, 0u, 1u };
 
+               bool hasDepth   = tcu::hasDepthComponent(mapVkFormat(params.src.image.format).order);
+               bool hasStencil = tcu::hasStencilComponent(mapVkFormat(params.src.image.format).order);
+
                for (deInt32 i = 0; i < defaultFourthSize; i += defaultSixteenthSize)
                {
                        CopyRegion                      copyRegion;
@@ -5091,7 +5105,7 @@ void addImageToImageAllFormatsDepthStencilTests (tcu::TestCaseGroup* group, Allo
                        const VkOffset3D        dstOffset       = {i, defaultFourthSize - i - defaultSixteenthSize, i};
                        const VkExtent3D        extent          = {defaultSixteenthSize, defaultSixteenthSize, defaultSixteenthSize};
 
-                       if (tcu::hasDepthComponent(mapVkFormat(params.src.image.format).order))
+                       if (hasDepth)
                        {
                                const VkImageCopy                               testCopy        =
                                {
@@ -5105,7 +5119,7 @@ void addImageToImageAllFormatsDepthStencilTests (tcu::TestCaseGroup* group, Allo
                                copyRegion.imageCopy    = testCopy;
                                params.regions.push_back(copyRegion);
                        }
-                       if (tcu::hasStencilComponent(mapVkFormat(params.src.image.format).order))
+                       if (hasStencil)
                        {
                                const VkImageCopy                               testCopy        =
                                {
@@ -5124,6 +5138,14 @@ void addImageToImageAllFormatsDepthStencilTests (tcu::TestCaseGroup* group, Allo
                const std::string testName              = "3d_"+ getFormatCaseName(params.src.image.format) + "_" + getFormatCaseName(params.dst.image.format);
                const std::string description   = "3D copy from " + getFormatCaseName(params.src.image.format) + " to " + getFormatCaseName(params.dst.image.format);
                addTestGroup(group, testName, description, addImageToImageAllFormatsDepthStencilFormatsTests, params);
+
+               if (hasDepth && hasStencil)
+               {
+                       params.separateDepthStencilLayouts      = DE_TRUE;
+                       const std::string testName2             = getFormatCaseName(params.src.image.format) + "_" + getFormatCaseName(params.dst.image.format) + "_separate_layouts";
+                       const std::string description2  = "Copy from " + getFormatCaseName(params.src.image.format) + " to " + getFormatCaseName(params.dst.image.format) + " with separate depth/stencil layouts";
+                       addTestGroup(group, testName2, description2, addImageToImageAllFormatsDepthStencilFormatsTests, params);
+               }
        }
 }
 
@@ -7104,6 +7126,7 @@ void addBlittingImageAllFormatsDepthStencilTests (tcu::TestCaseGroup* group, All
                params.dst.image.format                         = params.src.image.format;
                params.dst.image.tiling                         = VK_IMAGE_TILING_OPTIMAL;
                params.allocationKind                           = allocationKind;
+               params.separateDepthStencilLayouts      = DE_FALSE;
 
                bool hasDepth   = tcu::hasDepthComponent(mapVkFormat(params.src.image.format).order);
                bool hasStencil = tcu::hasStencilComponent(mapVkFormat(params.src.image.format).order);
@@ -7401,6 +7424,16 @@ void addBlittingImageAllFormatsDepthStencilTests (tcu::TestCaseGroup* group, All
                const std::string description   = "3D blit from " + getFormatCaseName(params.src.image.format) +
                                                                                  " to " + getFormatCaseName(params.dst.image.format);
                addTestGroup(group, testName, description, addBlittingImageAllFormatsDepthStencilFormatsTests, params);
+
+               if (hasDepth && hasStencil)
+               {
+                       params.separateDepthStencilLayouts      = DE_TRUE;
+                       const std::string testName2             = getFormatCaseName(params.src.image.format) + "_" +
+                                                                                         getFormatCaseName(params.dst.image.format) + "_separate_layouts";
+                       const std::string description2  = "Blit from " + getFormatCaseName(params.src.image.format) +
+                                                                                         " to " + getFormatCaseName(params.dst.image.format) + " with separate depth/stencil layouts";
+                       addTestGroup(group, testName2, description2, addBlittingImageAllFormatsDepthStencilFormatsTests, params);
+               }
        }
 }
 

diff --git a/external/vulkancts/modules/vulkan/api/vktApiImageClearingTests.cpp b/external/vulkancts/modules/vulkan/api/vktApiImageClearingTests.cpp
index b23b1b3..33bfa6b 100644 (file)
--- a/external/vulkancts/modules/vulkan/api/vktApiImageClearingTests.cpp
+++ b/external/vulkancts/modules/vulkan/api/vktApiImageClearingTests.cpp
@@ -467,20 +467,28 @@ std::string extentToString (VkExtent3D extent, VkImageType imageType)
        return (std::string("_") + de::toString(extent.width) + std::string("x") + de::toString(extent.height) + (extent.depth != 1 ? (std::string("x") + de::toString(extent.depth)) : ""));
 }
 
+enum SeparateDepthStencilLayoutMode
+{
+       SEPARATE_DEPTH_STENCIL_LAYOUT_MODE_NONE = 0,
+       SEPARATE_DEPTH_STENCIL_LAYOUT_MODE_DEPTH,
+       SEPARATE_DEPTH_STENCIL_LAYOUT_MODE_STENCIL,
+};
+
 struct TestParams
 {
-       bool                    useSingleMipLevel;      //!< only mip level 0, otherwise up to maxMipLevels
-       VkImageType             imageType;
-       VkFormat                imageFormat;
-       VkImageTiling   imageTiling;
-       VkExtent3D              imageExtent;
-       deUint32        imageLayerCount;
-       LayerRange      imageViewLayerRange;
-       VkClearValue    initValue;
-       VkClearValue    clearValue[2];          //!< the second value is used with more than one mip map
-       LayerRange              clearLayerRange;
-       AllocationKind  allocationKind;
-       bool                    isCube;
+       bool                                                    useSingleMipLevel;      //!< only mip level 0, otherwise up to maxMipLevels
+       VkImageType                                             imageType;
+       VkFormat                                                imageFormat;
+       VkImageTiling                                   imageTiling;
+       VkExtent3D                                              imageExtent;
+       deUint32                                                imageLayerCount;
+       LayerRange                                              imageViewLayerRange;
+       VkClearValue                                    initValue;
+       VkClearValue                                    clearValue[2];          //!< the second value is used with more than one mip map
+       LayerRange                                              clearLayerRange;
+       AllocationKind                                  allocationKind;
+       bool                                                    isCube;
+       SeparateDepthStencilLayoutMode  separateDepthStencilLayoutMode;
 };
 
 class ImageClearingTestInstance : public vkt::TestInstance
@@ -501,7 +509,7 @@ public:
        void                                                            submitCommandBuffer                             (void) const;
        void                                                            beginRenderPass                                 (VkSubpassContents content, VkClearValue clearValue) const;
 
-       void                                                            pipelineImageBarrier                    (VkPipelineStageFlags srcStageMask, VkPipelineStageFlags dstStageMask, VkAccessFlags srcAccessMask, VkAccessFlags dstAccessMask, VkImageLayout oldLayout, VkImageLayout newLayout) const;
+       void                                                            pipelineImageBarrier                    (VkPipelineStageFlags srcStageMask, VkPipelineStageFlags dstStageMask, VkAccessFlags srcAccessMask, VkAccessFlags dstAccessMask, VkImageLayout oldLayout, VkImageLayout newLayout, VkImageAspectFlags aspectMask = 0u) const;
        de::MovePtr<TextureLevelPyramid>        readImage                                               (VkImageAspectFlags aspectMask, deUint32 baseLayer) const;
        tcu::TestStatus                                         verifyResultImage                               (const std::string& successMessage, const UVec4& clearCoords = UVec4()) const;
 
@@ -585,6 +593,9 @@ ImageClearingTestInstance::ImageClearingTestInstance (Context& context, const Te
 {
        if (m_params.allocationKind == ALLOCATION_KIND_DEDICATED)
                context.requireDeviceFunctionality("VK_KHR_dedicated_allocation");
+
+       if (m_params.separateDepthStencilLayoutMode != SEPARATE_DEPTH_STENCIL_LAYOUT_MODE_NONE)
+               context.requireDeviceFunctionality("VK_KHR_separate_depth_stencil_layouts");
 }
 
 ImageClearingTestInstance::ViewType ImageClearingTestInstance::getViewType (deUint32 imageLayerCount) const
@@ -770,82 +781,182 @@ Move<VkImageView> ImageClearingTestInstance::createImageView (VkImage image, VkI
 
 Move<VkRenderPass> ImageClearingTestInstance::createRenderPass (VkFormat format) const
 {
-       VkImageLayout                                                   imageLayout;
+       if (m_params.separateDepthStencilLayoutMode == SEPARATE_DEPTH_STENCIL_LAYOUT_MODE_NONE)
+       {
+               VkImageLayout                                                   imageLayout;
 
-       if (isDepthStencilFormat(format))
-               imageLayout = VK_IMAGE_LAYOUT_DEPTH_STENCIL_ATTACHMENT_OPTIMAL;
-       else
-               imageLayout = VK_IMAGE_LAYOUT_COLOR_ATTACHMENT_OPTIMAL;
+               if (isDepthStencilFormat(format))
+                       imageLayout = VK_IMAGE_LAYOUT_DEPTH_STENCIL_ATTACHMENT_OPTIMAL;
+               else
+                       imageLayout = VK_IMAGE_LAYOUT_COLOR_ATTACHMENT_OPTIMAL;
 
-       const VkAttachmentDescription                   attachmentDesc                  =
-       {
-               0u,                                                                                                     // VkAttachmentDescriptionFlags         flags;
-               format,                                                                                         // VkFormat                                                     format;
-               VK_SAMPLE_COUNT_1_BIT,                                                          // VkSampleCountFlagBits                        samples;
-               VK_ATTACHMENT_LOAD_OP_CLEAR,                                            // VkAttachmentLoadOp                           loadOp;
-               VK_ATTACHMENT_STORE_OP_STORE,                                           // VkAttachmentStoreOp                          storeOp;
-               VK_ATTACHMENT_LOAD_OP_CLEAR,                                            // VkAttachmentLoadOp                           stencilLoadOp;
-               VK_ATTACHMENT_STORE_OP_STORE,                                           // VkAttachmentStoreOp                          stencilStoreOp;
-               imageLayout,                                                                            // VkImageLayout                                        initialLayout;
-               imageLayout,                                                                            // VkImageLayout                                        finalLayout;
-       };
+               const VkAttachmentDescription                   attachmentDesc                  =
+               {
+                       0u,                                                                                                     // VkAttachmentDescriptionFlags         flags;
+                       format,                                                                                         // VkFormat                                                     format;
+                       VK_SAMPLE_COUNT_1_BIT,                                                          // VkSampleCountFlagBits                        samples;
+                       VK_ATTACHMENT_LOAD_OP_CLEAR,                                            // VkAttachmentLoadOp                           loadOp;
+                       VK_ATTACHMENT_STORE_OP_STORE,                                           // VkAttachmentStoreOp                          storeOp;
+                       VK_ATTACHMENT_LOAD_OP_CLEAR,                                            // VkAttachmentLoadOp                           stencilLoadOp;
+                       VK_ATTACHMENT_STORE_OP_STORE,                                           // VkAttachmentStoreOp                          stencilStoreOp;
+                       imageLayout,                                                                            // VkImageLayout                                        initialLayout;
+                       imageLayout,                                                                            // VkImageLayout                                        finalLayout;
+               };
 
-       const VkAttachmentDescription                   attachments[1]                  =
-       {
-               attachmentDesc
-       };
+               const VkAttachmentDescription                   attachments[1]                  =
+               {
+                       attachmentDesc
+               };
 
-       const VkAttachmentReference                             attachmentRef                   =
-       {
-               0u,                                                                                                     // deUint32                                                     attachment;
-               imageLayout,                                                                            // VkImageLayout                                        layout;
-       };
+               const VkAttachmentReference                             attachmentRef                   =
+               {
+                       0u,                                                                                                     // deUint32                                                     attachment;
+                       imageLayout,                                                                            // VkImageLayout                                        layout;
+               };
 
-       const VkAttachmentReference*                    pColorAttachments               = DE_NULL;
-       const VkAttachmentReference*                    pDepthStencilAttachment = DE_NULL;
-       deUint32                                                                colorAttachmentCount    = 1;
+               const VkAttachmentReference*                    pColorAttachments               = DE_NULL;
+               const VkAttachmentReference*                    pDepthStencilAttachment = DE_NULL;
+               deUint32                                                                colorAttachmentCount    = 1;
 
-       if (isDepthStencilFormat(format))
-       {
-               colorAttachmentCount    = 0;
-               pDepthStencilAttachment = &attachmentRef;
+               if (isDepthStencilFormat(format))
+               {
+                       colorAttachmentCount    = 0;
+                       pDepthStencilAttachment = &attachmentRef;
+               }
+               else
+               {
+                       colorAttachmentCount    = 1;
+                       pColorAttachments               = &attachmentRef;
+               }
+
+               const VkSubpassDescription                              subpassDesc[1]                  =
+               {
+                       {
+                               0u,                                                                                             // VkSubpassDescriptionFlags            flags;
+                               VK_PIPELINE_BIND_POINT_GRAPHICS,                                // VkPipelineBindPoint                          pipelineBindPoint;
+                               0u,                                                                                             // deUint32                                                     inputAttachmentCount;
+                               DE_NULL,                                                                                // const VkAttachmentReference*         pInputAttachments;
+                               colorAttachmentCount,                                                   // deUint32                                                     colorAttachmentCount;
+                               pColorAttachments,                                                              // const VkAttachmentReference*         pColorAttachments;
+                               DE_NULL,                                                                                // const VkAttachmentReference*         pResolveAttachments;
+                               pDepthStencilAttachment,                                                // const VkAttachmentReference*         pDepthStencilAttachment;
+                               0u,                                                                                             // deUint32                                                     preserveAttachmentCount;
+                               DE_NULL,                                                                                // const VkAttachmentReference*         pPreserveAttachments;
+                       }
+               };
+
+               const VkRenderPassCreateInfo                    renderPassCreateInfo    =
+               {
+                       VK_STRUCTURE_TYPE_RENDER_PASS_CREATE_INFO,                      // VkStructureType                                      sType;
+                       DE_NULL,                                                                                        // const void*                                          pNext;
+                       0u,                                                                                                     // VkRenderPassCreateFlags                      flags;
+                       1u,                                                                                                     // deUint32                                                     attachmentCount;
+                       attachments,                                                                            // const VkAttachmentDescription*       pAttachments;
+                       1u,                                                                                                     // deUint32                                                     subpassCount;
+                       subpassDesc,                                                                            // const VkSubpassDescription*          pSubpasses;
+                       0u,                                                                                                     // deUint32                                                     dependencyCount;
+                       DE_NULL,                                                                                        // const VkSubpassDependency*           pDependencies;
+               };
+
+               return vk::createRenderPass(m_vkd, m_device, &renderPassCreateInfo, DE_NULL);
        }
        else
        {
-               colorAttachmentCount    = 1;
-               pColorAttachments               = &attachmentRef;
-       }
+               VkImageLayout                                                           initialLayout                   = VK_IMAGE_LAYOUT_DEPTH_STENCIL_ATTACHMENT_OPTIMAL;
+               VkImageLayout                                                           finalLayout                             = VK_IMAGE_LAYOUT_DEPTH_STENCIL_ATTACHMENT_OPTIMAL;
+               VkAttachmentDescriptionStencilLayoutKHR         stencilLayouts                  =
+               {
+                       VK_STRUCTURE_TYPE_ATTACHMENT_DESCRIPTION_STENCIL_LAYOUT_KHR,
+                       DE_NULL,
+                       VK_IMAGE_LAYOUT_DEPTH_STENCIL_ATTACHMENT_OPTIMAL,
+                       VK_IMAGE_LAYOUT_DEPTH_STENCIL_ATTACHMENT_OPTIMAL,
+               };
 
-       const VkSubpassDescription                              subpassDesc[1]                  =
-       {
+               VkImageLayout                                                           imageLayout;
+               VkAttachmentReferenceStencilLayoutKHR           stencilLayoutRef                =
                {
+                       VK_STRUCTURE_TYPE_ATTACHMENT_DESCRIPTION_STENCIL_LAYOUT_KHR,
+                       DE_NULL,
+                       VK_IMAGE_LAYOUT_DEPTH_STENCIL_ATTACHMENT_OPTIMAL,
+               };
+
+               if (m_params.separateDepthStencilLayoutMode == SEPARATE_DEPTH_STENCIL_LAYOUT_MODE_DEPTH)
+               {
+                       initialLayout = VK_IMAGE_LAYOUT_DEPTH_ATTACHMENT_OPTIMAL_KHR;
+                       finalLayout = VK_IMAGE_LAYOUT_DEPTH_ATTACHMENT_OPTIMAL_KHR;
+                       stencilLayouts.stencilInitialLayout = VK_IMAGE_LAYOUT_UNDEFINED;
+                       stencilLayouts.stencilFinalLayout = VK_IMAGE_LAYOUT_GENERAL;
+                       imageLayout = VK_IMAGE_LAYOUT_DEPTH_ATTACHMENT_OPTIMAL_KHR;
+                       stencilLayoutRef.stencilLayout = VK_IMAGE_LAYOUT_GENERAL;
+               }
+               else
+               {
+                       initialLayout = VK_IMAGE_LAYOUT_UNDEFINED;
+                       finalLayout = VK_IMAGE_LAYOUT_GENERAL;
+                       stencilLayouts.stencilInitialLayout = VK_IMAGE_LAYOUT_DEPTH_STENCIL_ATTACHMENT_OPTIMAL;
+                       stencilLayouts.stencilFinalLayout = VK_IMAGE_LAYOUT_STENCIL_ATTACHMENT_OPTIMAL_KHR;
+                       imageLayout = VK_IMAGE_LAYOUT_GENERAL;
+                       stencilLayoutRef.stencilLayout = VK_IMAGE_LAYOUT_STENCIL_ATTACHMENT_OPTIMAL_KHR;
+               }
+
+               const VkAttachmentDescription2KHR                       attachmentDesc                  =
+               {
+                       VK_STRUCTURE_TYPE_ATTACHMENT_DESCRIPTION_2_KHR,         // VkStructureType                                      sType;
+                       &stencilLayouts,                                                                        // const void*                                          pNext;
+                       0u,                                                                                                     // VkAttachmentDescriptionFlags         flags;
+                       format,                                                                                         // VkFormat                                                     format;
+                       VK_SAMPLE_COUNT_1_BIT,                                                          // VkSampleCountFlagBits                        samples;
+                       VK_ATTACHMENT_LOAD_OP_CLEAR,                                            // VkAttachmentLoadOp                           loadOp;
+                       VK_ATTACHMENT_STORE_OP_STORE,                                           // VkAttachmentStoreOp                          storeOp;
+                       VK_ATTACHMENT_LOAD_OP_CLEAR,                                            // VkAttachmentLoadOp                           stencilLoadOp;
+                       VK_ATTACHMENT_STORE_OP_STORE,                                           // VkAttachmentStoreOp                          stencilStoreOp;
+                       initialLayout,                                                                          // VkImageLayout                                        initialLayout;
+                       finalLayout,                                                                            // VkImageLayout                                        finalLayout;
+               };
+
+               const VkAttachmentReference2KHR                         attachmentRef                   =
+               {
+                       VK_STRUCTURE_TYPE_ATTACHMENT_REFERENCE_2_KHR,           // VkStructureType              sType;
+                       &stencilLayoutRef,                                                                      // const void*                  pNext;
+                       0u,                                                                                                     // deUint32                             attachment;
+                       imageLayout,                                                                            // VkImageLayout                layout;
+                       0u,                                                                                                     // VkImageAspectFlags   aspectMask;
+               };
+
+               const VkSubpassDescription2KHR                          subpassDesc                     =
+               {
+                       VK_STRUCTURE_TYPE_SUBPASS_DESCRIPTION_2_KHR,    // VkStructureType                                      sType;
+                       DE_NULL,                                                                                // const void*                                          pNext;
                        0u,                                                                                             // VkSubpassDescriptionFlags            flags;
                        VK_PIPELINE_BIND_POINT_GRAPHICS,                                // VkPipelineBindPoint                          pipelineBindPoint;
+                       0u,                                                                                             // deUint32                                                     viewMask;
                        0u,                                                                                             // deUint32                                                     inputAttachmentCount;
-                       DE_NULL,                                                                                // const VkAttachmentReference*         pInputAttachments;
-                       colorAttachmentCount,                                                   // deUint32                                                     colorAttachmentCount;
-                       pColorAttachments,                                                              // const VkAttachmentReference*         pColorAttachments;
-                       DE_NULL,                                                                                // const VkAttachmentReference*         pResolveAttachments;
-                       pDepthStencilAttachment,                                                // const VkAttachmentReference*         pDepthStencilAttachment;
+                       DE_NULL,                                                                                // const VkAttachmentReference2KHR*     pInputAttachments;
+                       0u,                                                                                             // deUint32                                                     colorAttachmentCount;
+                       DE_NULL,                                                                                // const VkAttachmentReference2KHR*     pColorAttachments;
+                       DE_NULL,                                                                                // const VkAttachmentReference2KHR*     pResolveAttachments;
+                       &attachmentRef,                                                                 // const VkAttachmentReference2KHR*     pDepthStencilAttachment;
                        0u,                                                                                             // deUint32                                                     preserveAttachmentCount;
-                       DE_NULL,                                                                                // const VkAttachmentReference*         pPreserveAttachments;
-               }
-       };
+                       DE_NULL,                                                                                // const VkAttachmentReference2KHR*     pPreserveAttachments;
+               };
 
-       const VkRenderPassCreateInfo                    renderPassCreateInfo    =
-       {
-               VK_STRUCTURE_TYPE_RENDER_PASS_CREATE_INFO,                      // VkStructureType                                      sType;
-               DE_NULL,                                                                                        // const void*                                          pNext;
-               0u,                                                                                                     // VkRenderPassCreateFlags                      flags;
-               1u,                                                                                                     // deUint32                                                     attachmentCount;
-               attachments,                                                                            // const VkAttachmentDescription*       pAttachments;
-               1u,                                                                                                     // deUint32                                                     subpassCount;
-               subpassDesc,                                                                            // const VkSubpassDescription*          pSubpasses;
-               0u,                                                                                                     // deUint32                                                     dependencyCount;
-               DE_NULL,                                                                                        // const VkSubpassDependency*           pDependencies;
-       };
+               const VkRenderPassCreateInfo2KHR                        renderPassCreateInfo    =
+               {
+                       VK_STRUCTURE_TYPE_RENDER_PASS_CREATE_INFO_2_KHR,        // VkStructureType                                      sType;
+                       DE_NULL,                                                                                        // const void*                                          pNext;
+                       0u,                                                                                                     // VkRenderPassCreateFlags                      flags;
+                       1u,                                                                                                     // deUint32                                                     attachmentCount;
+                       &attachmentDesc,                                                                        // const VkAttachmentDescription*       pAttachments;
+                       1u,                                                                                                     // deUint32                                                     subpassCount;
+                       &subpassDesc,                                                                           // const VkSubpassDescription*          pSubpasses;
+                       0u,                                                                                                     // deUint32                                                     dependencyCount;
+                       DE_NULL,                                                                                        // const VkSubpassDependency*           pDependencies;
+                       0u,                                                                                                     // deUint32                                                     correlatedViewMaskCount;
+                       DE_NULL,                                                                                        // const deUint32*                                      pCorrelatedViewMasks;
+               };
 
-       return vk::createRenderPass(m_vkd, m_device, &renderPassCreateInfo, DE_NULL);
+               return vk::createRenderPass2KHR(m_vkd, m_device, &renderPassCreateInfo, DE_NULL);
+       }
 }
 
 Move<VkFramebuffer> ImageClearingTestInstance::createFrameBuffer (VkImageView imageView, VkRenderPass renderPass, deUint32 imageWidth, deUint32 imageHeight, deUint32 imageLayersCount) const
@@ -886,8 +997,11 @@ void ImageClearingTestInstance::submitCommandBuffer (void) const
        submitCommandsAndWait(m_vkd, m_device, m_queue, m_commandBuffer.get());
 }
 
-void ImageClearingTestInstance::pipelineImageBarrier(VkPipelineStageFlags srcStageMask, VkPipelineStageFlags dstStageMask, VkAccessFlags srcAccessMask, VkAccessFlags dstAccessMask, VkImageLayout oldLayout, VkImageLayout newLayout) const
+void ImageClearingTestInstance::pipelineImageBarrier(VkPipelineStageFlags srcStageMask, VkPipelineStageFlags dstStageMask, VkAccessFlags srcAccessMask, VkAccessFlags dstAccessMask, VkImageLayout oldLayout, VkImageLayout newLayout, VkImageAspectFlags aspectMask) const
 {
+       if (!aspectMask || m_params.separateDepthStencilLayoutMode == SEPARATE_DEPTH_STENCIL_LAYOUT_MODE_NONE)
+               aspectMask = m_imageAspectFlags;
+
        const VkImageMemoryBarrier              imageBarrier    =
        {
                VK_STRUCTURE_TYPE_IMAGE_MEMORY_BARRIER,         // VkStructureType                      sType;
@@ -900,7 +1014,7 @@ void ImageClearingTestInstance::pipelineImageBarrier(VkPipelineStageFlags srcSta
                VK_QUEUE_FAMILY_IGNORED,                                        // deUint32                                     destQueueFamilyIndex;
                *m_image,                                                                       // VkImage                                      image;
                {
-                       m_imageAspectFlags,                                                     // VkImageAspectFlags   aspectMask;
+                       aspectMask,                                                                     // VkImageAspectFlags   aspectMask;
                        0u,                                                                                     // deUint32                             baseMipLevel;
                        VK_REMAINING_MIP_LEVELS,                                        // deUint32                             levelCount;
                        0u,                                                                                     // deUint32                             baseArrayLayer;
@@ -992,7 +1106,8 @@ de::MovePtr<TextureLevelPyramid> ImageClearingTestInstance::readImage (VkImageAs
                                                 VK_ACCESS_TRANSFER_WRITE_BIT,
                                                 VK_ACCESS_TRANSFER_READ_BIT,
                                                 VK_IMAGE_LAYOUT_GENERAL,
-                                                VK_IMAGE_LAYOUT_TRANSFER_SRC_OPTIMAL);
+                                                VK_IMAGE_LAYOUT_TRANSFER_SRC_OPTIMAL,
+                                                aspectMask);
 
        m_vkd.cmdCopyImageToBuffer(*m_commandBuffer, *m_image, VK_IMAGE_LAYOUT_TRANSFER_SRC_OPTIMAL, *buffer, static_cast<deUint32>(copyRegions.size()), &copyRegions[0]);
        m_vkd.cmdPipelineBarrier(*m_commandBuffer, VK_PIPELINE_STAGE_TRANSFER_BIT, VK_PIPELINE_STAGE_HOST_BIT, (VkDependencyFlags)0, 0, (const VkMemoryBarrier*)DE_NULL, 1, &bufferBarrier, 0, (const VkImageMemoryBarrier*)DE_NULL);
@@ -1002,7 +1117,8 @@ de::MovePtr<TextureLevelPyramid> ImageClearingTestInstance::readImage (VkImageAs
                                                 VK_ACCESS_TRANSFER_READ_BIT,
                                                 VK_ACCESS_TRANSFER_READ_BIT,
                                                 VK_IMAGE_LAYOUT_TRANSFER_SRC_OPTIMAL,
-                                                VK_IMAGE_LAYOUT_GENERAL);
+                                                VK_IMAGE_LAYOUT_GENERAL,
+                                                aspectMask);
 
        endCommandBuffer();
        submitCommandBuffer();
@@ -1030,7 +1146,7 @@ tcu::TestStatus ImageClearingTestInstance::verifyResultImage (const std::string&
 {
        DE_ASSERT((clearCoords == UVec4()) || m_params.imageExtent.depth == 1u);
 
-       if (getIsDepthFormat(m_params.imageFormat))
+       if (getIsDepthFormat(m_params.imageFormat) && m_params.separateDepthStencilLayoutMode != SEPARATE_DEPTH_STENCIL_LAYOUT_MODE_STENCIL)
        {
                DE_ASSERT(m_imageMipLevels == 1u);
 
@@ -1059,7 +1175,7 @@ tcu::TestStatus ImageClearingTestInstance::verifyResultImage (const std::string&
                }
        }
 
-       if (getIsStencilFormat(m_params.imageFormat))
+       if (getIsStencilFormat(m_params.imageFormat) && m_params.separateDepthStencilLayoutMode != SEPARATE_DEPTH_STENCIL_LAYOUT_MODE_DEPTH)
        {
                DE_ASSERT(m_imageMipLevels == 1u);
 
@@ -1228,8 +1344,23 @@ public:
 
 TestStatus ClearDepthStencilImageTestInstance::iterate (void)
 {
-       const VkImageSubresourceRange subresourceRange  = makeImageSubresourceRange(m_imageAspectFlags, 0u, 1u,                                                 m_params.clearLayerRange.baseArrayLayer, m_twoStep ? 1 : m_params.clearLayerRange.layerCount);
-       const VkImageSubresourceRange steptwoRange              = makeImageSubresourceRange(m_imageAspectFlags, 0u, VK_REMAINING_MIP_LEVELS,    m_params.clearLayerRange.baseArrayLayer, VK_REMAINING_ARRAY_LAYERS);
+       VkImageLayout           layout  = (m_isAttachmentFormat
+                                                                       ?       VK_IMAGE_LAYOUT_DEPTH_STENCIL_ATTACHMENT_OPTIMAL
+                                                                       :       VK_IMAGE_LAYOUT_TRANSFER_DST_OPTIMAL);
+       VkImageAspectFlags      aspectMask      = m_imageAspectFlags;
+       if (m_params.separateDepthStencilLayoutMode == SEPARATE_DEPTH_STENCIL_LAYOUT_MODE_DEPTH)
+       {
+               layout = VK_IMAGE_LAYOUT_DEPTH_ATTACHMENT_OPTIMAL_KHR;
+               aspectMask = VK_IMAGE_ASPECT_DEPTH_BIT;
+       }
+       else if (m_params.separateDepthStencilLayoutMode == SEPARATE_DEPTH_STENCIL_LAYOUT_MODE_STENCIL)
+       {
+               layout = VK_IMAGE_LAYOUT_STENCIL_ATTACHMENT_OPTIMAL_KHR;
+               aspectMask = VK_IMAGE_ASPECT_STENCIL_BIT;
+       }
+
+       const VkImageSubresourceRange subresourceRange  = makeImageSubresourceRange(aspectMask, 0u, 1u,                                                 m_params.clearLayerRange.baseArrayLayer, m_twoStep ? 1 : m_params.clearLayerRange.layerCount);
+       const VkImageSubresourceRange steptwoRange              = makeImageSubresourceRange(aspectMask, 0u, VK_REMAINING_MIP_LEVELS,    m_params.clearLayerRange.baseArrayLayer, VK_REMAINING_ARRAY_LAYERS);
 
        beginCommandBuffer(0);
 
@@ -1240,9 +1371,8 @@ TestStatus ClearDepthStencilImageTestInstance::iterate (void)
                                                        ?       VK_ACCESS_DEPTH_STENCIL_ATTACHMENT_WRITE_BIT
                                                        :       VK_ACCESS_TRANSFER_WRITE_BIT),                          // VkAccessFlags                        dstAccessMask
                                                 VK_IMAGE_LAYOUT_UNDEFINED,                                                     // VkImageLayout                        oldLayout;
-                                                (m_isAttachmentFormat
-                                                       ?       VK_IMAGE_LAYOUT_DEPTH_STENCIL_ATTACHMENT_OPTIMAL
-                                                       :       VK_IMAGE_LAYOUT_TRANSFER_DST_OPTIMAL));         // VkImageLayout                        newLayout;
+                                                layout,                                                                                        // VkImageLayout                        newLayout;
+                                                aspectMask);                                                                           // VkImageAspectFlags           aspectMask;
 
        if (m_isAttachmentFormat)
        {
@@ -1253,8 +1383,9 @@ TestStatus ClearDepthStencilImageTestInstance::iterate (void)
                                                         VK_PIPELINE_STAGE_TRANSFER_BIT,                                                // VkPipelineStageFlags         dstStageMask
                                                         VK_ACCESS_DEPTH_STENCIL_ATTACHMENT_WRITE_BIT,                  // VkAccessFlags                        srcAccessMask
                                                         VK_ACCESS_TRANSFER_WRITE_BIT,                                                  // VkAccessFlags                        dstAccessMask
-                                                        VK_IMAGE_LAYOUT_DEPTH_STENCIL_ATTACHMENT_OPTIMAL,              // VkImageLayout                        oldLayout;
-                                                        VK_IMAGE_LAYOUT_TRANSFER_DST_OPTIMAL);                                 // VkImageLayout                        newLayout;
+                                                        layout,                                                                                                // VkImageLayout                        oldLayout;
+                                                        VK_IMAGE_LAYOUT_TRANSFER_DST_OPTIMAL,                                  // VkImageLayout                        newLayout;
+                                                        aspectMask);                                                                                   // VkImageAspectFlags           aspectMask;
        }
 
        m_vkd.cmdClearDepthStencilImage(*m_commandBuffer, *m_image, VK_IMAGE_LAYOUT_TRANSFER_DST_OPTIMAL, &m_params.clearValue[0].depthStencil, 1, &subresourceRange);
@@ -1267,7 +1398,8 @@ TestStatus ClearDepthStencilImageTestInstance::iterate (void)
                                                 VK_ACCESS_TRANSFER_WRITE_BIT,                                          // VkAccessFlags                        srcAccessMask
                                                 VK_ACCESS_TRANSFER_READ_BIT,                                           // VkAccessFlags                        dstAccessMask
                                                 VK_IMAGE_LAYOUT_TRANSFER_DST_OPTIMAL,                          // VkImageLayout                        oldLayout;
-                                                VK_IMAGE_LAYOUT_GENERAL);                                                      // VkImageLayout                        newLayout;
+                                                VK_IMAGE_LAYOUT_GENERAL,                                                       // VkImageLayout                        newLayout;
+                                                aspectMask);                                                                           // VkImageAspectFlags           aspectMask;
 
        endCommandBuffer();
        submitCommandBuffer();
@@ -1294,9 +1426,25 @@ public:
 
        TestStatus iterate (void)
        {
+               const bool                      isDepthStencil          = isDepthStencilFormat(m_params.imageFormat);
+               const VkAccessFlags     accessMask                      = (isDepthStencil ? VK_ACCESS_DEPTH_STENCIL_ATTACHMENT_WRITE_BIT     : VK_ACCESS_COLOR_ATTACHMENT_WRITE_BIT);
+               VkImageLayout           attachmentLayout        = (isDepthStencil ? VK_IMAGE_LAYOUT_DEPTH_STENCIL_ATTACHMENT_OPTIMAL : VK_IMAGE_LAYOUT_COLOR_ATTACHMENT_OPTIMAL);
+               VkImageAspectFlags      aspectMask                      = m_imageAspectFlags;
+
+               if (m_params.separateDepthStencilLayoutMode == SEPARATE_DEPTH_STENCIL_LAYOUT_MODE_DEPTH)
+               {
+                       attachmentLayout = VK_IMAGE_LAYOUT_DEPTH_ATTACHMENT_OPTIMAL_KHR;
+                       aspectMask = VK_IMAGE_ASPECT_DEPTH_BIT;
+               }
+               else if (m_params.separateDepthStencilLayoutMode == SEPARATE_DEPTH_STENCIL_LAYOUT_MODE_STENCIL)
+               {
+                       attachmentLayout = VK_IMAGE_LAYOUT_STENCIL_ATTACHMENT_OPTIMAL_KHR;
+                       aspectMask = VK_IMAGE_ASPECT_STENCIL_BIT;
+               }
+
                const VkClearAttachment clearAttachment =
                {
-                       m_imageAspectFlags,                                     // VkImageAspectFlags   aspectMask;
+                       aspectMask,                                                     // VkImageAspectFlags   aspectMask;
                        0u,                                                                     // deUint32                             colorAttachment;
                        m_params.clearValue[0]                          // VkClearValue                 clearValue;
                };
@@ -1352,10 +1500,6 @@ public:
                        clearRects.push_back(rects[1]);
                }
 
-               const bool                      isDepthStencil          = isDepthStencilFormat(m_params.imageFormat);
-               const VkAccessFlags     accessMask                      = (isDepthStencil ? VK_ACCESS_DEPTH_STENCIL_ATTACHMENT_WRITE_BIT     : VK_ACCESS_COLOR_ATTACHMENT_WRITE_BIT);
-               const VkImageLayout     attachmentLayout        = (isDepthStencil ? VK_IMAGE_LAYOUT_DEPTH_STENCIL_ATTACHMENT_OPTIMAL : VK_IMAGE_LAYOUT_COLOR_ATTACHMENT_OPTIMAL);
-
                beginCommandBuffer(0);
 
                pipelineImageBarrier(VK_PIPELINE_STAGE_TOP_OF_PIPE_BIT,                         // VkPipelineStageFlags         srcStageMask
@@ -1363,7 +1507,8 @@ public:
                                                         0,                                                                                             // VkAccessFlags                        srcAccessMask
                                                         accessMask,                                                                    // VkAccessFlags                        dstAccessMask
                                                         VK_IMAGE_LAYOUT_UNDEFINED,                                             // VkImageLayout                        oldLayout;
-                                                        attachmentLayout);                                                             // VkImageLayout                        newLayout;
+                                                        attachmentLayout,                                                              // VkImageLayout                        newLayout;
+                                                        aspectMask);                                                                   // VkImageAspectFlags           aspectMask;
 
                beginRenderPass(VK_SUBPASS_CONTENTS_INLINE, m_params.initValue);
                m_vkd.cmdClearAttachments(*m_commandBuffer, 1, &clearAttachment, static_cast<deUint32>(clearRects.size()), &clearRects[0]);
@@ -1374,7 +1519,8 @@ public:
                                                         accessMask,                                                                    // VkAccessFlags                        srcAccessMask
                                                         VK_ACCESS_TRANSFER_READ_BIT,                                   // VkAccessFlags                        dstAccessMask
                                                         attachmentLayout,                                                              // VkImageLayout                        oldLayout;
-                                                        VK_IMAGE_LAYOUT_GENERAL);                                              // VkImageLayout                        newLayout;
+                                                        VK_IMAGE_LAYOUT_GENERAL,                                               // VkImageLayout                        newLayout;
+                                                        aspectMask);                                                                   // VkImageAspectFlags           aspectMask;
 
                endCommandBuffer();
                submitCommandBuffer();
@@ -1790,24 +1936,25 @@ TestCaseGroup* createImageClearingTestsCommon (TestContext& testCtx, tcu::TestCa
                                                        const std::string       testCaseName    = getFormatCaseName(format) + dimensionsString;
                                                        const TestParams        testParams              =
                                                        {
-                                                               false,                                                                                                                          // bool                         useSingleMipLevel;
-                                                               imageTypesToTest[imageTypeIndex],                                                                       // VkImageType          imageType;
-                                                               format,                                                                                                                         // VkFormat                     imageFormat;
-                                                               imageTilingsToTest[imageTilingIndex],                                                           // VkImageTiling        imageTiling;
-                                                               dimensions,                                                                                                                     // VkExtent3D           imageExtent;
-                                                               imageLayerParamsToTest[imageLayerParamsIndex].imageLayerCount,          // deUint32         imageLayerCount;
+                                                               false,                                                                                                                          // bool                                                         useSingleMipLevel;
+                                                               imageTypesToTest[imageTypeIndex],                                                                       // VkImageType                                          imageType;
+                                                               format,                                                                                                                         // VkFormat                                                     imageFormat;
+                                                               imageTilingsToTest[imageTilingIndex],                                                           // VkImageTiling                                        imageTiling;
+                                                               dimensions,                                                                                                                     // VkExtent3D                                           imageExtent;
+                                                               imageLayerParamsToTest[imageLayerParamsIndex].imageLayerCount,          // deUint32                                                     imageLayerCount;
                                                                {
                                                                        0u,
                                                                        imageLayerParamsToTest[imageLayerParamsIndex].imageLayerCount
-                                                               },                                                                                                                                      // LayerRange           imageViewLayerRange;
-                                                               makeClearColorValue(format, 0.2f, 0.1f, 0.7f, 0.8f),                            // VkClearValue         initValue;
+                                                               },                                                                                                                                      // LayerRange                                           imageViewLayerRange;
+                                                               makeClearColorValue(format, 0.2f, 0.1f, 0.7f, 0.8f),                            // VkClearValue                                         initValue;
                                                                {
-                                                                       makeClearColorValue(format, 0.1f, 0.5f, 0.3f, 0.9f),                            // VkClearValue         clearValue[0];
-                                                                       makeClearColorValue(format, 0.3f, 0.6f, 0.2f, 0.7f),                            // VkClearValue         clearValue[1];
+                                                                       makeClearColorValue(format, 0.1f, 0.5f, 0.3f, 0.9f),                            // VkClearValue                                         clearValue[0];
+                                                                       makeClearColorValue(format, 0.3f, 0.6f, 0.2f, 0.7f),                            // VkClearValue                                         clearValue[1];
                                                                },
-                                                               imageLayerParamsToTest[imageLayerParamsIndex].clearLayerRange,          // LayerRange       clearLayerRange;
-                                                               allocationKind,                                                                                                         // AllocationKind       allocationKind;
-                                                               false                                                                                                                           // bool                         isCube;
+                                                               imageLayerParamsToTest[imageLayerParamsIndex].clearLayerRange,          // LayerRange                                           clearLayerRange;
+                                                               allocationKind,                                                                                                         // AllocationKind                                       allocationKind;
+                                                               false,                                                                                                                          // bool                                                         isCube;
+                                                               SEPARATE_DEPTH_STENCIL_LAYOUT_MODE_NONE,                                                        // SeparateDepthStencilLayoutMode       separateDepthStencilLayoutMode;
                                                        };
                                                        if (!imageLayerParamsToTest[imageLayerParamsIndex].twoStep)
                                                                imageLayersGroup->addChild(new InstanceFactory1<ClearColorImageTestInstance, TestParams>(testCtx, NODETYPE_SELF_VALIDATE, testCaseName, "Clear Color Image", testParams));
@@ -1844,34 +1991,46 @@ TestCaseGroup* createImageClearingTestsCommon (TestContext& testCtx, tcu::TestCa
 
                                for (size_t imageFormatIndex = 0; imageFormatIndex < numOfDepthStencilImageFormatsToTest; ++imageFormatIndex)
                                {
-                                       const VkFormat          format                  = depthStencilImageFormatsToTest[imageFormatIndex];
-                                       const std::string       testCaseName    = getFormatCaseName(format) + dimensionsString;
-                                       const TestParams        testParams              =
+                                       const VkFormat  format                                          = depthStencilImageFormatsToTest[imageFormatIndex];
+                                       const bool              hasDepth                                        = tcu::hasDepthComponent(mapVkFormat(format).order);
+                                       const bool              hasStencil                                      = tcu::hasStencilComponent(mapVkFormat(format).order);
+                                       const int               separateLayoutsLoopCount        = (hasDepth && hasStencil) ? 3 : 1;
+
+                                       for (int separateDepthStencilLayoutMode = 0; separateDepthStencilLayoutMode < separateLayoutsLoopCount; ++separateDepthStencilLayoutMode)
                                        {
-                                               true,                                                                                                                           // bool                         useSingleMipLevel;
-                                               VK_IMAGE_TYPE_2D,                                                                                                       // VkImageType          imageType;
-                                               format,                                                                                                                         // VkFormat                     format;
-                                               VK_IMAGE_TILING_OPTIMAL,                                                                                        // VkImageTiling        tiling;
-                                               dimensions,                                                                                                                     // VkExtent3D           extent;
-                                               imageLayerParamsToTest[imageLayerParamsIndex].imageLayerCount,          // deUint32         imageLayerCount;
-                                               {
-                                                       0u,
-                                                       imageLayerParamsToTest[imageLayerParamsIndex].imageLayerCount
-                                               },                                                                                                                                      // LayerRange           imageViewLayerRange;
-                                               makeClearValueDepthStencil(0.5f, 0x03),                                                         // VkClearValue         initValue
+                                               const std::string       testCaseName    = getFormatCaseName(format) +
+                                                       ((separateDepthStencilLayoutMode == SEPARATE_DEPTH_STENCIL_LAYOUT_MODE_DEPTH) ? "_separate_layouts_depth" :
+                                                        (separateDepthStencilLayoutMode == SEPARATE_DEPTH_STENCIL_LAYOUT_MODE_STENCIL) ? "_separate_layouts_stencil" :
+                                                        "")
+                                                       + dimensionsString;
+                                               const TestParams        testParams              =
                                                {
-                                                       makeClearValueDepthStencil(0.1f, 0x06),                                                         // VkClearValue         clearValue[0];
-                                                       makeClearValueDepthStencil(0.3f, 0x04),                                                         // VkClearValue         clearValue[1];
-                                               },
-                                               imageLayerParamsToTest[imageLayerParamsIndex].clearLayerRange,          // LayerRange       clearLayerRange;
-                                               allocationKind,                                                                                                         // AllocationKind       allocationKind;
-                                               false                                                                                                                           // bool                         isCube;
-                                       };
-
-                                       if (!imageLayerParamsToTest[imageLayerParamsIndex].twoStep)
-                                               imageLayersGroup->addChild(new InstanceFactory1<ClearDepthStencilImageTestInstance, TestParams>(testCtx, NODETYPE_SELF_VALIDATE, testCaseName, "Clear Depth/Stencil Image", testParams));
-                                       else
-                                               imageLayersGroup->addChild(new InstanceFactory1<TwoStepClearDepthStencilImageTestInstance, TestParams>(testCtx, NODETYPE_SELF_VALIDATE, testCaseName, "Clear Depth/Stencil Image", testParams));
+                                                       true,                                                                                                                           // bool                                                         useSingleMipLevel;
+                                                       VK_IMAGE_TYPE_2D,                                                                                                       // VkImageType                                          imageType;
+                                                       format,                                                                                                                         // VkFormat                                                     format;
+                                                       VK_IMAGE_TILING_OPTIMAL,                                                                                        // VkImageTiling                                        tiling;
+                                                       dimensions,                                                                                                                     // VkExtent3D                                           extent;
+                                                       imageLayerParamsToTest[imageLayerParamsIndex].imageLayerCount,          // deUint32                                                     imageLayerCount;
+                                                       {
+                                                               0u,
+                                                               imageLayerParamsToTest[imageLayerParamsIndex].imageLayerCount
+                                                       },                                                                                                                                      // LayerRange                                           imageViewLayerRange;
+                                                       makeClearValueDepthStencil(0.5f, 0x03),                                                         // VkClearValue                                         initValue
+                                                       {
+                                                               makeClearValueDepthStencil(0.1f, 0x06),                                                         // VkClearValue                                         clearValue[0];
+                                                               makeClearValueDepthStencil(0.3f, 0x04),                                                         // VkClearValue                                         clearValue[1];
+                                                       },
+                                                       imageLayerParamsToTest[imageLayerParamsIndex].clearLayerRange,          // LayerRange                                           clearLayerRange;
+                                                       allocationKind,                                                                                                         // AllocationKind                                       allocationKind;
+                                                       false,                                                                                                                          // bool                                                         isCube;
+                                                       SeparateDepthStencilLayoutMode(separateDepthStencilLayoutMode),         // SeparateDepthStencilLayoutMode       separateDepthStencilLayoutMode;
+                                               };
+
+                                               if (!imageLayerParamsToTest[imageLayerParamsIndex].twoStep)
+                                                       imageLayersGroup->addChild(new InstanceFactory1<ClearDepthStencilImageTestInstance, TestParams>(testCtx, NODETYPE_SELF_VALIDATE, testCaseName, "Clear Depth/Stencil Image", testParams));
+                                               else
+                                                       imageLayersGroup->addChild(new InstanceFactory1<TwoStepClearDepthStencilImageTestInstance, TestParams>(testCtx, NODETYPE_SELF_VALIDATE, testCaseName, "Clear Depth/Stencil Image", testParams));
+                                       }
                                }
                        }
                        depthStencilImageClearTests->addChild(imageLayersGroup.release());
@@ -1905,21 +2064,22 @@ TestCaseGroup* createImageClearingTestsCommon (TestContext& testCtx, tcu::TestCa
                                                const std::string       testCaseName    = getFormatCaseName(format) + dimensionsString;
                                                const TestParams        testParams              =
                                                {
-                                                       true,                                                                                                                   // bool                         useSingleMipLevel;
-                                                       VK_IMAGE_TYPE_2D,                                                                                               // VkImageType          imageType;
-                                                       format,                                                                                                                 // VkFormat                     format;
-                                                       VK_IMAGE_TILING_OPTIMAL,                                                                                // VkImageTiling        tiling;
-                                                       dimensions,                                                                                                             // VkExtent3D           extent;
-                                                       imageLayerParamsToTest[imageLayerParamsIndex].imageLayerCount,  // deUint32         imageLayerCount;
-                                                       imageLayerParamsToTest[imageLayerParamsIndex].imageViewRange,   // LayerRange           imageViewLayerRange;
-                                                       makeClearColorValue(format, 0.2f, 0.1f, 0.7f, 0.8f),                    // VkClearValue         initValue
+                                                       true,                                                                                                                   // bool                                                         useSingleMipLevel;
+                                                       VK_IMAGE_TYPE_2D,                                                                                               // VkImageType                                          imageType;
+                                                       format,                                                                                                                 // VkFormat                                                     format;
+                                                       VK_IMAGE_TILING_OPTIMAL,                                                                                // VkImageTiling                                        tiling;
+                                                       dimensions,                                                                                                             // VkExtent3D                                           extent;
+                                                       imageLayerParamsToTest[imageLayerParamsIndex].imageLayerCount,  // deUint32                                                     imageLayerCount;
+                                                       imageLayerParamsToTest[imageLayerParamsIndex].imageViewRange,   // LayerRange                                           imageViewLayerRange;
+                                                       makeClearColorValue(format, 0.2f, 0.1f, 0.7f, 0.8f),                    // VkClearValue                                         initValue
                                                        {
-                                                               makeClearColorValue(format, 0.1f, 0.5f, 0.3f, 0.9f),                    // VkClearValue         clearValue[0];
-                                                               makeClearColorValue(format, 0.3f, 0.6f, 0.2f, 0.7f),                    // VkClearValue         clearValue[1];
+                                                               makeClearColorValue(format, 0.1f, 0.5f, 0.3f, 0.9f),                    // VkClearValue                                         clearValue[0];
+                                                               makeClearColorValue(format, 0.3f, 0.6f, 0.2f, 0.7f),                    // VkClearValue                                         clearValue[1];
                                                        },
-                                                       imageLayerParamsToTest[imageLayerParamsIndex].clearLayerRange,  // LayerRange       clearLayerRange;
-                                                       allocationKind,                                                                                                 // AllocationKind       allocationKind;
-                                                       imageLayerParamsToTest[imageLayerParamsIndex].isCube                    // bool                         isCube;
+                                                       imageLayerParamsToTest[imageLayerParamsIndex].clearLayerRange,  // LayerRange                                           clearLayerRange;
+                                                       allocationKind,                                                                                                 // AllocationKind                                       allocationKind;
+                                                       imageLayerParamsToTest[imageLayerParamsIndex].isCube,                   // bool                                                         isCube;
+                                                       SEPARATE_DEPTH_STENCIL_LAYOUT_MODE_NONE,                                                // SeparateDepthStencilLayoutMode       separateDepthStencilLayoutMode;
                                                };
                                                colorAttachmentClearLayersGroup->addChild(new InstanceFactory1<ClearAttachmentTestInstance, TestParams>(testCtx, NODETYPE_SELF_VALIDATE, testCaseName, "Clear Color Attachment", testParams));
                                                if (dimensions.width > 1)
@@ -1956,29 +2116,42 @@ TestCaseGroup* createImageClearingTestsCommon (TestContext& testCtx, tcu::TestCa
 
                                        for (size_t imageFormatIndex = 0; imageFormatIndex < numOfDepthStencilImageFormatsToTest; ++imageFormatIndex)
                                        {
-                                               const VkFormat          format                  = depthStencilImageFormatsToTest[imageFormatIndex];
-                                               const std::string       testCaseName    = getFormatCaseName(format) + dimensionsString;
-                                               const TestParams        testParams              =
+                                               const VkFormat          format                                          = depthStencilImageFormatsToTest[imageFormatIndex];
+                                               const bool                      hasDepth                                        = tcu::hasDepthComponent(mapVkFormat(format).order);
+                                               const bool                      hasStencil                                      = tcu::hasStencilComponent(mapVkFormat(format).order);
+                                               const int                       separateLayoutsLoopCount        = (hasDepth && hasStencil) ? 3 : 1;
+
+                                               for (int separateDepthStencilLayoutMode = 0; separateDepthStencilLayoutMode < separateLayoutsLoopCount; ++separateDepthStencilLayoutMode)
                                                {
-                                                       true,                                                                                                                   // bool                         useSingleMipLevel;
-                                                       VK_IMAGE_TYPE_2D,                                                                                               // VkImageType          imageType;
-                                                       format,                                                                                                                 // VkFormat                     format;
-                                                       VK_IMAGE_TILING_OPTIMAL,                                                                                // VkImageTiling        tiling;
-                                                       dimensions,                                                                                                             // VkExtent3D           extent;
-                                                       imageLayerParamsToTest[imageLayerParamsIndex].imageLayerCount,  // deUint32         imageLayerCount;
-                                                       imageLayerParamsToTest[imageLayerParamsIndex].imageViewRange,   // LayerRange           imageViewLayerRange;
-                                                       makeClearValueDepthStencil(0.5f, 0x03),                                                 // VkClearValue         initValue
+                                                       const std::string       testCaseName    = getFormatCaseName(format) +
+                                                       ((separateDepthStencilLayoutMode == SEPARATE_DEPTH_STENCIL_LAYOUT_MODE_DEPTH) ? "_separate_layouts_depth" :
+                                                        (separateDepthStencilLayoutMode == SEPARATE_DEPTH_STENCIL_LAYOUT_MODE_STENCIL) ? "_separate_layouts_stencil" :
+                                                        "")
+                                                       + dimensionsString;
+
+                                                       const TestParams        testParams                                              =
                                                        {
-                                                               makeClearValueDepthStencil(0.1f, 0x06),                                                 // VkClearValue         clearValue[0];
-                                                               makeClearValueDepthStencil(0.3f, 0x04),                                                 // VkClearValue         clearValue[1];
-                                                       },
-                                                       imageLayerParamsToTest[imageLayerParamsIndex].clearLayerRange,  // LayerRange       clearLayerRange;
-                                                       allocationKind,                                                                                                 // AllocationKind       allocationKind;
-                                                       imageLayerParamsToTest[imageLayerParamsIndex].isCube                    // bool                         isCube;
-                                               };
-                                               depthStencilLayersGroup->addChild(new InstanceFactory1<ClearAttachmentTestInstance, TestParams>(testCtx, NODETYPE_SELF_VALIDATE, testCaseName, "Clear Depth/Stencil Attachment", testParams));
-                                               if (dimensions.width > 1)
-                                                       partialDepthStencilLayersGroup->addChild(new InstanceFactory1<PartialClearAttachmentTestInstance, TestParams>(testCtx, NODETYPE_SELF_VALIDATE, testCaseName, "Partial Clear Depth/Stencil Attachment", testParams));
+                                                               true,                                                                                                                   // bool                                                         useSingleMipLevel;
+                                                               VK_IMAGE_TYPE_2D,                                                                                               // VkImageType                                          imageType;
+                                                               format,                                                                                                                 // VkFormat                                                     format;
+                                                               VK_IMAGE_TILING_OPTIMAL,                                                                                // VkImageTiling                                        tiling;
+                                                               dimensions,                                                                                                             // VkExtent3D                                           extent;
+                                                               imageLayerParamsToTest[imageLayerParamsIndex].imageLayerCount,  // deUint32                                                     imageLayerCount;
+                                                               imageLayerParamsToTest[imageLayerParamsIndex].imageViewRange,   // LayerRange                                           imageViewLayerRange;
+                                                               makeClearValueDepthStencil(0.5f, 0x03),                                                 // VkClearValue                                         initValue
+                                                               {
+                                                                       makeClearValueDepthStencil(0.1f, 0x06),                                                 // VkClearValue                                         clearValue[0];
+                                                                       makeClearValueDepthStencil(0.3f, 0x04),                                                 // VkClearValue                                         clearValue[1];
+                                                               },
+                                                               imageLayerParamsToTest[imageLayerParamsIndex].clearLayerRange,  // LayerRange                                           clearLayerRange;
+                                                               allocationKind,                                                                                                 // AllocationKind                                       allocationKind;
+                                                               imageLayerParamsToTest[imageLayerParamsIndex].isCube,                   // bool                                                         isCube;
+                                                               SeparateDepthStencilLayoutMode(separateDepthStencilLayoutMode), // SeparateDepthStencilLayoutMode       separateDepthStencilLayoutMode;
+                                                       };
+                                                       depthStencilLayersGroup->addChild(new InstanceFactory1<ClearAttachmentTestInstance, TestParams>(testCtx, NODETYPE_SELF_VALIDATE, testCaseName, "Clear Depth/Stencil Attachment", testParams));
+                                                       if (dimensions.width > 1)
+                                                               partialDepthStencilLayersGroup->addChild(new InstanceFactory1<PartialClearAttachmentTestInstance, TestParams>(testCtx, NODETYPE_SELF_VALIDATE, testCaseName, "Partial Clear Depth/Stencil Attachment", testParams));
+                                               }
                                        }
                                }
                                depthStencilAttachmentClearTests->addChild(depthStencilLayersGroup.release());

diff --git a/external/vulkancts/modules/vulkan/pipeline/vktPipelineDepthTests.cpp b/external/vulkancts/modules/vulkan/pipeline/vktPipelineDepthTests.cpp
index 7a1feba..20c3d4d 100644 (file)
--- a/external/vulkancts/modules/vulkan/pipeline/vktPipelineDepthTests.cpp
+++ b/external/vulkancts/modules/vulkan/pipeline/vktPipelineDepthTests.cpp
@@ -119,6 +119,7 @@ public:
                                                                                                                                 const std::string&             description,
                                                                                                                                 const VkFormat                 depthFormat,
                                                                                                                                 const VkCompareOp              depthCompareOps[QUAD_COUNT],
+                                                                                                                                const bool                             separateDepthStencilLayouts,
                                                                                                                                 const bool                             depthBoundsTestEnable                   = false,
                                                                                                                                 const float                    depthBoundsMin                                  = 0.0f,
                                                                                                                                 const float                    depthBoundsMax                                  = 1.0f,
@@ -132,6 +133,7 @@ public:
 
 private:
        const VkFormat                                          m_depthFormat;
+       const bool                                                      m_separateDepthStencilLayouts;
        const bool                                                      m_depthBoundsTestEnable;
        const float                                                     m_depthBoundsMin;
        const float                                                     m_depthBoundsMax;
@@ -147,6 +149,7 @@ public:
                                                                                DepthTestInstance               (Context&                       context,
                                                                                                                                 const VkFormat         depthFormat,
                                                                                                                                 const VkCompareOp      depthCompareOps[DepthTest::QUAD_COUNT],
+                                                                                                                                const bool                     separateDepthStencilLayouts,
                                                                                                                                 const bool                     depthBoundsTestEnable,
                                                                                                                                 const float            depthBoundsMin,
                                                                                                                                 const float            depthBoundsMax,
@@ -164,6 +167,7 @@ private:
        const tcu::UVec2                                        m_renderSize;
        const VkFormat                                          m_colorFormat;
        const VkFormat                                          m_depthFormat;
+       const bool                                                      m_separateDepthStencilLayouts;
        const bool                                                      m_depthBoundsTestEnable;
        const float                                                     m_depthBoundsMin;
        const float                                                     m_depthBoundsMax;
@@ -208,6 +212,7 @@ DepthTest::DepthTest (tcu::TestContext&             testContext,
                                          const std::string&    description,
                                          const VkFormat                depthFormat,
                                          const VkCompareOp             depthCompareOps[QUAD_COUNT],
+                                         const bool                    separateDepthStencilLayouts,
                                          const bool                    depthBoundsTestEnable,
                                          const float                   depthBoundsMin,
                                          const float                   depthBoundsMax,
@@ -215,13 +220,14 @@ DepthTest::DepthTest (tcu::TestContext&           testContext,
                                          const bool                    stencilTestEnable,
                                          const bool                    colorAttachmentEnable)
        : vkt::TestCase (testContext, name, description)
-       , m_depthFormat                         (depthFormat)
-       , m_depthBoundsTestEnable       (depthBoundsTestEnable)
-       , m_depthBoundsMin                      (depthBoundsMin)
-       , m_depthBoundsMax                      (depthBoundsMax)
-       , m_depthTestEnable                     (depthTestEnable)
-       , m_stencilTestEnable           (stencilTestEnable)
-       , m_colorAttachmentEnable       (colorAttachmentEnable)
+       , m_depthFormat                                 (depthFormat)
+       , m_separateDepthStencilLayouts (separateDepthStencilLayouts)
+       , m_depthBoundsTestEnable               (depthBoundsTestEnable)
+       , m_depthBoundsMin                              (depthBoundsMin)
+       , m_depthBoundsMax                              (depthBoundsMax)
+       , m_depthTestEnable                             (depthTestEnable)
+       , m_stencilTestEnable                   (stencilTestEnable)
+       , m_colorAttachmentEnable               (colorAttachmentEnable)
 {
        deMemcpy(m_depthCompareOps, depthCompareOps, sizeof(VkCompareOp) * QUAD_COUNT);
 }
@@ -237,11 +243,14 @@ void DepthTest::checkSupport (Context& context) const
 
        if (!isSupportedDepthStencilFormat(context.getInstanceInterface(), context.getPhysicalDevice(), m_depthFormat))
                throw tcu::NotSupportedError(std::string("Unsupported depth/stencil format: ") + getFormatName(m_depthFormat));
+
+       if (m_separateDepthStencilLayouts && !context.isDeviceFunctionalitySupported("VK_KHR_separate_depth_stencil_layouts"))
+               TCU_THROW(NotSupportedError, "VK_KHR_separate_depth_stencil_layouts is not supported");
 }
 
 TestInstance* DepthTest::createInstance (Context& context) const
 {
-       return new DepthTestInstance(context, m_depthFormat, m_depthCompareOps, m_depthBoundsTestEnable, m_depthBoundsMin, m_depthBoundsMax, m_depthTestEnable, m_stencilTestEnable, m_colorAttachmentEnable);
+       return new DepthTestInstance(context, m_depthFormat, m_depthCompareOps, m_separateDepthStencilLayouts, m_depthBoundsTestEnable, m_depthBoundsMin, m_depthBoundsMax, m_depthTestEnable, m_stencilTestEnable, m_colorAttachmentEnable);
 }
 
 void DepthTest::initPrograms (SourceCollections& programCollection) const
@@ -291,22 +300,24 @@ void DepthTest::initPrograms (SourceCollections& programCollection) const
 DepthTestInstance::DepthTestInstance (Context&                         context,
                                                                          const VkFormat                depthFormat,
                                                                          const VkCompareOp             depthCompareOps[DepthTest::QUAD_COUNT],
+                                                                         const bool                    separateDepthStencilLayouts,
                                                                          const bool                    depthBoundsTestEnable,
                                                                          const float                   depthBoundsMin,
                                                                          const float                   depthBoundsMax,
                                                                          const bool                    depthTestEnable,
                                                                          const bool                    stencilTestEnable,
                                                                          const bool                    colorAttachmentEnable)
-       : vkt::TestInstance                     (context)
-       , m_renderSize                          (32, 32)
-       , m_colorFormat                         (colorAttachmentEnable ? VK_FORMAT_R8G8B8A8_UNORM : VK_FORMAT_UNDEFINED)
-       , m_depthFormat                         (depthFormat)
-       , m_depthBoundsTestEnable       (depthBoundsTestEnable)
-       , m_depthBoundsMin                      (depthBoundsMin)
-       , m_depthBoundsMax                      (depthBoundsMax)
-       , m_depthTestEnable                     (depthTestEnable)
-       , m_stencilTestEnable           (stencilTestEnable)
-       , m_colorAttachmentEnable       (colorAttachmentEnable)
+       : vkt::TestInstance                             (context)
+       , m_renderSize                                  (32, 32)
+       , m_colorFormat                                 (colorAttachmentEnable ? VK_FORMAT_R8G8B8A8_UNORM : VK_FORMAT_UNDEFINED)
+       , m_depthFormat                                 (depthFormat)
+       , m_separateDepthStencilLayouts (separateDepthStencilLayouts)
+       , m_depthBoundsTestEnable               (depthBoundsTestEnable)
+       , m_depthBoundsMin                              (depthBoundsMin)
+       , m_depthBoundsMax                              (depthBoundsMax)
+       , m_depthTestEnable                             (depthTestEnable)
+       , m_stencilTestEnable                   (stencilTestEnable)
+       , m_colorAttachmentEnable               (colorAttachmentEnable)
 {
        const DeviceInterface&          vk                                              = context.getDeviceInterface();
        const VkDevice                          vkDevice                                = context.getDevice();
@@ -601,7 +612,7 @@ DepthTestInstance::DepthTestInstance (Context&                              context,
 
                attachmentClearValues.push_back(defaultClearValue(m_depthFormat));
 
-               const VkImageMemoryBarrier                      colorBarrier                            =
+               const VkImageMemoryBarrier                      colorBarrier                                    =
                {
                        VK_STRUCTURE_TYPE_IMAGE_MEMORY_BARRIER,                                                                 // VkStructureType            sType;
                        DE_NULL,                                                                                                                                // const void*                pNext;
@@ -615,18 +626,26 @@ DepthTestInstance::DepthTestInstance (Context&                            context,
                        { VK_IMAGE_ASPECT_COLOR_BIT, 0u, 1u, 0u, 1u }                                                   // VkImageSubresourceRange    subresourceRange;
                };
 
-               const VkImageMemoryBarrier                      depthBarrier                            =
+               VkImageSubresourceRange                         depthBarrierSubresourceRange    = m_depthImageSubresourceRange;
+               VkImageLayout                                           newLayout                                               = VK_IMAGE_LAYOUT_DEPTH_STENCIL_ATTACHMENT_OPTIMAL;
+               if (m_separateDepthStencilLayouts)
+               {
+                       depthBarrierSubresourceRange.aspectMask = VK_IMAGE_ASPECT_DEPTH_BIT;
+                       newLayout = VK_IMAGE_LAYOUT_DEPTH_ATTACHMENT_OPTIMAL_KHR;
+               }
+
+               const VkImageMemoryBarrier                      depthBarrier                                    =
                {
                        VK_STRUCTURE_TYPE_IMAGE_MEMORY_BARRIER,                                                                 // VkStructureType            sType;
                        DE_NULL,                                                                                                                                // const void*                pNext;
                        (VkAccessFlags)0,                                                                                                               // VkAccessFlags              srcAccessMask;
                        VK_ACCESS_DEPTH_STENCIL_ATTACHMENT_WRITE_BIT,                                                   // VkAccessFlags              dstAccessMask;
                        VK_IMAGE_LAYOUT_UNDEFINED,                                                                                              // VkImageLayout              oldLayout;
-                       VK_IMAGE_LAYOUT_DEPTH_STENCIL_ATTACHMENT_OPTIMAL,                                               // VkImageLayout              newLayout;
+                       newLayout                                                                               ,                                               // VkImageLayout              newLayout;
                        VK_QUEUE_FAMILY_IGNORED,                                                                                                // uint32_t                   srcQueueFamilyIndex;
                        VK_QUEUE_FAMILY_IGNORED,                                                                                                // uint32_t                   dstQueueFamilyIndex;
                        *m_depthImage,                                                                                                                  // VkImage                    image;
-                       m_depthImageSubresourceRange,                                                                                   // VkImageSubresourceRange    subresourceRange;
+                       depthBarrierSubresourceRange,                                                                                   // VkImageSubresourceRange    subresourceRange;
                };
 
                std::vector<VkImageMemoryBarrier>       imageLayoutBarriers;
@@ -981,67 +1000,80 @@ tcu::TestCaseGroup* createDepthTests (tcu::TestContext& testCtx)
 
                        for (size_t formatNdx = 0; formatNdx < DE_LENGTH_OF_ARRAY(depthFormats); formatNdx++)
                        {
-                               de::MovePtr<tcu::TestCaseGroup> formatTest              (new tcu::TestCaseGroup(testCtx,
-                                                       getFormatCaseName(depthFormats[formatNdx]).c_str(),
-                                                       (std::string("Uses format ") + getFormatName(depthFormats[formatNdx])).c_str()));
-                               de::MovePtr<tcu::TestCaseGroup> compareOpsTests (new tcu::TestCaseGroup(testCtx, "compare_ops", "Combines depth compare operators"));
-
-                               for (size_t opsNdx = 0; opsNdx < DE_LENGTH_OF_ARRAY(depthOps); opsNdx++)
-                               {
-                                       compareOpsTests->addChild(new DepthTest(testCtx,
-                                                               getCompareOpsName(depthOps[opsNdx]),
-                                                               getCompareOpsDescription(depthOps[opsNdx]),
-                                                               depthFormats[formatNdx],
-                                                               depthOps[opsNdx]));
-
-                                       compareOpsTests->addChild(new DepthTest(testCtx,
-                                                               getCompareOpsName(depthOps[opsNdx]) + "_depth_bounds_test",
-                                                               getCompareOpsDescription(depthOps[opsNdx]) + " with depth bounds test enabled",
-                                                               depthFormats[formatNdx],
-                                                               depthOps[opsNdx],
-                                                               true,
-                                                               0.1f,
-                                                               0.25f,
-                                                               true,
-                                                               false,
-                                                               colorEnabled));
-                               }
-                               // Special VkPipelineDepthStencilStateCreateInfo known to have issues
-                               {
-                                       const VkCompareOp depthOpsSpecial[DepthTest::QUAD_COUNT] = { VK_COMPARE_OP_NEVER, VK_COMPARE_OP_NEVER, VK_COMPARE_OP_NEVER, VK_COMPARE_OP_NEVER };
-
-                                       compareOpsTests->addChild(new DepthTest(testCtx,
-                                                               "never_zerodepthbounds_depthdisabled_stencilenabled",
-                                                               "special VkPipelineDepthStencilStateCreateInfo",
-                                                               depthFormats[formatNdx],
-                                                               depthOpsSpecial,
-                                                               true,
-                                                               0.0f,
-                                                               0.0f,
-                                                               false,
-                                                               true,
-                                                               colorEnabled));
-                               }
-                               formatTest->addChild(compareOpsTests.release());
+                               const bool              hasDepth                                        = tcu::hasDepthComponent(mapVkFormat(depthFormats[formatNdx]).order);
+                               const bool              hasStencil                                      = tcu::hasStencilComponent(mapVkFormat(depthFormats[formatNdx]).order);
+                               const int               separateLayoutsLoopCount        = (hasDepth && hasStencil) ? 2 : 1;
 
-                               // Test case with depth test enabled, but depth write disabled
-                               de::MovePtr<tcu::TestCaseGroup> depthTestDisabled(new tcu::TestCaseGroup(testCtx, "depth_test_disabled", "Test for disabled depth test"));
+                               for (int separateDepthStencilLayouts = 0; separateDepthStencilLayouts < separateLayoutsLoopCount; ++separateDepthStencilLayouts)
                                {
-                                       const VkCompareOp depthOpsDepthTestDisabled[DepthTest::QUAD_COUNT] = { VK_COMPARE_OP_NEVER, VK_COMPARE_OP_LESS, VK_COMPARE_OP_GREATER, VK_COMPARE_OP_ALWAYS };
-                                       depthTestDisabled->addChild(new DepthTest(testCtx,
-                                                               "depth_write_enabled",
-                                                               "Depth writes should not occur if depth test is disabled",
-                                                               depthFormats[formatNdx],
-                                                               depthOpsDepthTestDisabled,
-                                                               false,                  /* depthBoundsTestEnable */
-                                                               0.0f,                   /* depthBoundMin*/
-                                                               1.0f,                   /* depthBoundMax*/
-                                                               false,                  /* depthTestEnable */
-                                                               false,                  /* stencilTestEnable */
-                                                               colorEnabled    /* colorAttachmentEnable */));
+                                       const bool                      useSeparateDepthStencilLayouts  = bool(separateDepthStencilLayouts);
+
+                                       de::MovePtr<tcu::TestCaseGroup> formatTest              (new tcu::TestCaseGroup(testCtx,
+                                                               (getFormatCaseName(depthFormats[formatNdx]) + ((useSeparateDepthStencilLayouts) ? "_separate_layouts" : "")).c_str(),
+                                                               (std::string("Uses format ") + getFormatName(depthFormats[formatNdx]) + ((useSeparateDepthStencilLayouts) ? " with separate depth/stencil layouts" : "")).c_str()));
+                                       de::MovePtr<tcu::TestCaseGroup> compareOpsTests (new tcu::TestCaseGroup(testCtx, "compare_ops", "Combines depth compare operators"));
+
+                                       for (size_t opsNdx = 0; opsNdx < DE_LENGTH_OF_ARRAY(depthOps); opsNdx++)
+                                       {
+                                               compareOpsTests->addChild(new DepthTest(testCtx,
+                                                                       getCompareOpsName(depthOps[opsNdx]),
+                                                                       getCompareOpsDescription(depthOps[opsNdx]),
+                                                                       depthFormats[formatNdx],
+                                                                       depthOps[opsNdx],
+                                                                       useSeparateDepthStencilLayouts));
+
+                                               compareOpsTests->addChild(new DepthTest(testCtx,
+                                                                       getCompareOpsName(depthOps[opsNdx]) + "_depth_bounds_test",
+                                                                       getCompareOpsDescription(depthOps[opsNdx]) + " with depth bounds test enabled",
+                                                                       depthFormats[formatNdx],
+                                                                       depthOps[opsNdx],
+                                                                       useSeparateDepthStencilLayouts,
+                                                                       true,
+                                                                       0.1f,
+                                                                       0.25f,
+                                                                       true,
+                                                                       false,
+                                                                       colorEnabled));
+                                       }
+                                       // Special VkPipelineDepthStencilStateCreateInfo known to have issues
+                                       {
+                                               const VkCompareOp depthOpsSpecial[DepthTest::QUAD_COUNT] = { VK_COMPARE_OP_NEVER, VK_COMPARE_OP_NEVER, VK_COMPARE_OP_NEVER, VK_COMPARE_OP_NEVER };
+
+                                               compareOpsTests->addChild(new DepthTest(testCtx,
+                                                                       "never_zerodepthbounds_depthdisabled_stencilenabled",
+                                                                       "special VkPipelineDepthStencilStateCreateInfo",
+                                                                       depthFormats[formatNdx],
+                                                                       depthOpsSpecial,
+                                                                       useSeparateDepthStencilLayouts,
+                                                                       true,
+                                                                       0.0f,
+                                                                       0.0f,
+                                                                       false,
+                                                                       true,
+                                                                       colorEnabled));
+                                       }
+                                       formatTest->addChild(compareOpsTests.release());
+
+                                       // Test case with depth test enabled, but depth write disabled
+                                       de::MovePtr<tcu::TestCaseGroup> depthTestDisabled(new tcu::TestCaseGroup(testCtx, "depth_test_disabled", "Test for disabled depth test"));
+                                       {
+                                               const VkCompareOp depthOpsDepthTestDisabled[DepthTest::QUAD_COUNT] = { VK_COMPARE_OP_NEVER, VK_COMPARE_OP_LESS, VK_COMPARE_OP_GREATER, VK_COMPARE_OP_ALWAYS };
+                                               depthTestDisabled->addChild(new DepthTest(testCtx,
+                                                                       "depth_write_enabled",
+                                                                       "Depth writes should not occur if depth test is disabled",
+                                                                       depthFormats[formatNdx],
+                                                                       depthOpsDepthTestDisabled,
+                                                                       useSeparateDepthStencilLayouts,
+                                                                       false,                  /* depthBoundsTestEnable */
+                                                                       0.0f,                   /* depthBoundMin*/
+                                                                       1.0f,                   /* depthBoundMax*/
+                                                                       false,                  /* depthTestEnable */
+                                                                       false,                  /* stencilTestEnable */
+                                                                       colorEnabled    /* colorAttachmentEnable */));
+                                       }
+                                       formatTest->addChild(depthTestDisabled.release());
+                                       formatTests->addChild(formatTest.release());
                                }
-                               formatTest->addChild(depthTestDisabled.release());
-                               formatTests->addChild(formatTest.release());
                        }
                        if (colorEnabled)
                                depthTests->addChild(formatTests.release());

diff --git a/external/vulkancts/modules/vulkan/pipeline/vktPipelineStencilTests.cpp b/external/vulkancts/modules/vulkan/pipeline/vktPipelineStencilTests.cpp
index 9b36392..5a29742 100644 (file)
--- a/external/vulkancts/modules/vulkan/pipeline/vktPipelineStencilTests.cpp
+++ b/external/vulkancts/modules/vulkan/pipeline/vktPipelineStencilTests.cpp
@@ -116,7 +116,8 @@ public:
                                                                                                                                         VkFormat                                       stencilFormat,
                                                                                                                                         const VkStencilOpState&        stencilOpStateFront,
                                                                                                                                         const VkStencilOpState&        stencilOpStateBack,
-                                                                                                                                        const bool                                     colorAttachmentEnable);
+                                                                                                                                        const bool                                     colorAttachmentEnable,
+                                                                                                                                        const bool                                     separateDepthStencilLayouts);
        virtual                                                                 ~StencilTest                    (void);
        virtual void                                                    initPrograms                    (SourceCollections& sourceCollections) const;
        virtual void                                                    checkSupport                    (Context& context) const;
@@ -127,6 +128,7 @@ private:
        const VkStencilOpState                                  m_stencilOpStateFront;
        const VkStencilOpState                                  m_stencilOpStateBack;
        const bool                                                              m_colorAttachmentEnable;
+       const bool                                                              m_separateDepthStencilLayouts;
 };
 
 class StencilTestInstance : public vkt::TestInstance
@@ -136,7 +138,8 @@ public:
                                                                                                                                 VkFormat                                       stencilFormat,
                                                                                                                                 const VkStencilOpState&        stencilOpStatesFront,
                                                                                                                                 const VkStencilOpState&        stencilOpStatesBack,
-                                                                                                                                const bool                                     colorAttachmentEnable);
+                                                                                                                                const bool                                     colorAttachmentEnable,
+                                                                                                                                const bool                                     separateDepthStencilLayouts);
        virtual                                                         ~StencilTestInstance    (void);
        virtual tcu::TestStatus                         iterate                                 (void);
 
@@ -146,6 +149,7 @@ private:
        VkStencilOpState                                        m_stencilOpStateFront;
        VkStencilOpState                                        m_stencilOpStateBack;
        const bool                                                      m_colorAttachmentEnable;
+       const bool                                                      m_separateDepthStencilLayouts;
        const tcu::UVec2                                        m_renderSize;
        const VkFormat                                          m_colorFormat;
        const VkFormat                                          m_stencilFormat;
@@ -265,12 +269,14 @@ StencilTest::StencilTest (tcu::TestContext&                       testContext,
                                                  VkFormat                                      stencilFormat,
                                                  const VkStencilOpState&       stencilOpStateFront,
                                                  const VkStencilOpState&       stencilOpStateBack,
-                                                 const bool                            colorAttachmentEnable)
-       : vkt::TestCase                         (testContext, name, description)
-       , m_stencilFormat                       (stencilFormat)
-       , m_stencilOpStateFront         (stencilOpStateFront)
-       , m_stencilOpStateBack          (stencilOpStateBack)
-       , m_colorAttachmentEnable       (colorAttachmentEnable)
+                                                 const bool                            colorAttachmentEnable,
+                                                 const bool                            separateDepthStencilLayouts)
+       : vkt::TestCase                                 (testContext, name, description)
+       , m_stencilFormat                               (stencilFormat)
+       , m_stencilOpStateFront                 (stencilOpStateFront)
+       , m_stencilOpStateBack                  (stencilOpStateBack)
+       , m_colorAttachmentEnable               (colorAttachmentEnable)
+       , m_separateDepthStencilLayouts (separateDepthStencilLayouts)
 {
 }
 
@@ -282,11 +288,14 @@ void StencilTest::checkSupport (Context& context) const
 {
        if (!isSupportedDepthStencilFormat(context.getInstanceInterface(), context.getPhysicalDevice(), m_stencilFormat))
                throw tcu::NotSupportedError(std::string("Unsupported depth/stencil format: ") + getFormatName(m_stencilFormat));
+
+       if (m_separateDepthStencilLayouts && !context.isDeviceFunctionalitySupported("VK_KHR_separate_depth_stencil_layouts"))
+               TCU_THROW(NotSupportedError, "VK_KHR_separate_depth_stencil_layouts is not supported");
 }
 
 TestInstance* StencilTest::createInstance (Context& context) const
 {
-       return new StencilTestInstance(context, m_stencilFormat, m_stencilOpStateFront, m_stencilOpStateBack, m_colorAttachmentEnable);
+       return new StencilTestInstance(context, m_stencilFormat, m_stencilOpStateFront, m_stencilOpStateBack, m_colorAttachmentEnable, m_separateDepthStencilLayouts);
 }
 
 void StencilTest::initPrograms (SourceCollections& sourceCollections) const
@@ -339,14 +348,16 @@ StencilTestInstance::StencilTestInstance (Context&                                        context,
                                                                                  VkFormat                                      stencilFormat,
                                                                                  const VkStencilOpState&       stencilOpStateFront,
                                                                                  const VkStencilOpState&       stencilOpStateBack,
-                                                                                 const bool                            colorAttachmentEnable)
-       : vkt::TestInstance                     (context)
-       , m_stencilOpStateFront         (stencilOpStateFront)
-       , m_stencilOpStateBack          (stencilOpStateBack)
-       , m_colorAttachmentEnable       (colorAttachmentEnable)
-       , m_renderSize                          (32, 32)
-       , m_colorFormat                         (colorAttachmentEnable ? VK_FORMAT_R8G8B8A8_UNORM : VK_FORMAT_UNDEFINED)
-       , m_stencilFormat                       (stencilFormat)
+                                                                                 const bool                            colorAttachmentEnable,
+                                                                                 const bool                            separateDepthStencilLayouts)
+       : vkt::TestInstance                             (context)
+       , m_stencilOpStateFront                 (stencilOpStateFront)
+       , m_stencilOpStateBack                  (stencilOpStateBack)
+       , m_colorAttachmentEnable               (colorAttachmentEnable)
+       , m_separateDepthStencilLayouts (separateDepthStencilLayouts)
+       , m_renderSize                                  (32, 32)
+       , m_colorFormat                                 (colorAttachmentEnable ? VK_FORMAT_R8G8B8A8_UNORM : VK_FORMAT_UNDEFINED)
+       , m_stencilFormat                               (stencilFormat)
 {
        const DeviceInterface&          vk                                              = context.getDeviceInterface();
        const VkDevice                          vkDevice                                = context.getDevice();
@@ -629,7 +640,7 @@ StencilTestInstance::StencilTestInstance (Context&                                  context,
 
        // Create command buffer
        {
-               const VkImageMemoryBarrier      colorImageBarrier       =
+               const VkImageMemoryBarrier      colorImageBarrier                                       =
                {
                        VK_STRUCTURE_TYPE_IMAGE_MEMORY_BARRIER,                 // VkStructureType            sType;
                        DE_NULL,                                                                                // const void*                pNext;
@@ -643,18 +654,26 @@ StencilTestInstance::StencilTestInstance (Context&                                        context,
                        { VK_IMAGE_ASPECT_COLOR_BIT, 0u, 1u, 0u, 1u }   // VkImageSubresourceRange    subresourceRange;
                };
 
-               const VkImageMemoryBarrier      stencilImageBarrier     =
+               VkImageSubresourceRange         stencilImageBarrierSubresourceRange     = m_stencilImageSubresourceRange;
+               VkImageLayout                           newLayout                                                       = VK_IMAGE_LAYOUT_DEPTH_STENCIL_ATTACHMENT_OPTIMAL;
+               if (m_separateDepthStencilLayouts)
+               {
+                       stencilImageBarrierSubresourceRange.aspectMask = VK_IMAGE_ASPECT_STENCIL_BIT;
+                       newLayout = VK_IMAGE_LAYOUT_STENCIL_ATTACHMENT_OPTIMAL_KHR;
+               }
+
+               const VkImageMemoryBarrier      stencilImageBarrier                                     =
                {
-                       VK_STRUCTURE_TYPE_IMAGE_MEMORY_BARRIER,                         // VkStructureType            sType;
-                       DE_NULL,                                                                                        // const void*                pNext;
-                       (VkAccessFlags)0,                                                                       // VkAccessFlags              srcAccessMask;
-                       VK_ACCESS_DEPTH_STENCIL_ATTACHMENT_WRITE_BIT,           // VkAccessFlags              dstAccessMask;
-                       VK_IMAGE_LAYOUT_UNDEFINED,                                                      // VkImageLayout              oldLayout;
-                       VK_IMAGE_LAYOUT_DEPTH_STENCIL_ATTACHMENT_OPTIMAL,       // VkImageLayout              newLayout;
-                       VK_QUEUE_FAMILY_IGNORED,                                                        // uint32_t                   srcQueueFamilyIndex;
-                       VK_QUEUE_FAMILY_IGNORED,                                                        // uint32_t                   dstQueueFamilyIndex;
-                       *m_stencilImage,                                                                        // VkImage                    image;
-                       m_stencilImageSubresourceRange,                                         // VkImageSubresourceRange    subresourceRange;
+                       VK_STRUCTURE_TYPE_IMAGE_MEMORY_BARRIER,                                                                 // VkStructureType            sType;
+                       DE_NULL,                                                                                                                                // const void*                pNext;
+                       (VkAccessFlags)0,                                                                                                               // VkAccessFlags              srcAccessMask;
+                       VK_ACCESS_DEPTH_STENCIL_ATTACHMENT_WRITE_BIT,                                                   // VkAccessFlags              dstAccessMask;
+                       VK_IMAGE_LAYOUT_UNDEFINED,                                                                                              // VkImageLayout              oldLayout;
+                       newLayout,                                                                                                                              // VkImageLayout              newLayout;
+                       VK_QUEUE_FAMILY_IGNORED,                                                                                                // uint32_t                   srcQueueFamilyIndex;
+                       VK_QUEUE_FAMILY_IGNORED,                                                                                                // uint32_t                   dstQueueFamilyIndex;
+                       *m_stencilImage,                                                                                                                // VkImage                    image;
+                       stencilImageBarrierSubresourceRange,                                                                    // VkImageSubresourceRange    subresourceRange;
                };
 
                std::vector<VkClearValue>                       attachmentClearValues;
@@ -904,80 +923,89 @@ tcu::TestCaseGroup* createStencilTests (tcu::TestContext& testCtx)
 
                for (size_t formatNdx = 0; formatNdx < DE_LENGTH_OF_ARRAY(stencilFormats); formatNdx++)
                {
-                       const VkFormat                                  stencilFormat   = stencilFormats[formatNdx];
-                       de::MovePtr<tcu::TestCaseGroup> formatTest              (new tcu::TestCaseGroup(testCtx,
-                                                                                                                                                                       getFormatCaseName(stencilFormat).c_str(),
-                                                                                                                                                                       (std::string("Uses format ") + getFormatName(stencilFormat)).c_str()));
+                       const VkFormat  stencilFormat                           = stencilFormats[formatNdx];
+                       const bool              hasDepth                                        = tcu::hasDepthComponent(mapVkFormat(stencilFormat).order);
+                       const bool              hasStencil                                      = tcu::hasStencilComponent(mapVkFormat(stencilFormat).order);
+                       const int               separateLayoutsLoopCount        = (hasDepth && hasStencil) ? 2 : 1;
 
-                       de::MovePtr<tcu::TestCaseGroup> stencilStateTests;
+                       for (int separateDepthStencilLayouts = 0; separateDepthStencilLayouts < separateLayoutsLoopCount; ++separateDepthStencilLayouts)
                        {
-                               std::ostringstream desc;
-                               desc << "Draws 4 quads with the following depths and dynamic stencil states: ";
+                               const bool                      useSeparateDepthStencilLayouts  = bool(separateDepthStencilLayouts);
 
-                               for (int quadNdx = 0; quadNdx < StencilTest::QUAD_COUNT; quadNdx++)
+                               de::MovePtr<tcu::TestCaseGroup> formatTest              (new tcu::TestCaseGroup(testCtx,
+                                                                                                                                                                               (getFormatCaseName(stencilFormat) + ((useSeparateDepthStencilLayouts) ? "_separate_layouts" : "")).c_str(),
+                                                                                                                                                                               (std::string("Uses format ") + getFormatName(stencilFormat) + ((useSeparateDepthStencilLayouts) ? " with separate depth/stencil layouts" : "")).c_str()));
+
+                               de::MovePtr<tcu::TestCaseGroup> stencilStateTests;
                                {
-                                       const StencilTest::StencilStateConfig& stencilConfig = StencilTest::s_stencilStateConfigs[quadNdx];
-
-                                       desc << "(" << quadNdx << ") "
-                                                << "z = " << StencilTest::s_quadDepths[quadNdx] << ", "
-                                                << "frontReadMask = " << stencilConfig.frontReadMask << ", "
-                                                << "frontWriteMask = " << stencilConfig.frontWriteMask << ", "
-                                                << "frontRef = " << stencilConfig.frontRef << ", "
-                                                << "backReadMask = " << stencilConfig.backReadMask << ", "
-                                                << "backWriteMask = " << stencilConfig.backWriteMask << ", "
-                                                << "backRef = " << stencilConfig.backRef;
-                               }
+                                       std::ostringstream desc;
+                                       desc << "Draws 4 quads with the following depths and dynamic stencil states: ";
 
-                               stencilStateTests = de::MovePtr<tcu::TestCaseGroup>(new tcu::TestCaseGroup(testCtx, "states", desc.str().c_str()));
-                       }
+                                       for (int quadNdx = 0; quadNdx < StencilTest::QUAD_COUNT; quadNdx++)
+                                       {
+                                               const StencilTest::StencilStateConfig& stencilConfig = StencilTest::s_stencilStateConfigs[quadNdx];
+
+                                               desc << "(" << quadNdx << ") "
+                                                        << "z = " << StencilTest::s_quadDepths[quadNdx] << ", "
+                                                        << "frontReadMask = " << stencilConfig.frontReadMask << ", "
+                                                        << "frontWriteMask = " << stencilConfig.frontWriteMask << ", "
+                                                        << "frontRef = " << stencilConfig.frontRef << ", "
+                                                        << "backReadMask = " << stencilConfig.backReadMask << ", "
+                                                        << "backWriteMask = " << stencilConfig.backWriteMask << ", "
+                                                        << "backRef = " << stencilConfig.backRef;
+                                       }
 
-                       stencilOpItr.reset();
+                                       stencilStateTests = de::MovePtr<tcu::TestCaseGroup>(new tcu::TestCaseGroup(testCtx, "states", desc.str().c_str()));
+                               }
 
-                       for (deUint32 failOpNdx = 0u; failOpNdx < DE_LENGTH_OF_ARRAY(stencilOps); failOpNdx++)
-                       {
-                               const std::string                               failOpName      = std::string("fail_") + getShortName(stencilOps[failOpNdx]);
-                               de::MovePtr<tcu::TestCaseGroup> failOpTest      (new tcu::TestCaseGroup(testCtx, failOpName.c_str(), ""));
+                               stencilOpItr.reset();
 
-                               for (deUint32 passOpNdx = 0u; passOpNdx < DE_LENGTH_OF_ARRAY(stencilOps); passOpNdx++)
+                               for (deUint32 failOpNdx = 0u; failOpNdx < DE_LENGTH_OF_ARRAY(stencilOps); failOpNdx++)
                                {
-                                       const std::string                               passOpName      = std::string("pass_") + getShortName(stencilOps[passOpNdx]);
-                                       de::MovePtr<tcu::TestCaseGroup> passOpTest      (new tcu::TestCaseGroup(testCtx, passOpName.c_str(), ""));
+                                       const std::string                               failOpName      = std::string("fail_") + getShortName(stencilOps[failOpNdx]);
+                                       de::MovePtr<tcu::TestCaseGroup> failOpTest      (new tcu::TestCaseGroup(testCtx, failOpName.c_str(), ""));
 
-                                       for (deUint32 dFailOpNdx = 0u; dFailOpNdx < DE_LENGTH_OF_ARRAY(stencilOps); dFailOpNdx++)
+                                       for (deUint32 passOpNdx = 0u; passOpNdx < DE_LENGTH_OF_ARRAY(stencilOps); passOpNdx++)
                                        {
-                                               const std::string                               dFailOpName     = std::string("dfail_") + getShortName(stencilOps[dFailOpNdx]);
-                                               de::MovePtr<tcu::TestCaseGroup> dFailOpTest     (new tcu::TestCaseGroup(testCtx, dFailOpName.c_str(), ""));
+                                               const std::string                               passOpName      = std::string("pass_") + getShortName(stencilOps[passOpNdx]);
+                                               de::MovePtr<tcu::TestCaseGroup> passOpTest      (new tcu::TestCaseGroup(testCtx, passOpName.c_str(), ""));
 
-                                               for (deUint32 compareOpNdx = 0u; compareOpNdx < DE_LENGTH_OF_ARRAY(compareOps); compareOpNdx++)
+                                               for (deUint32 dFailOpNdx = 0u; dFailOpNdx < DE_LENGTH_OF_ARRAY(stencilOps); dFailOpNdx++)
                                                {
-                                                       // Iterate front set of stencil state in ascending order
-                                                       const VkStencilOpState  stencilStateFront       =
+                                                       const std::string                               dFailOpName     = std::string("dfail_") + getShortName(stencilOps[dFailOpNdx]);
+                                                       de::MovePtr<tcu::TestCaseGroup> dFailOpTest     (new tcu::TestCaseGroup(testCtx, dFailOpName.c_str(), ""));
+
+                                                       for (deUint32 compareOpNdx = 0u; compareOpNdx < DE_LENGTH_OF_ARRAY(compareOps); compareOpNdx++)
                                                        {
-                                                               stencilOps[failOpNdx],          // failOp
-                                                               stencilOps[passOpNdx],          // passOp
-                                                               stencilOps[dFailOpNdx],         // depthFailOp
-                                                               compareOps[compareOpNdx],       // compareOp
-                                                               0x0,                                            // compareMask
-                                                               0x0,                                            // writeMask
-                                                               0x0                                                     // reference
-                                                       };
-
-                                                       // Iterate back set of stencil state in random order
-                                                       const VkStencilOpState  stencilStateBack        = stencilOpItr.next();
-                                                       const std::string               caseName                        = compareOpNames[compareOpNdx];
-                                                       const std::string               caseDesc                        = getStencilStateSetDescription(stencilStateFront, stencilStateBack);
-
-                                                       dFailOpTest->addChild(new StencilTest(testCtx, caseName, caseDesc, stencilFormat, stencilStateFront, stencilStateBack, colorEnabled));
+                                                               // Iterate front set of stencil state in ascending order
+                                                               const VkStencilOpState  stencilStateFront       =
+                                                               {
+                                                                       stencilOps[failOpNdx],          // failOp
+                                                                       stencilOps[passOpNdx],          // passOp
+                                                                       stencilOps[dFailOpNdx],         // depthFailOp
+                                                                       compareOps[compareOpNdx],       // compareOp
+                                                                       0x0,                                            // compareMask
+                                                                       0x0,                                            // writeMask
+                                                                       0x0                                                     // reference
+                                                               };
+
+                                                               // Iterate back set of stencil state in random order
+                                                               const VkStencilOpState  stencilStateBack        = stencilOpItr.next();
+                                                               const std::string               caseName                        = compareOpNames[compareOpNdx];
+                                                               const std::string               caseDesc                        = getStencilStateSetDescription(stencilStateFront, stencilStateBack);
+
+                                                               dFailOpTest->addChild(new StencilTest(testCtx, caseName, caseDesc, stencilFormat, stencilStateFront, stencilStateBack, colorEnabled, useSeparateDepthStencilLayouts));
+                                                       }
+                                                       passOpTest->addChild(dFailOpTest.release());
                                                }
-                                               passOpTest->addChild(dFailOpTest.release());
+                                               failOpTest->addChild(passOpTest.release());
                                        }
-                                       failOpTest->addChild(passOpTest.release());
+                                       stencilStateTests->addChild(failOpTest.release());
                                }
-                               stencilStateTests->addChild(failOpTest.release());
-                       }
 
-                       formatTest->addChild(stencilStateTests.release());
-                       formatTests->addChild(formatTest.release());
+                               formatTest->addChild(stencilStateTests.release());
+                               formatTests->addChild(formatTest.release());
+                       }
                }
 
                if (colorEnabled)

diff --git a/external/vulkancts/modules/vulkan/renderpass/vktRenderPassDepthStencilResolveTests.cpp b/external/vulkancts/modules/vulkan/renderpass/vktRenderPassDepthStencilResolveTests.cpp
index c40801c..17437ca 100644 (file)
--- a/external/vulkancts/modules/vulkan/renderpass/vktRenderPassDepthStencilResolveTests.cpp
+++ b/external/vulkancts/modules/vulkan/renderpass/vktRenderPassDepthStencilResolveTests.cpp
@@ -106,6 +106,7 @@ struct TestConfig
        VkClearDepthStencilValue        clearValue;
        float                                           depthExpectedValue;
        deUint8                                         stencilExpectedValue;
+       bool                                            separateDepthStencilLayouts;
 };
 
 float get16bitDepthComponent(deUint8* pixelPtr)
@@ -221,6 +222,9 @@ bool DepthStencilResolveTest::isFeaturesSupported()
        if (m_config.imageLayers > 1)
                m_context.requireDeviceCoreFeature(DEVICE_CORE_FEATURE_GEOMETRY_SHADER);
 
+       if (m_config.separateDepthStencilLayouts)
+               m_context.requireDeviceFunctionality("VK_KHR_separate_depth_stencil_layouts");
+
        VkPhysicalDeviceDepthStencilResolvePropertiesKHR dsResolveProperties;
        deMemset(&dsResolveProperties, 0, sizeof(VkPhysicalDeviceDepthStencilResolvePropertiesKHR));
        dsResolveProperties.sType = VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_DEPTH_STENCIL_RESOLVE_PROPERTIES_KHR;
@@ -382,10 +386,48 @@ Move<VkRenderPass> DepthStencilResolveTest::createRenderPass (void)
 {
        const VkSampleCountFlagBits samples(sampleCountBitFromSampleCount(m_config.sampleCount));
 
+       VkImageLayout layout = VK_IMAGE_LAYOUT_DEPTH_STENCIL_ATTACHMENT_OPTIMAL;
+       VkAttachmentReferenceStencilLayoutKHR stencilLayout =
+       {
+               VK_STRUCTURE_TYPE_ATTACHMENT_REFERENCE_STENCIL_LAYOUT_KHR,
+               DE_NULL,
+               VK_IMAGE_LAYOUT_UNDEFINED,
+       };
+       void * attachmentRefStencil = DE_NULL;
+       VkImageLayout finalLayout = VK_IMAGE_LAYOUT_TRANSFER_SRC_OPTIMAL;
+       VkAttachmentDescriptionStencilLayoutKHR stencilFinalLayout =
+       {
+               VK_STRUCTURE_TYPE_ATTACHMENT_DESCRIPTION_STENCIL_LAYOUT_KHR,
+               DE_NULL,
+               VK_IMAGE_LAYOUT_UNDEFINED,
+               VK_IMAGE_LAYOUT_TRANSFER_SRC_OPTIMAL,
+       };
+       void * attachmentDescriptionStencil = DE_NULL;
+
+       if (m_config.separateDepthStencilLayouts)
+       {
+               if (m_config.verifyBuffer == VB_DEPTH)
+               {
+                       layout = VK_IMAGE_LAYOUT_DEPTH_ATTACHMENT_OPTIMAL_KHR;
+                       stencilLayout.stencilLayout = VK_IMAGE_LAYOUT_GENERAL;
+                       finalLayout = VK_IMAGE_LAYOUT_TRANSFER_SRC_OPTIMAL;
+                       stencilFinalLayout.stencilFinalLayout = VK_IMAGE_LAYOUT_STENCIL_READ_ONLY_OPTIMAL_KHR; // This aspect should be unused.
+               }
+               else
+               {
+                       layout = VK_IMAGE_LAYOUT_GENERAL;
+                       stencilLayout.stencilLayout = VK_IMAGE_LAYOUT_STENCIL_ATTACHMENT_OPTIMAL_KHR;
+                       finalLayout = VK_IMAGE_LAYOUT_DEPTH_READ_ONLY_OPTIMAL_KHR; // This aspect should be unused.
+                       stencilFinalLayout.stencilFinalLayout = VK_IMAGE_LAYOUT_TRANSFER_SRC_OPTIMAL;
+               }
+               attachmentRefStencil = &stencilLayout;
+               attachmentDescriptionStencil = &stencilFinalLayout;
+       }
+
        const AttachmentDescription2 multisampleAttachment              // VkAttachmentDescription2KHR
        (
                                                                                                                        // VkStructureType                                      sType;
-               DE_NULL,                                                                                        // const void*                                          pNext;
+               attachmentDescriptionStencil,                                           // const void*                                          pNext;
                0u,                                                                                                     // VkAttachmentDescriptionFlags         flags;
                m_config.format,                                                                        // VkFormat                                                     format;
                samples,                                                                                        // VkSampleCountFlagBits                        samples;
@@ -394,21 +436,21 @@ Move<VkRenderPass> DepthStencilResolveTest::createRenderPass (void)
                VK_ATTACHMENT_LOAD_OP_CLEAR,                                            // VkAttachmentLoadOp                           stencilLoadOp;
                VK_ATTACHMENT_STORE_OP_DONT_CARE,                                       // VkAttachmentStoreOp                          stencilStoreOp;
                VK_IMAGE_LAYOUT_UNDEFINED,                                                      // VkImageLayout                                        initialLayout;
-               VK_IMAGE_LAYOUT_TRANSFER_SRC_OPTIMAL                            // VkImageLayout                                        finalLayout;
+               finalLayout                                                                                     // VkImageLayout                                        finalLayout;
        );
        const AttachmentReference2 multisampleAttachmentRef             // VkAttachmentReference2KHR
        (
                                                                                                                        // VkStructureType                                      sType;
-               DE_NULL,                                                                                        // const void*                                          pNext;
+               attachmentRefStencil,                                                           // const void*                                          pNext;
                0u,                                                                                                     // deUint32                                                     attachment;
-               VK_IMAGE_LAYOUT_DEPTH_STENCIL_ATTACHMENT_OPTIMAL,       // VkImageLayout                                        layout;
+               layout,                                                                                         // VkImageLayout                                        layout;
                0u                                                                                                      // VkImageAspectFlags                           aspectMask;
        );
 
        const AttachmentDescription2 singlesampleAttachment             // VkAttachmentDescription2KHR
        (
                                                                                                                        // VkStructureType                                      sType;
-               DE_NULL,                                                                                        // const void*                                          pNext;
+               attachmentDescriptionStencil,                                           // const void*                                          pNext;
                0u,                                                                                                     // VkAttachmentDescriptionFlags         flags;
                m_config.format,                                                                        // VkFormat                                                     format;
                VK_SAMPLE_COUNT_1_BIT,                                                          // VkSampleCountFlagBits                        samples;
@@ -417,14 +459,14 @@ Move<VkRenderPass> DepthStencilResolveTest::createRenderPass (void)
                VK_ATTACHMENT_LOAD_OP_CLEAR,                                            // VkAttachmentLoadOp                           stencilLoadOp;
                VK_ATTACHMENT_STORE_OP_STORE,                                           // VkAttachmentStoreOp                          stencilStoreOp;
                VK_IMAGE_LAYOUT_UNDEFINED,                                                      // VkImageLayout                                        initialLayout;
-               VK_IMAGE_LAYOUT_TRANSFER_SRC_OPTIMAL                            // VkImageLayout                                        finalLayout;
+               finalLayout                                                                                     // VkImageLayout                                        finalLayout;
        );
        AttachmentReference2 singlesampleAttachmentRef                  // VkAttachmentReference2KHR
        (
                                                                                                                        // VkStructureType                                      sType;
                DE_NULL,                                                                                        // const void*                                          pNext;
                1u,                                                                                                     // deUint32                                                     attachment;
-               VK_IMAGE_LAYOUT_DEPTH_STENCIL_ATTACHMENT_OPTIMAL,       // VkImageLayout                                        layout;
+               layout,                                                                                         // VkImageLayout                                        layout;
                0u                                                                                                      // VkImageAspectFlags                           aspectMask;
        );
 
@@ -743,7 +785,7 @@ void DepthStencilResolveTest::submit (void)
 
                        **m_singlesampleImage,
                        {
-                               m_config.aspectFlag,
+                               (m_config.separateDepthStencilLayouts) ? VkImageAspectFlags(testingDepth ? VK_IMAGE_ASPECT_DEPTH_BIT : VK_IMAGE_ASPECT_STENCIL_BIT) : m_config.aspectFlag,
                                0u,
                                1u,
                                0u,
@@ -761,7 +803,7 @@ void DepthStencilResolveTest::submit (void)
                0u,
                0u,
                {
-                       testingDepth ? VK_IMAGE_ASPECT_DEPTH_BIT : VK_IMAGE_ASPECT_STENCIL_BIT,
+                       VkImageAspectFlags(testingDepth ? VK_IMAGE_ASPECT_DEPTH_BIT : VK_IMAGE_ASPECT_STENCIL_BIT),
                        0u,
                        0u,
                        m_config.viewLayers,
@@ -1153,104 +1195,112 @@ void initTests (tcu::TestCaseGroup* group)
                        // iterate over depth/stencil formats
                        for (size_t formatNdx = 0; formatNdx < DE_LENGTH_OF_ARRAY(formats); formatNdx++)
                        {
-                               const FormatData&                       formatData      = formats[formatNdx];
-                               VkFormat                                        format          = formatData.format;
-                               const char*                                     formatName      = formatData.name;
-                               const bool                                      hasDepth        = formatData.hasDepth;
-                               const bool                                      hasStencil      = formatData.hasStencil;
-                               VkImageAspectFlags                      aspectFlags     = (hasDepth * VK_IMAGE_ASPECT_DEPTH_BIT) |
-                                                                                                                 (hasStencil * VK_IMAGE_ASPECT_STENCIL_BIT);
-
-                               // create test group for format
-                               de::MovePtr<tcu::TestCaseGroup> formatGroup(new tcu::TestCaseGroup(testCtx, formatName, formatName));
-
-                               // iterate over depth resolve modes
-                               for (size_t depthResolveModeNdx = 0; depthResolveModeNdx < DE_LENGTH_OF_ARRAY(resolveModes); depthResolveModeNdx++)
+                               const FormatData&                       formatData                                      = formats[formatNdx];
+                               VkFormat                                        format                                          = formatData.format;
+                               const char*                                     formatName                                      = formatData.name;
+                               const bool                                      hasDepth                                        = formatData.hasDepth;
+                               const bool                                      hasStencil                                      = formatData.hasStencil;
+                               VkImageAspectFlags                      aspectFlags                                     = (hasDepth * VK_IMAGE_ASPECT_DEPTH_BIT) |
+                                                                                                                                                 (hasStencil * VK_IMAGE_ASPECT_STENCIL_BIT);
+                               const int                                       separateLayoutsLoopCount        = (hasDepth && hasStencil) ? 2 : 1;
+
+                               for (int separateDepthStencilLayouts = 0; separateDepthStencilLayouts < separateLayoutsLoopCount; ++separateDepthStencilLayouts)
                                {
-                                       // iterate over stencil resolve modes
-                                       for (size_t stencilResolveModeNdx = 0; stencilResolveModeNdx < DE_LENGTH_OF_ARRAY(resolveModes); stencilResolveModeNdx++)
-                                       {
-                                               // there is no average resolve mode for stencil - go to next iteration
-                                               ResolveModeData& sResolve = resolveModes[stencilResolveModeNdx];
-                                               if (sResolve.flag == VK_RESOLVE_MODE_AVERAGE_BIT_KHR)
-                                                       continue;
+                                       const bool                      useSeparateDepthStencilLayouts  = bool(separateDepthStencilLayouts);
+                                       const std::string       groupName                                               = std::string(formatName) + ((useSeparateDepthStencilLayouts) ? "_separate_layouts" : "");
 
-                                               // if pDepthStencilResolveAttachment is not NULL and does not have the value VK_ATTACHMENT_UNUSED,
-                                               // depthResolveMode and stencilResolveMode must not both be VK_RESOLVE_MODE_NONE_KHR
-                                               ResolveModeData& dResolve = resolveModes[depthResolveModeNdx];
-                                               if ((dResolve.flag == VK_RESOLVE_MODE_NONE_KHR) && (sResolve.flag == VK_RESOLVE_MODE_NONE_KHR))
-                                                       continue;
+                                       // create test group for format
+                                       de::MovePtr<tcu::TestCaseGroup> formatGroup(new tcu::TestCaseGroup(testCtx, groupName.c_str(), groupName.c_str()));
 
-                                               // If there is no depth, the depth resolve mode should be NONE, or
-                                               // match the stencil resolve mode.
-                                               if (!hasDepth && (dResolve.flag != VK_RESOLVE_MODE_NONE_KHR) &&
-                                                       (dResolve.flag != sResolve.flag))
-                                                       continue;
-
-                                               // If there is no stencil, the stencil resmove mode should be NONE, or
-                                               // match the depth resolve mode.
-                                               if (!hasStencil && (sResolve.flag != VK_RESOLVE_MODE_NONE_KHR) &&
-                                                       (dResolve.flag != sResolve.flag))
-                                                       continue;
-
-                                               std::string baseName = "depth_" + dResolve.name + "_stencil_" + sResolve.name;
-
-                                               if (hasDepth)
+                                       // iterate over depth resolve modes
+                                       for (size_t depthResolveModeNdx = 0; depthResolveModeNdx < DE_LENGTH_OF_ARRAY(resolveModes); depthResolveModeNdx++)
+                                       {
+                                               // iterate over stencil resolve modes
+                                               for (size_t stencilResolveModeNdx = 0; stencilResolveModeNdx < DE_LENGTH_OF_ARRAY(resolveModes); stencilResolveModeNdx++)
                                                {
-                                                       std::string     name                    = baseName + "_testing_depth";
-                                                       const char*     testName                = name.c_str();
-                                                       float           expectedValue   = depthExpectedValue[depthResolveModeNdx][sampleCountNdx];
-
-                                                       const TestConfig testConfig =
+                                                       // there is no average resolve mode for stencil - go to next iteration
+                                                       ResolveModeData& sResolve = resolveModes[stencilResolveModeNdx];
+                                                       if (sResolve.flag == VK_RESOLVE_MODE_AVERAGE_BIT_KHR)
+                                                               continue;
+
+                                                       // if pDepthStencilResolveAttachment is not NULL and does not have the value VK_ATTACHMENT_UNUSED,
+                                                       // depthResolveMode and stencilResolveMode must not both be VK_RESOLVE_MODE_NONE_KHR
+                                                       ResolveModeData& dResolve = resolveModes[depthResolveModeNdx];
+                                                       if ((dResolve.flag == VK_RESOLVE_MODE_NONE_KHR) && (sResolve.flag == VK_RESOLVE_MODE_NONE_KHR))
+                                                               continue;
+
+                                                       // If there is no depth, the depth resolve mode should be NONE, or
+                                                       // match the stencil resolve mode.
+                                                       if (!hasDepth && (dResolve.flag != VK_RESOLVE_MODE_NONE_KHR) &&
+                                                               (dResolve.flag != sResolve.flag))
+                                                               continue;
+
+                                                       // If there is no stencil, the stencil resmove mode should be NONE, or
+                                                       // match the depth resolve mode.
+                                                       if (!hasStencil && (sResolve.flag != VK_RESOLVE_MODE_NONE_KHR) &&
+                                                               (dResolve.flag != sResolve.flag))
+                                                               continue;
+
+                                                       std::string baseName = "depth_" + dResolve.name + "_stencil_" + sResolve.name;
+
+                                                       if (hasDepth)
                                                        {
-                                                               format,
-                                                               imageData.width,
-                                                               imageData.height,
-                                                               1u,
-                                                               1u,
-                                                               0u,
-                                                               imageData.renderArea,
-                                                               aspectFlags,
-                                                               sampleCount,
-                                                               dResolve.flag,
-                                                               sResolve.flag,
-                                                               VB_DEPTH,
-                                                               imageData.clearValue,
-                                                               expectedValue,
-                                                               0u
-                                                       };
-                                                       formatGroup->addChild(new DSResolveTestInstance(testCtx, tcu::NODETYPE_SELF_VALIDATE, testName, testName, testConfig));
-                                               }
-                                               if (hasStencil)
-                                               {
-                                                       std::string     name                    = baseName + "_testing_stencil";
-                                                       const char*     testName                = name.c_str();
-                                                       deUint8         expectedValue   = stencilExpectedValue[stencilResolveModeNdx][sampleCountNdx];
-
-                                                       const TestConfig testConfig =
+                                                               std::string     name                    = baseName + "_testing_depth";
+                                                               const char*     testName                = name.c_str();
+                                                               float           expectedValue   = depthExpectedValue[depthResolveModeNdx][sampleCountNdx];
+
+                                                               const TestConfig testConfig =
+                                                               {
+                                                                       format,
+                                                                       imageData.width,
+                                                                       imageData.height,
+                                                                       1u,
+                                                                       1u,
+                                                                       0u,
+                                                                       imageData.renderArea,
+                                                                       aspectFlags,
+                                                                       sampleCount,
+                                                                       dResolve.flag,
+                                                                       sResolve.flag,
+                                                                       VB_DEPTH,
+                                                                       imageData.clearValue,
+                                                                       expectedValue,
+                                                                       0u,
+                                                                       useSeparateDepthStencilLayouts
+                                                               };
+                                                               formatGroup->addChild(new DSResolveTestInstance(testCtx, tcu::NODETYPE_SELF_VALIDATE, testName, testName, testConfig));
+                                                       }
+                                                       if (hasStencil)
                                                        {
-                                                               format,
-                                                               imageData.width,
-                                                               imageData.height,
-                                                               1u,
-                                                               1u,
-                                                               0u,
-                                                               imageData.renderArea,
-                                                               aspectFlags,
-                                                               sampleCount,
-                                                               dResolve.flag,
-                                                               sResolve.flag,
-                                                               VB_STENCIL,
-                                                               imageData.clearValue,
-                                                               0.0f,
-                                                               expectedValue
-                                                       };
-                                                       formatGroup->addChild(new DSResolveTestInstance(testCtx, tcu::NODETYPE_SELF_VALIDATE, testName, testName, testConfig));
+                                                               std::string     name                    = baseName + "_testing_stencil";
+                                                               const char*     testName                = name.c_str();
+                                                               deUint8         expectedValue   = stencilExpectedValue[stencilResolveModeNdx][sampleCountNdx];
+
+                                                               const TestConfig testConfig =
+                                                               {
+                                                                       format,
+                                                                       imageData.width,
+                                                                       imageData.height,
+                                                                       1u,
+                                                                       1u,
+                                                                       0u,
+                                                                       imageData.renderArea,
+                                                                       aspectFlags,
+                                                                       sampleCount,
+                                                                       dResolve.flag,
+                                                                       sResolve.flag,
+                                                                       VB_STENCIL,
+                                                                       imageData.clearValue,
+                                                                       0.0f,
+                                                                       expectedValue,
+                                                                       useSeparateDepthStencilLayouts
+                                                               };
+                                                               formatGroup->addChild(new DSResolveTestInstance(testCtx, tcu::NODETYPE_SELF_VALIDATE, testName, testName, testConfig));
+                                                       }
                                                }
                                        }
+                                       sampleGroup->addChild(formatGroup.release());
                                }
-
-                               sampleGroup->addChild(formatGroup.release());
                        }
 
                        imageGroup->addChild(sampleGroup.release());
@@ -1282,78 +1332,87 @@ void initTests (tcu::TestCaseGroup* group)
                        // iterate over depth/stencil formats
                        for (size_t formatNdx = 0; formatNdx < DE_LENGTH_OF_ARRAY(formats); formatNdx++)
                        {
-                               const FormatData&                       formatData      = formats[formatNdx];
-                               VkFormat                                        format          = formatData.format;
-                               const char*                                     formatName      = formatData.name;
-                               const bool                                      hasDepth        = formatData.hasDepth;
-                               const bool                                      hasStencil      = formatData.hasStencil;
-                               VkImageAspectFlags                      aspectFlags     = (hasDepth * VK_IMAGE_ASPECT_DEPTH_BIT) |
-                                                                                                                 (hasStencil * VK_IMAGE_ASPECT_STENCIL_BIT);
-
-                               // create test group for format
-                               de::MovePtr<tcu::TestCaseGroup> formatGroup(new tcu::TestCaseGroup(testCtx, formatName, formatName));
-
-                               for (size_t resolveModeNdx = 0; resolveModeNdx < DE_LENGTH_OF_ARRAY(resolveModes); resolveModeNdx++)
+                               const FormatData&                       formatData                                      = formats[formatNdx];
+                               VkFormat                                        format                                          = formatData.format;
+                               const char*                                     formatName                                      = formatData.name;
+                               const bool                                      hasDepth                                        = formatData.hasDepth;
+                               const bool                                      hasStencil                                      = formatData.hasStencil;
+                               VkImageAspectFlags                      aspectFlags                                     = (hasDepth * VK_IMAGE_ASPECT_DEPTH_BIT) |
+                                                                                                                                                 (hasStencil * VK_IMAGE_ASPECT_STENCIL_BIT);
+                               const int                                       separateLayoutsLoopCount        = (hasDepth && hasStencil) ? 2 : 1;
+
+                               for (int separateDepthStencilLayouts = 0; separateDepthStencilLayouts < separateLayoutsLoopCount; ++separateDepthStencilLayouts)
                                {
-                                       ResolveModeData& mode = resolveModes[resolveModeNdx];
+                                       const bool                      useSeparateDepthStencilLayouts  = bool(separateDepthStencilLayouts);
+                                       const std::string       groupName                                               = std::string(formatName) + ((useSeparateDepthStencilLayouts) ? "_separate_layouts" : "");
+
+                                       // create test group for format
+                                       de::MovePtr<tcu::TestCaseGroup> formatGroup(new tcu::TestCaseGroup(testCtx, groupName.c_str(), groupName.c_str()));
 
-                                       if (hasDepth)
+                                       for (size_t resolveModeNdx = 0; resolveModeNdx < DE_LENGTH_OF_ARRAY(resolveModes); resolveModeNdx++)
                                        {
-                                               std::string     name                    = "depth_" + mode.name;
-                                               const char*     testName                = name.c_str();
-                                               float           expectedValue   = depthExpectedValue[resolveModeNdx][sampleCountNdx];
-                                               const TestConfig testConfig =
+                                               ResolveModeData& mode = resolveModes[resolveModeNdx];
+
+                                               if (hasDepth)
                                                {
-                                                       format,
-                                                       layeredTextureTestData.width,
-                                                       layeredTextureTestData.height,
-                                                       layeredTextureTestData.imageLayers,
-                                                       3u,
-                                                       0u,
-                                                       layeredTextureTestData.renderArea,
-                                                       aspectFlags,
-                                                       sampleCount,
-                                                       mode.flag,
-                                                       VK_RESOLVE_MODE_SAMPLE_ZERO_BIT_KHR,
-                                                       VB_DEPTH,
-                                                       layeredTextureTestData.clearValue,
-                                                       expectedValue,
-                                                       0u
-                                               };
-                                               formatGroup->addChild(new DSResolveTestInstance(testCtx, tcu::NODETYPE_SELF_VALIDATE, testName, testName, testConfig));
-                                       }
+                                                       std::string     name                    = "depth_" + mode.name;
+                                                       const char*     testName                = name.c_str();
+                                                       float           expectedValue   = depthExpectedValue[resolveModeNdx][sampleCountNdx];
+                                                       const TestConfig testConfig =
+                                                       {
+                                                               format,
+                                                               layeredTextureTestData.width,
+                                                               layeredTextureTestData.height,
+                                                               layeredTextureTestData.imageLayers,
+                                                               3u,
+                                                               0u,
+                                                               layeredTextureTestData.renderArea,
+                                                               aspectFlags,
+                                                               sampleCount,
+                                                               mode.flag,
+                                                               VK_RESOLVE_MODE_SAMPLE_ZERO_BIT_KHR,
+                                                               VB_DEPTH,
+                                                               layeredTextureTestData.clearValue,
+                                                               expectedValue,
+                                                               0u,
+                                                               useSeparateDepthStencilLayouts
+                                                       };
+                                                       formatGroup->addChild(new DSResolveTestInstance(testCtx, tcu::NODETYPE_SELF_VALIDATE, testName, testName, testConfig));
+                                               }
 
-                                       // there is no average resolve mode for stencil - go to next iteration
-                                       if (mode.flag == VK_RESOLVE_MODE_AVERAGE_BIT_KHR)
-                                               continue;
+                                               // there is no average resolve mode for stencil - go to next iteration
+                                               if (mode.flag == VK_RESOLVE_MODE_AVERAGE_BIT_KHR)
+                                                       continue;
 
-                                       if (hasStencil)
-                                       {
-                                               std::string     name                    = "stencil_" + mode.name;
-                                               const char*     testName                = name.c_str();
-                                               deUint8         expectedValue   = stencilExpectedValue[resolveModeNdx][sampleCountNdx];
-                                               const TestConfig testConfig =
+                                               if (hasStencil)
                                                {
-                                                       format,
-                                                       layeredTextureTestData.width,
-                                                       layeredTextureTestData.height,
-                                                       layeredTextureTestData.imageLayers,
-                                                       3u,
-                                                       0u,
-                                                       layeredTextureTestData.renderArea,
-                                                       aspectFlags,
-                                                       sampleCount,
-                                                       VK_RESOLVE_MODE_SAMPLE_ZERO_BIT_KHR,
-                                                       mode.flag,
-                                                       VB_STENCIL,
-                                                       layeredTextureTestData.clearValue,
-                                                       0.0f,
-                                                       expectedValue
-                                               };
-                                               formatGroup->addChild(new DSResolveTestInstance(testCtx, tcu::NODETYPE_SELF_VALIDATE, testName, testName, testConfig));
+                                                       std::string     name                    = "stencil_" + mode.name;
+                                                       const char*     testName                = name.c_str();
+                                                       deUint8         expectedValue   = stencilExpectedValue[resolveModeNdx][sampleCountNdx];
+                                                       const TestConfig testConfig =
+                                                       {
+                                                               format,
+                                                               layeredTextureTestData.width,
+                                                               layeredTextureTestData.height,
+                                                               layeredTextureTestData.imageLayers,
+                                                               3u,
+                                                               0u,
+                                                               layeredTextureTestData.renderArea,
+                                                               aspectFlags,
+                                                               sampleCount,
+                                                               VK_RESOLVE_MODE_SAMPLE_ZERO_BIT_KHR,
+                                                               mode.flag,
+                                                               VB_STENCIL,
+                                                               layeredTextureTestData.clearValue,
+                                                               0.0f,
+                                                               expectedValue,
+                                                               useSeparateDepthStencilLayouts
+                                                       };
+                                                       formatGroup->addChild(new DSResolveTestInstance(testCtx, tcu::NODETYPE_SELF_VALIDATE, testName, testName, testConfig));
+                                               }
                                        }
+                                       sampleGroup->addChild(formatGroup.release());
                                }
-                               sampleGroup->addChild(formatGroup.release());
                        }
                        imageGroup->addChild(sampleGroup.release());
                }

diff --git a/external/vulkancts/mustpass/master/vk-default-no-waivers.txt b/external/vulkancts/mustpass/master/vk-default-no-waivers.txt
index dab01dc..8bce20d 100644 (file)
--- a/external/vulkancts/mustpass/master/vk-default-no-waivers.txt
+++ b/external/vulkancts/mustpass/master/vk-default-no-waivers.txt
@@ -22679,14 +22679,26 @@ dEQP-VK.api.copy_and_blit.core.image_to_image.all_formats.depth_stencil.3d_d16_u
 dEQP-VK.api.copy_and_blit.core.image_to_image.all_formats.depth_stencil.3d_d16_unorm_s8_uint_d16_unorm_s8_uint.optimal_general
 dEQP-VK.api.copy_and_blit.core.image_to_image.all_formats.depth_stencil.3d_d16_unorm_s8_uint_d16_unorm_s8_uint.general_optimal
 dEQP-VK.api.copy_and_blit.core.image_to_image.all_formats.depth_stencil.3d_d16_unorm_s8_uint_d16_unorm_s8_uint.general_general
+dEQP-VK.api.copy_and_blit.core.image_to_image.all_formats.depth_stencil.d16_unorm_s8_uint_d16_unorm_s8_uint_separate_layouts.optimal_optimal
+dEQP-VK.api.copy_and_blit.core.image_to_image.all_formats.depth_stencil.d16_unorm_s8_uint_d16_unorm_s8_uint_separate_layouts.optimal_general
+dEQP-VK.api.copy_and_blit.core.image_to_image.all_formats.depth_stencil.d16_unorm_s8_uint_d16_unorm_s8_uint_separate_layouts.general_optimal
+dEQP-VK.api.copy_and_blit.core.image_to_image.all_formats.depth_stencil.d16_unorm_s8_uint_d16_unorm_s8_uint_separate_layouts.general_general
 dEQP-VK.api.copy_and_blit.core.image_to_image.all_formats.depth_stencil.3d_d24_unorm_s8_uint_d24_unorm_s8_uint.optimal_optimal
 dEQP-VK.api.copy_and_blit.core.image_to_image.all_formats.depth_stencil.3d_d24_unorm_s8_uint_d24_unorm_s8_uint.optimal_general
 dEQP-VK.api.copy_and_blit.core.image_to_image.all_formats.depth_stencil.3d_d24_unorm_s8_uint_d24_unorm_s8_uint.general_optimal
 dEQP-VK.api.copy_and_blit.core.image_to_image.all_formats.depth_stencil.3d_d24_unorm_s8_uint_d24_unorm_s8_uint.general_general
+dEQP-VK.api.copy_and_blit.core.image_to_image.all_formats.depth_stencil.d24_unorm_s8_uint_d24_unorm_s8_uint_separate_layouts.optimal_optimal
+dEQP-VK.api.copy_and_blit.core.image_to_image.all_formats.depth_stencil.d24_unorm_s8_uint_d24_unorm_s8_uint_separate_layouts.optimal_general
+dEQP-VK.api.copy_and_blit.core.image_to_image.all_formats.depth_stencil.d24_unorm_s8_uint_d24_unorm_s8_uint_separate_layouts.general_optimal
+dEQP-VK.api.copy_and_blit.core.image_to_image.all_formats.depth_stencil.d24_unorm_s8_uint_d24_unorm_s8_uint_separate_layouts.general_general
 dEQP-VK.api.copy_and_blit.core.image_to_image.all_formats.depth_stencil.3d_d32_sfloat_s8_uint_d32_sfloat_s8_uint.optimal_optimal
 dEQP-VK.api.copy_and_blit.core.image_to_image.all_formats.depth_stencil.3d_d32_sfloat_s8_uint_d32_sfloat_s8_uint.optimal_general
 dEQP-VK.api.copy_and_blit.core.image_to_image.all_formats.depth_stencil.3d_d32_sfloat_s8_uint_d32_sfloat_s8_uint.general_optimal
 dEQP-VK.api.copy_and_blit.core.image_to_image.all_formats.depth_stencil.3d_d32_sfloat_s8_uint_d32_sfloat_s8_uint.general_general
+dEQP-VK.api.copy_and_blit.core.image_to_image.all_formats.depth_stencil.d32_sfloat_s8_uint_d32_sfloat_s8_uint_separate_layouts.optimal_optimal
+dEQP-VK.api.copy_and_blit.core.image_to_image.all_formats.depth_stencil.d32_sfloat_s8_uint_d32_sfloat_s8_uint_separate_layouts.optimal_general
+dEQP-VK.api.copy_and_blit.core.image_to_image.all_formats.depth_stencil.d32_sfloat_s8_uint_d32_sfloat_s8_uint_separate_layouts.general_optimal
+dEQP-VK.api.copy_and_blit.core.image_to_image.all_formats.depth_stencil.d32_sfloat_s8_uint_d32_sfloat_s8_uint_separate_layouts.general_general
 dEQP-VK.api.copy_and_blit.core.image_to_image.3d_images.3d_to_2d_by_slices
 dEQP-VK.api.copy_and_blit.core.image_to_image.3d_images.2d_to_3d_by_layers
 dEQP-VK.api.copy_and_blit.core.image_to_image.3d_images.3d_to_2d_whole
@@ -72464,14 +72476,26 @@ dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.depth_stencil.3d_d16_unorm
 dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.depth_stencil.3d_d16_unorm_s8_uint_d16_unorm_s8_uint.optimal_general_nearest
 dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.depth_stencil.3d_d16_unorm_s8_uint_d16_unorm_s8_uint.general_optimal_nearest
 dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.depth_stencil.3d_d16_unorm_s8_uint_d16_unorm_s8_uint.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.depth_stencil.d16_unorm_s8_uint_d16_unorm_s8_uint_separate_layouts.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.depth_stencil.d16_unorm_s8_uint_d16_unorm_s8_uint_separate_layouts.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.depth_stencil.d16_unorm_s8_uint_d16_unorm_s8_uint_separate_layouts.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.depth_stencil.d16_unorm_s8_uint_d16_unorm_s8_uint_separate_layouts.general_general_nearest
 dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.depth_stencil.3d_d24_unorm_s8_uint_d24_unorm_s8_uint.optimal_optimal_nearest
 dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.depth_stencil.3d_d24_unorm_s8_uint_d24_unorm_s8_uint.optimal_general_nearest
 dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.depth_stencil.3d_d24_unorm_s8_uint_d24_unorm_s8_uint.general_optimal_nearest
 dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.depth_stencil.3d_d24_unorm_s8_uint_d24_unorm_s8_uint.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.depth_stencil.d24_unorm_s8_uint_d24_unorm_s8_uint_separate_layouts.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.depth_stencil.d24_unorm_s8_uint_d24_unorm_s8_uint_separate_layouts.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.depth_stencil.d24_unorm_s8_uint_d24_unorm_s8_uint_separate_layouts.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.depth_stencil.d24_unorm_s8_uint_d24_unorm_s8_uint_separate_layouts.general_general_nearest
 dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.depth_stencil.3d_d32_sfloat_s8_uint_d32_sfloat_s8_uint.optimal_optimal_nearest
 dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.depth_stencil.3d_d32_sfloat_s8_uint_d32_sfloat_s8_uint.optimal_general_nearest
 dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.depth_stencil.3d_d32_sfloat_s8_uint_d32_sfloat_s8_uint.general_optimal_nearest
 dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.depth_stencil.3d_d32_sfloat_s8_uint_d32_sfloat_s8_uint.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.depth_stencil.d32_sfloat_s8_uint_d32_sfloat_s8_uint_separate_layouts.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.depth_stencil.d32_sfloat_s8_uint_d32_sfloat_s8_uint_separate_layouts.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.depth_stencil.d32_sfloat_s8_uint_d32_sfloat_s8_uint_separate_layouts.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.depth_stencil.d32_sfloat_s8_uint_d32_sfloat_s8_uint_separate_layouts.general_general_nearest
 dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8_uint.optimal_optimal_nearest
 dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8_uint.optimal_general_nearest
 dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8_uint.general_optimal_nearest
@@ -77121,14 +77145,26 @@ dEQP-VK.api.copy_and_blit.dedicated_allocation.image_to_image.all_formats.depth_
 dEQP-VK.api.copy_and_blit.dedicated_allocation.image_to_image.all_formats.depth_stencil.3d_d16_unorm_s8_uint_d16_unorm_s8_uint.optimal_general
 dEQP-VK.api.copy_and_blit.dedicated_allocation.image_to_image.all_formats.depth_stencil.3d_d16_unorm_s8_uint_d16_unorm_s8_uint.general_optimal
 dEQP-VK.api.copy_and_blit.dedicated_allocation.image_to_image.all_formats.depth_stencil.3d_d16_unorm_s8_uint_d16_unorm_s8_uint.general_general
+dEQP-VK.api.copy_and_blit.dedicated_allocation.image_to_image.all_formats.depth_stencil.d16_unorm_s8_uint_d16_unorm_s8_uint_separate_layouts.optimal_optimal
+dEQP-VK.api.copy_and_blit.dedicated_allocation.image_to_image.all_formats.depth_stencil.d16_unorm_s8_uint_d16_unorm_s8_uint_separate_layouts.optimal_general
+dEQP-VK.api.copy_and_blit.dedicated_allocation.image_to_image.all_formats.depth_stencil.d16_unorm_s8_uint_d16_unorm_s8_uint_separate_layouts.general_optimal
+dEQP-VK.api.copy_and_blit.dedicated_allocation.image_to_image.all_formats.depth_stencil.d16_unorm_s8_uint_d16_unorm_s8_uint_separate_layouts.general_general
 dEQP-VK.api.copy_and_blit.dedicated_allocation.image_to_image.all_formats.depth_stencil.3d_d24_unorm_s8_uint_d24_unorm_s8_uint.optimal_optimal
 dEQP-VK.api.copy_and_blit.dedicated_allocation.image_to_image.all_formats.depth_stencil.3d_d24_unorm_s8_uint_d24_unorm_s8_uint.optimal_general
 dEQP-VK.api.copy_and_blit.dedicated_allocation.image_to_image.all_formats.depth_stencil.3d_d24_unorm_s8_uint_d24_unorm_s8_uint.general_optimal
 dEQP-VK.api.copy_and_blit.dedicated_allocation.image_to_image.all_formats.depth_stencil.3d_d24_unorm_s8_uint_d24_unorm_s8_uint.general_general
+dEQP-VK.api.copy_and_blit.dedicated_allocation.image_to_image.all_formats.depth_stencil.d24_unorm_s8_uint_d24_unorm_s8_uint_separate_layouts.optimal_optimal
+dEQP-VK.api.copy_and_blit.dedicated_allocation.image_to_image.all_formats.depth_stencil.d24_unorm_s8_uint_d24_unorm_s8_uint_separate_layouts.optimal_general
+dEQP-VK.api.copy_and_blit.dedicated_allocation.image_to_image.all_formats.depth_stencil.d24_unorm_s8_uint_d24_unorm_s8_uint_separate_layouts.general_optimal
+dEQP-VK.api.copy_and_blit.dedicated_allocation.image_to_image.all_formats.depth_stencil.d24_unorm_s8_uint_d24_unorm_s8_uint_separate_layouts.general_general
 dEQP-VK.api.copy_and_blit.dedicated_allocation.image_to_image.all_formats.depth_stencil.3d_d32_sfloat_s8_uint_d32_sfloat_s8_uint.optimal_optimal
 dEQP-VK.api.copy_and_blit.dedicated_allocation.image_to_image.all_formats.depth_stencil.3d_d32_sfloat_s8_uint_d32_sfloat_s8_uint.optimal_general
 dEQP-VK.api.copy_and_blit.dedicated_allocation.image_to_image.all_formats.depth_stencil.3d_d32_sfloat_s8_uint_d32_sfloat_s8_uint.general_optimal
 dEQP-VK.api.copy_and_blit.dedicated_allocation.image_to_image.all_formats.depth_stencil.3d_d32_sfloat_s8_uint_d32_sfloat_s8_uint.general_general
+dEQP-VK.api.copy_and_blit.dedicated_allocation.image_to_image.all_formats.depth_stencil.d32_sfloat_s8_uint_d32_sfloat_s8_uint_separate_layouts.optimal_optimal
+dEQP-VK.api.copy_and_blit.dedicated_allocation.image_to_image.all_formats.depth_stencil.d32_sfloat_s8_uint_d32_sfloat_s8_uint_separate_layouts.optimal_general
+dEQP-VK.api.copy_and_blit.dedicated_allocation.image_to_image.all_formats.depth_stencil.d32_sfloat_s8_uint_d32_sfloat_s8_uint_separate_layouts.general_optimal
+dEQP-VK.api.copy_and_blit.dedicated_allocation.image_to_image.all_formats.depth_stencil.d32_sfloat_s8_uint_d32_sfloat_s8_uint_separate_layouts.general_general
 dEQP-VK.api.copy_and_blit.dedicated_allocation.image_to_image.3d_images.3d_to_2d_by_slices
 dEQP-VK.api.copy_and_blit.dedicated_allocation.image_to_image.3d_images.2d_to_3d_by_layers
 dEQP-VK.api.copy_and_blit.dedicated_allocation.image_to_image.3d_images.3d_to_2d_whole
@@ -82050,14 +82086,26 @@ dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.depth_sten
 dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.depth_stencil.3d_d16_unorm_s8_uint_d16_unorm_s8_uint.optimal_general_nearest
 dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.depth_stencil.3d_d16_unorm_s8_uint_d16_unorm_s8_uint.general_optimal_nearest
 dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.depth_stencil.3d_d16_unorm_s8_uint_d16_unorm_s8_uint.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.depth_stencil.d16_unorm_s8_uint_d16_unorm_s8_uint_separate_layouts.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.depth_stencil.d16_unorm_s8_uint_d16_unorm_s8_uint_separate_layouts.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.depth_stencil.d16_unorm_s8_uint_d16_unorm_s8_uint_separate_layouts.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.depth_stencil.d16_unorm_s8_uint_d16_unorm_s8_uint_separate_layouts.general_general_nearest
 dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.depth_stencil.3d_d24_unorm_s8_uint_d24_unorm_s8_uint.optimal_optimal_nearest
 dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.depth_stencil.3d_d24_unorm_s8_uint_d24_unorm_s8_uint.optimal_general_nearest
 dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.depth_stencil.3d_d24_unorm_s8_uint_d24_unorm_s8_uint.general_optimal_nearest
 dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.depth_stencil.3d_d24_unorm_s8_uint_d24_unorm_s8_uint.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.depth_stencil.d24_unorm_s8_uint_d24_unorm_s8_uint_separate_layouts.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.depth_stencil.d24_unorm_s8_uint_d24_unorm_s8_uint_separate_layouts.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.depth_stencil.d24_unorm_s8_uint_d24_unorm_s8_uint_separate_layouts.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.depth_stencil.d24_unorm_s8_uint_d24_unorm_s8_uint_separate_layouts.general_general_nearest
 dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.depth_stencil.3d_d32_sfloat_s8_uint_d32_sfloat_s8_uint.optimal_optimal_nearest
 dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.depth_stencil.3d_d32_sfloat_s8_uint_d32_sfloat_s8_uint.optimal_general_nearest
 dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.depth_stencil.3d_d32_sfloat_s8_uint_d32_sfloat_s8_uint.general_optimal_nearest
 dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.depth_stencil.3d_d32_sfloat_s8_uint_d32_sfloat_s8_uint.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.depth_stencil.d32_sfloat_s8_uint_d32_sfloat_s8_uint_separate_layouts.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.depth_stencil.d32_sfloat_s8_uint_d32_sfloat_s8_uint_separate_layouts.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.depth_stencil.d32_sfloat_s8_uint_d32_sfloat_s8_uint_separate_layouts.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.depth_stencil.d32_sfloat_s8_uint_d32_sfloat_s8_uint_separate_layouts.general_general_nearest
 dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8_uint.optimal_optimal_nearest
 dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8_uint.optimal_general_nearest
 dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8_uint.general_optimal_nearest
@@ -93215,141 +93263,261 @@ dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.single_layer.x8_d24_un
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.single_layer.d32_sfloat
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.single_layer.s8_uint
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.single_layer.d16_unorm_s8_uint
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.single_layer.d16_unorm_s8_uint_separate_layouts_depth
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.single_layer.d16_unorm_s8_uint_separate_layouts_stencil
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.single_layer.d24_unorm_s8_uint
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.single_layer.d24_unorm_s8_uint_separate_layouts_depth
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.single_layer.d24_unorm_s8_uint_separate_layouts_stencil
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.single_layer.d32_sfloat_s8_uint
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.single_layer.d32_sfloat_s8_uint_separate_layouts_depth
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.single_layer.d32_sfloat_s8_uint_separate_layouts_stencil
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.single_layer.d16_unorm_200x180
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.single_layer.x8_d24_unorm_pack32_200x180
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.single_layer.d32_sfloat_200x180
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.single_layer.s8_uint_200x180
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.single_layer.d16_unorm_s8_uint_200x180
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.single_layer.d16_unorm_s8_uint_separate_layouts_depth_200x180
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.single_layer.d16_unorm_s8_uint_separate_layouts_stencil_200x180
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.single_layer.d24_unorm_s8_uint_200x180
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.single_layer.d24_unorm_s8_uint_separate_layouts_depth_200x180
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.single_layer.d24_unorm_s8_uint_separate_layouts_stencil_200x180
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.single_layer.d32_sfloat_s8_uint_200x180
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.single_layer.d32_sfloat_s8_uint_separate_layouts_depth_200x180
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.single_layer.d32_sfloat_s8_uint_separate_layouts_stencil_200x180
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.single_layer.d16_unorm_1x33
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.single_layer.x8_d24_unorm_pack32_1x33
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.single_layer.d32_sfloat_1x33
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.single_layer.s8_uint_1x33
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.single_layer.d16_unorm_s8_uint_1x33
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.single_layer.d16_unorm_s8_uint_separate_layouts_depth_1x33
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.single_layer.d16_unorm_s8_uint_separate_layouts_stencil_1x33
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.single_layer.d24_unorm_s8_uint_1x33
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.single_layer.d24_unorm_s8_uint_separate_layouts_depth_1x33
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.single_layer.d24_unorm_s8_uint_separate_layouts_stencil_1x33
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.single_layer.d32_sfloat_s8_uint_1x33
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.single_layer.d32_sfloat_s8_uint_separate_layouts_depth_1x33
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.single_layer.d32_sfloat_s8_uint_separate_layouts_stencil_1x33
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.single_layer.d16_unorm_64x11
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.single_layer.x8_d24_unorm_pack32_64x11
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.single_layer.d32_sfloat_64x11
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.single_layer.s8_uint_64x11
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.single_layer.d16_unorm_s8_uint_64x11
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.single_layer.d16_unorm_s8_uint_separate_layouts_depth_64x11
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.single_layer.d16_unorm_s8_uint_separate_layouts_stencil_64x11
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.single_layer.d24_unorm_s8_uint_64x11
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.single_layer.d24_unorm_s8_uint_separate_layouts_depth_64x11
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.single_layer.d24_unorm_s8_uint_separate_layouts_stencil_64x11
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.single_layer.d32_sfloat_s8_uint_64x11
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.single_layer.d32_sfloat_s8_uint_separate_layouts_depth_64x11
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.single_layer.d32_sfloat_s8_uint_separate_layouts_stencil_64x11
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.single_layer.d16_unorm_33x128
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.single_layer.x8_d24_unorm_pack32_33x128
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.single_layer.d32_sfloat_33x128
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.single_layer.s8_uint_33x128
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.single_layer.d16_unorm_s8_uint_33x128
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.single_layer.d16_unorm_s8_uint_separate_layouts_depth_33x128
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.single_layer.d16_unorm_s8_uint_separate_layouts_stencil_33x128
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.single_layer.d24_unorm_s8_uint_33x128
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.single_layer.d24_unorm_s8_uint_separate_layouts_depth_33x128
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.single_layer.d24_unorm_s8_uint_separate_layouts_stencil_33x128
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.single_layer.d32_sfloat_s8_uint_33x128
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.single_layer.d32_sfloat_s8_uint_separate_layouts_depth_33x128
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.single_layer.d32_sfloat_s8_uint_separate_layouts_stencil_33x128
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.multiple_layers.d16_unorm
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.multiple_layers.x8_d24_unorm_pack32
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.multiple_layers.d32_sfloat
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.multiple_layers.s8_uint
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.multiple_layers.d16_unorm_s8_uint
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.multiple_layers.d16_unorm_s8_uint_separate_layouts_depth
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.multiple_layers.d16_unorm_s8_uint_separate_layouts_stencil
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.multiple_layers.d24_unorm_s8_uint
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.multiple_layers.d24_unorm_s8_uint_separate_layouts_depth
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.multiple_layers.d24_unorm_s8_uint_separate_layouts_stencil
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.multiple_layers.d32_sfloat_s8_uint
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.multiple_layers.d32_sfloat_s8_uint_separate_layouts_depth
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.multiple_layers.d32_sfloat_s8_uint_separate_layouts_stencil
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.multiple_layers.d16_unorm_200x180
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.multiple_layers.x8_d24_unorm_pack32_200x180
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.multiple_layers.d32_sfloat_200x180
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.multiple_layers.s8_uint_200x180
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.multiple_layers.d16_unorm_s8_uint_200x180
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.multiple_layers.d16_unorm_s8_uint_separate_layouts_depth_200x180
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.multiple_layers.d16_unorm_s8_uint_separate_layouts_stencil_200x180
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.multiple_layers.d24_unorm_s8_uint_200x180
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.multiple_layers.d24_unorm_s8_uint_separate_layouts_depth_200x180
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.multiple_layers.d24_unorm_s8_uint_separate_layouts_stencil_200x180
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.multiple_layers.d32_sfloat_s8_uint_200x180
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.multiple_layers.d32_sfloat_s8_uint_separate_layouts_depth_200x180
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.multiple_layers.d32_sfloat_s8_uint_separate_layouts_stencil_200x180
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.multiple_layers.d16_unorm_1x33
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.multiple_layers.x8_d24_unorm_pack32_1x33
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.multiple_layers.d32_sfloat_1x33
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.multiple_layers.s8_uint_1x33
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.multiple_layers.d16_unorm_s8_uint_1x33
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.multiple_layers.d16_unorm_s8_uint_separate_layouts_depth_1x33
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.multiple_layers.d16_unorm_s8_uint_separate_layouts_stencil_1x33
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.multiple_layers.d24_unorm_s8_uint_1x33
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.multiple_layers.d24_unorm_s8_uint_separate_layouts_depth_1x33
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.multiple_layers.d24_unorm_s8_uint_separate_layouts_stencil_1x33
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.multiple_layers.d32_sfloat_s8_uint_1x33
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.multiple_layers.d32_sfloat_s8_uint_separate_layouts_depth_1x33
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.multiple_layers.d32_sfloat_s8_uint_separate_layouts_stencil_1x33
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.multiple_layers.d16_unorm_64x11
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.multiple_layers.x8_d24_unorm_pack32_64x11
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.multiple_layers.d32_sfloat_64x11
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.multiple_layers.s8_uint_64x11
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.multiple_layers.d16_unorm_s8_uint_64x11
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.multiple_layers.d16_unorm_s8_uint_separate_layouts_depth_64x11
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.multiple_layers.d16_unorm_s8_uint_separate_layouts_stencil_64x11
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.multiple_layers.d24_unorm_s8_uint_64x11
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.multiple_layers.d24_unorm_s8_uint_separate_layouts_depth_64x11
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.multiple_layers.d24_unorm_s8_uint_separate_layouts_stencil_64x11
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.multiple_layers.d32_sfloat_s8_uint_64x11
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.multiple_layers.d32_sfloat_s8_uint_separate_layouts_depth_64x11
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.multiple_layers.d32_sfloat_s8_uint_separate_layouts_stencil_64x11
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.multiple_layers.d16_unorm_33x128
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.multiple_layers.x8_d24_unorm_pack32_33x128
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.multiple_layers.d32_sfloat_33x128
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.multiple_layers.s8_uint_33x128
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.multiple_layers.d16_unorm_s8_uint_33x128
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.multiple_layers.d16_unorm_s8_uint_separate_layouts_depth_33x128
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.multiple_layers.d16_unorm_s8_uint_separate_layouts_stencil_33x128
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.multiple_layers.d24_unorm_s8_uint_33x128
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.multiple_layers.d24_unorm_s8_uint_separate_layouts_depth_33x128
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.multiple_layers.d24_unorm_s8_uint_separate_layouts_stencil_33x128
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.multiple_layers.d32_sfloat_s8_uint_33x128
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.multiple_layers.d32_sfloat_s8_uint_separate_layouts_depth_33x128
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.multiple_layers.d32_sfloat_s8_uint_separate_layouts_stencil_33x128
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers.d16_unorm
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers.x8_d24_unorm_pack32
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers.d32_sfloat
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers.s8_uint
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers.d16_unorm_s8_uint
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers.d16_unorm_s8_uint_separate_layouts_depth
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers.d16_unorm_s8_uint_separate_layouts_stencil
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers.d24_unorm_s8_uint
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers.d24_unorm_s8_uint_separate_layouts_depth
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers.d24_unorm_s8_uint_separate_layouts_stencil
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers.d32_sfloat_s8_uint
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers.d32_sfloat_s8_uint_separate_layouts_depth
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers.d32_sfloat_s8_uint_separate_layouts_stencil
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers.d16_unorm_200x180
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers.x8_d24_unorm_pack32_200x180
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers.d32_sfloat_200x180
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers.s8_uint_200x180
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers.d16_unorm_s8_uint_200x180
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers.d16_unorm_s8_uint_separate_layouts_depth_200x180
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers.d16_unorm_s8_uint_separate_layouts_stencil_200x180
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers.d24_unorm_s8_uint_200x180
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers.d24_unorm_s8_uint_separate_layouts_depth_200x180
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers.d24_unorm_s8_uint_separate_layouts_stencil_200x180
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers.d32_sfloat_s8_uint_200x180
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers.d32_sfloat_s8_uint_separate_layouts_depth_200x180
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers.d32_sfloat_s8_uint_separate_layouts_stencil_200x180
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers.d16_unorm_1x33
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers.x8_d24_unorm_pack32_1x33
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers.d32_sfloat_1x33
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers.s8_uint_1x33
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers.d16_unorm_s8_uint_1x33
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers.d16_unorm_s8_uint_separate_layouts_depth_1x33
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers.d16_unorm_s8_uint_separate_layouts_stencil_1x33
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers.d24_unorm_s8_uint_1x33
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers.d24_unorm_s8_uint_separate_layouts_depth_1x33
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers.d24_unorm_s8_uint_separate_layouts_stencil_1x33
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers.d32_sfloat_s8_uint_1x33
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers.d32_sfloat_s8_uint_separate_layouts_depth_1x33
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers.d32_sfloat_s8_uint_separate_layouts_stencil_1x33
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers.d16_unorm_64x11
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers.x8_d24_unorm_pack32_64x11
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers.d32_sfloat_64x11
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers.s8_uint_64x11
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers.d16_unorm_s8_uint_64x11
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers.d16_unorm_s8_uint_separate_layouts_depth_64x11
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers.d16_unorm_s8_uint_separate_layouts_stencil_64x11
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers.d24_unorm_s8_uint_64x11
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers.d24_unorm_s8_uint_separate_layouts_depth_64x11
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers.d24_unorm_s8_uint_separate_layouts_stencil_64x11
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers.d32_sfloat_s8_uint_64x11
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers.d32_sfloat_s8_uint_separate_layouts_depth_64x11
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers.d32_sfloat_s8_uint_separate_layouts_stencil_64x11
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers.d16_unorm_33x128
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers.x8_d24_unorm_pack32_33x128
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers.d32_sfloat_33x128
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers.s8_uint_33x128
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers.d16_unorm_s8_uint_33x128
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers.d16_unorm_s8_uint_separate_layouts_depth_33x128
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers.d16_unorm_s8_uint_separate_layouts_stencil_33x128
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers.d24_unorm_s8_uint_33x128
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers.d24_unorm_s8_uint_separate_layouts_depth_33x128
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers.d24_unorm_s8_uint_separate_layouts_stencil_33x128
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers.d32_sfloat_s8_uint_33x128
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers.d32_sfloat_s8_uint_separate_layouts_depth_33x128
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers.d32_sfloat_s8_uint_separate_layouts_stencil_33x128
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers_twostep.d16_unorm
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers_twostep.x8_d24_unorm_pack32
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers_twostep.d32_sfloat
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers_twostep.s8_uint
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers_twostep.d16_unorm_s8_uint
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers_twostep.d16_unorm_s8_uint_separate_layouts_depth
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers_twostep.d16_unorm_s8_uint_separate_layouts_stencil
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers_twostep.d24_unorm_s8_uint
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers_twostep.d24_unorm_s8_uint_separate_layouts_depth
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers_twostep.d24_unorm_s8_uint_separate_layouts_stencil
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers_twostep.d32_sfloat_s8_uint
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers_twostep.d32_sfloat_s8_uint_separate_layouts_depth
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers_twostep.d32_sfloat_s8_uint_separate_layouts_stencil
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers_twostep.d16_unorm_200x180
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers_twostep.x8_d24_unorm_pack32_200x180
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers_twostep.d32_sfloat_200x180
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers_twostep.s8_uint_200x180
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers_twostep.d16_unorm_s8_uint_200x180
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers_twostep.d16_unorm_s8_uint_separate_layouts_depth_200x180
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers_twostep.d16_unorm_s8_uint_separate_layouts_stencil_200x180
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers_twostep.d24_unorm_s8_uint_200x180
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers_twostep.d24_unorm_s8_uint_separate_layouts_depth_200x180
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers_twostep.d24_unorm_s8_uint_separate_layouts_stencil_200x180
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers_twostep.d32_sfloat_s8_uint_200x180
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers_twostep.d32_sfloat_s8_uint_separate_layouts_depth_200x180
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers_twostep.d32_sfloat_s8_uint_separate_layouts_stencil_200x180
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers_twostep.d16_unorm_1x33
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers_twostep.x8_d24_unorm_pack32_1x33
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers_twostep.d32_sfloat_1x33
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers_twostep.s8_uint_1x33
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers_twostep.d16_unorm_s8_uint_1x33
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers_twostep.d16_unorm_s8_uint_separate_layouts_depth_1x33
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers_twostep.d16_unorm_s8_uint_separate_layouts_stencil_1x33
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers_twostep.d24_unorm_s8_uint_1x33
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers_twostep.d24_unorm_s8_uint_separate_layouts_depth_1x33
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers_twostep.d24_unorm_s8_uint_separate_layouts_stencil_1x33
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers_twostep.d32_sfloat_s8_uint_1x33
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers_twostep.d32_sfloat_s8_uint_separate_layouts_depth_1x33
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers_twostep.d32_sfloat_s8_uint_separate_layouts_stencil_1x33
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers_twostep.d16_unorm_64x11
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers_twostep.x8_d24_unorm_pack32_64x11
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers_twostep.d32_sfloat_64x11
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers_twostep.s8_uint_64x11
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers_twostep.d16_unorm_s8_uint_64x11
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers_twostep.d16_unorm_s8_uint_separate_layouts_depth_64x11
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers_twostep.d16_unorm_s8_uint_separate_layouts_stencil_64x11
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers_twostep.d24_unorm_s8_uint_64x11
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers_twostep.d24_unorm_s8_uint_separate_layouts_depth_64x11
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers_twostep.d24_unorm_s8_uint_separate_layouts_stencil_64x11
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers_twostep.d32_sfloat_s8_uint_64x11
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers_twostep.d32_sfloat_s8_uint_separate_layouts_depth_64x11
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers_twostep.d32_sfloat_s8_uint_separate_layouts_stencil_64x11
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers_twostep.d16_unorm_33x128
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers_twostep.x8_d24_unorm_pack32_33x128
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers_twostep.d32_sfloat_33x128
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers_twostep.s8_uint_33x128
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers_twostep.d16_unorm_s8_uint_33x128
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers_twostep.d16_unorm_s8_uint_separate_layouts_depth_33x128
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers_twostep.d16_unorm_s8_uint_separate_layouts_stencil_33x128
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers_twostep.d24_unorm_s8_uint_33x128
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers_twostep.d24_unorm_s8_uint_separate_layouts_depth_33x128
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers_twostep.d24_unorm_s8_uint_separate_layouts_stencil_33x128
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers_twostep.d32_sfloat_s8_uint_33x128
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers_twostep.d32_sfloat_s8_uint_separate_layouts_depth_33x128
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers_twostep.d32_sfloat_s8_uint_separate_layouts_stencil_33x128
 dEQP-VK.api.image_clearing.core.clear_color_attachment.single_layer.r4g4_unorm_pack8
 dEQP-VK.api.image_clearing.core.clear_color_attachment.single_layer.r4g4b4a4_unorm_pack16
 dEQP-VK.api.image_clearing.core.clear_color_attachment.single_layer.b4g4r4a4_unorm_pack16
@@ -95575,141 +95743,261 @@ dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.single_layer.x8_d
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.single_layer.d32_sfloat
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.single_layer.s8_uint
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.single_layer.d16_unorm_s8_uint
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.single_layer.d16_unorm_s8_uint_separate_layouts_depth
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.single_layer.d16_unorm_s8_uint_separate_layouts_stencil
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.single_layer.d24_unorm_s8_uint
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.single_layer.d24_unorm_s8_uint_separate_layouts_depth
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.single_layer.d24_unorm_s8_uint_separate_layouts_stencil
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.single_layer.d32_sfloat_s8_uint
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.single_layer.d32_sfloat_s8_uint_separate_layouts_depth
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.single_layer.d32_sfloat_s8_uint_separate_layouts_stencil
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.single_layer.d16_unorm_200x180
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.single_layer.x8_d24_unorm_pack32_200x180
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.single_layer.d32_sfloat_200x180
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.single_layer.s8_uint_200x180
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.single_layer.d16_unorm_s8_uint_200x180
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.single_layer.d16_unorm_s8_uint_separate_layouts_depth_200x180
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.single_layer.d16_unorm_s8_uint_separate_layouts_stencil_200x180
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.single_layer.d24_unorm_s8_uint_200x180
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.single_layer.d24_unorm_s8_uint_separate_layouts_depth_200x180
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.single_layer.d24_unorm_s8_uint_separate_layouts_stencil_200x180
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.single_layer.d32_sfloat_s8_uint_200x180
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.single_layer.d32_sfloat_s8_uint_separate_layouts_depth_200x180
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.single_layer.d32_sfloat_s8_uint_separate_layouts_stencil_200x180
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.single_layer.d16_unorm_1x33
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.single_layer.x8_d24_unorm_pack32_1x33
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.single_layer.d32_sfloat_1x33
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.single_layer.s8_uint_1x33
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.single_layer.d16_unorm_s8_uint_1x33
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.single_layer.d16_unorm_s8_uint_separate_layouts_depth_1x33
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.single_layer.d16_unorm_s8_uint_separate_layouts_stencil_1x33
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.single_layer.d24_unorm_s8_uint_1x33
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.single_layer.d24_unorm_s8_uint_separate_layouts_depth_1x33
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.single_layer.d24_unorm_s8_uint_separate_layouts_stencil_1x33
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.single_layer.d32_sfloat_s8_uint_1x33
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.single_layer.d32_sfloat_s8_uint_separate_layouts_depth_1x33
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.single_layer.d32_sfloat_s8_uint_separate_layouts_stencil_1x33
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.single_layer.d16_unorm_64x11
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.single_layer.x8_d24_unorm_pack32_64x11
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.single_layer.d32_sfloat_64x11
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.single_layer.s8_uint_64x11
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.single_layer.d16_unorm_s8_uint_64x11
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.single_layer.d16_unorm_s8_uint_separate_layouts_depth_64x11
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.single_layer.d16_unorm_s8_uint_separate_layouts_stencil_64x11
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.single_layer.d24_unorm_s8_uint_64x11
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.single_layer.d24_unorm_s8_uint_separate_layouts_depth_64x11
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.single_layer.d24_unorm_s8_uint_separate_layouts_stencil_64x11
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.single_layer.d32_sfloat_s8_uint_64x11
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.single_layer.d32_sfloat_s8_uint_separate_layouts_depth_64x11
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.single_layer.d32_sfloat_s8_uint_separate_layouts_stencil_64x11
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.single_layer.d16_unorm_33x128
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.single_layer.x8_d24_unorm_pack32_33x128
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.single_layer.d32_sfloat_33x128
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.single_layer.s8_uint_33x128
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.single_layer.d16_unorm_s8_uint_33x128
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.single_layer.d16_unorm_s8_uint_separate_layouts_depth_33x128
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.single_layer.d16_unorm_s8_uint_separate_layouts_stencil_33x128
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.single_layer.d24_unorm_s8_uint_33x128
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.single_layer.d24_unorm_s8_uint_separate_layouts_depth_33x128
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.single_layer.d24_unorm_s8_uint_separate_layouts_stencil_33x128
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.single_layer.d32_sfloat_s8_uint_33x128
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.single_layer.d32_sfloat_s8_uint_separate_layouts_depth_33x128
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.single_layer.d32_sfloat_s8_uint_separate_layouts_stencil_33x128
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.multiple_layers.d16_unorm
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.multiple_layers.x8_d24_unorm_pack32
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.multiple_layers.d32_sfloat
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.multiple_layers.s8_uint
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.multiple_layers.d16_unorm_s8_uint
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.multiple_layers.d16_unorm_s8_uint_separate_layouts_depth
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.multiple_layers.d16_unorm_s8_uint_separate_layouts_stencil
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.multiple_layers.d24_unorm_s8_uint
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.multiple_layers.d24_unorm_s8_uint_separate_layouts_depth
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.multiple_layers.d24_unorm_s8_uint_separate_layouts_stencil
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.multiple_layers.d32_sfloat_s8_uint
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.multiple_layers.d32_sfloat_s8_uint_separate_layouts_depth
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.multiple_layers.d32_sfloat_s8_uint_separate_layouts_stencil
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.multiple_layers.d16_unorm_200x180
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.multiple_layers.x8_d24_unorm_pack32_200x180
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.multiple_layers.d32_sfloat_200x180
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.multiple_layers.s8_uint_200x180
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.multiple_layers.d16_unorm_s8_uint_200x180
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.multiple_layers.d16_unorm_s8_uint_separate_layouts_depth_200x180
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.multiple_layers.d16_unorm_s8_uint_separate_layouts_stencil_200x180
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.multiple_layers.d24_unorm_s8_uint_200x180
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.multiple_layers.d24_unorm_s8_uint_separate_layouts_depth_200x180
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.multiple_layers.d24_unorm_s8_uint_separate_layouts_stencil_200x180
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.multiple_layers.d32_sfloat_s8_uint_200x180
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.multiple_layers.d32_sfloat_s8_uint_separate_layouts_depth_200x180
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.multiple_layers.d32_sfloat_s8_uint_separate_layouts_stencil_200x180
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.multiple_layers.d16_unorm_1x33
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.multiple_layers.x8_d24_unorm_pack32_1x33
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.multiple_layers.d32_sfloat_1x33
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.multiple_layers.s8_uint_1x33
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.multiple_layers.d16_unorm_s8_uint_1x33
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.multiple_layers.d16_unorm_s8_uint_separate_layouts_depth_1x33
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.multiple_layers.d16_unorm_s8_uint_separate_layouts_stencil_1x33
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.multiple_layers.d24_unorm_s8_uint_1x33
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.multiple_layers.d24_unorm_s8_uint_separate_layouts_depth_1x33
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.multiple_layers.d24_unorm_s8_uint_separate_layouts_stencil_1x33
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.multiple_layers.d32_sfloat_s8_uint_1x33
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.multiple_layers.d32_sfloat_s8_uint_separate_layouts_depth_1x33
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.multiple_layers.d32_sfloat_s8_uint_separate_layouts_stencil_1x33
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.multiple_layers.d16_unorm_64x11
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.multiple_layers.x8_d24_unorm_pack32_64x11
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.multiple_layers.d32_sfloat_64x11
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.multiple_layers.s8_uint_64x11
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.multiple_layers.d16_unorm_s8_uint_64x11
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.multiple_layers.d16_unorm_s8_uint_separate_layouts_depth_64x11
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.multiple_layers.d16_unorm_s8_uint_separate_layouts_stencil_64x11
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.multiple_layers.d24_unorm_s8_uint_64x11
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.multiple_layers.d24_unorm_s8_uint_separate_layouts_depth_64x11
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.multiple_layers.d24_unorm_s8_uint_separate_layouts_stencil_64x11
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.multiple_layers.d32_sfloat_s8_uint_64x11
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.multiple_layers.d32_sfloat_s8_uint_separate_layouts_depth_64x11
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.multiple_layers.d32_sfloat_s8_uint_separate_layouts_stencil_64x11
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.multiple_layers.d16_unorm_33x128
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.multiple_layers.x8_d24_unorm_pack32_33x128
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.multiple_layers.d32_sfloat_33x128
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.multiple_layers.s8_uint_33x128
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.multiple_layers.d16_unorm_s8_uint_33x128
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.multiple_layers.d16_unorm_s8_uint_separate_layouts_depth_33x128
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.multiple_layers.d16_unorm_s8_uint_separate_layouts_stencil_33x128
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.multiple_layers.d24_unorm_s8_uint_33x128
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.multiple_layers.d24_unorm_s8_uint_separate_layouts_depth_33x128
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.multiple_layers.d24_unorm_s8_uint_separate_layouts_stencil_33x128
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.multiple_layers.d32_sfloat_s8_uint_33x128
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.multiple_layers.d32_sfloat_s8_uint_separate_layouts_depth_33x128
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.multiple_layers.d32_sfloat_s8_uint_separate_layouts_stencil_33x128
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.cube_layers.d16_unorm
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.cube_layers.x8_d24_unorm_pack32
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.cube_layers.d32_sfloat
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.cube_layers.s8_uint
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.cube_layers.d16_unorm_s8_uint
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.cube_layers.d16_unorm_s8_uint_separate_layouts_depth
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.cube_layers.d16_unorm_s8_uint_separate_layouts_stencil
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.cube_layers.d24_unorm_s8_uint
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.cube_layers.d24_unorm_s8_uint_separate_layouts_depth
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.cube_layers.d24_unorm_s8_uint_separate_layouts_stencil
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.cube_layers.d32_sfloat_s8_uint
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.cube_layers.d32_sfloat_s8_uint_separate_layouts_depth
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.cube_layers.d32_sfloat_s8_uint_separate_layouts_stencil
 dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.single_layer.d16_unorm
 dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.single_layer.x8_d24_unorm_pack32
 dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.single_layer.d32_sfloat
 dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.single_layer.s8_uint
 dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.single_layer.d16_unorm_s8_uint
+dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.single_layer.d16_unorm_s8_uint_separate_layouts_depth
+dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.single_layer.d16_unorm_s8_uint_separate_layouts_stencil
 dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.single_layer.d24_unorm_s8_uint
+dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.single_layer.d24_unorm_s8_uint_separate_layouts_depth
+dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.single_layer.d24_unorm_s8_uint_separate_layouts_stencil
 dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.single_layer.d32_sfloat_s8_uint
+dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.single_layer.d32_sfloat_s8_uint_separate_layouts_depth
+dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.single_layer.d32_sfloat_s8_uint_separate_layouts_stencil
 dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.single_layer.d16_unorm_200x180
 dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.single_layer.x8_d24_unorm_pack32_200x180
 dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.single_layer.d32_sfloat_200x180
 dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.single_layer.s8_uint_200x180
 dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.single_layer.d16_unorm_s8_uint_200x180
+dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.single_layer.d16_unorm_s8_uint_separate_layouts_depth_200x180
+dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.single_layer.d16_unorm_s8_uint_separate_layouts_stencil_200x180
 dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.single_layer.d24_unorm_s8_uint_200x180
+dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.single_layer.d24_unorm_s8_uint_separate_layouts_depth_200x180
+dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.single_layer.d24_unorm_s8_uint_separate_layouts_stencil_200x180
 dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.single_layer.d32_sfloat_s8_uint_200x180
+dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.single_layer.d32_sfloat_s8_uint_separate_layouts_depth_200x180
+dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.single_layer.d32_sfloat_s8_uint_separate_layouts_stencil_200x180
 dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.single_layer.d16_unorm_64x11
 dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.single_layer.x8_d24_unorm_pack32_64x11
 dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.single_layer.d32_sfloat_64x11
 dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.single_layer.s8_uint_64x11
 dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.single_layer.d16_unorm_s8_uint_64x11
+dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.single_layer.d16_unorm_s8_uint_separate_layouts_depth_64x11
+dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.single_layer.d16_unorm_s8_uint_separate_layouts_stencil_64x11
 dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.single_layer.d24_unorm_s8_uint_64x11
+dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.single_layer.d24_unorm_s8_uint_separate_layouts_depth_64x11
+dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.single_layer.d24_unorm_s8_uint_separate_layouts_stencil_64x11
 dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.single_layer.d32_sfloat_s8_uint_64x11
+dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.single_layer.d32_sfloat_s8_uint_separate_layouts_depth_64x11
+dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.single_layer.d32_sfloat_s8_uint_separate_layouts_stencil_64x11
 dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.single_layer.d16_unorm_33x128
 dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.single_layer.x8_d24_unorm_pack32_33x128
 dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.single_layer.d32_sfloat_33x128
 dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.single_layer.s8_uint_33x128
 dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.single_layer.d16_unorm_s8_uint_33x128
+dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.single_layer.d16_unorm_s8_uint_separate_layouts_depth_33x128
+dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.single_layer.d16_unorm_s8_uint_separate_layouts_stencil_33x128
 dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.single_layer.d24_unorm_s8_uint_33x128
+dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.single_layer.d24_unorm_s8_uint_separate_layouts_depth_33x128
+dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.single_layer.d24_unorm_s8_uint_separate_layouts_stencil_33x128
 dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.single_layer.d32_sfloat_s8_uint_33x128
+dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.single_layer.d32_sfloat_s8_uint_separate_layouts_depth_33x128
+dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.single_layer.d32_sfloat_s8_uint_separate_layouts_stencil_33x128
 dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.multiple_layers.d16_unorm
 dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.multiple_layers.x8_d24_unorm_pack32
 dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.multiple_layers.d32_sfloat
 dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.multiple_layers.s8_uint
 dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.multiple_layers.d16_unorm_s8_uint
+dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.multiple_layers.d16_unorm_s8_uint_separate_layouts_depth
+dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.multiple_layers.d16_unorm_s8_uint_separate_layouts_stencil
 dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.multiple_layers.d24_unorm_s8_uint
+dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.multiple_layers.d24_unorm_s8_uint_separate_layouts_depth
+dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.multiple_layers.d24_unorm_s8_uint_separate_layouts_stencil
 dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.multiple_layers.d32_sfloat_s8_uint
+dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.multiple_layers.d32_sfloat_s8_uint_separate_layouts_depth
+dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.multiple_layers.d32_sfloat_s8_uint_separate_layouts_stencil
 dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.multiple_layers.d16_unorm_200x180
 dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.multiple_layers.x8_d24_unorm_pack32_200x180
 dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.multiple_layers.d32_sfloat_200x180
 dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.multiple_layers.s8_uint_200x180
 dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.multiple_layers.d16_unorm_s8_uint_200x180
+dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.multiple_layers.d16_unorm_s8_uint_separate_layouts_depth_200x180
+dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.multiple_layers.d16_unorm_s8_uint_separate_layouts_stencil_200x180
 dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.multiple_layers.d24_unorm_s8_uint_200x180
+dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.multiple_layers.d24_unorm_s8_uint_separate_layouts_depth_200x180
+dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.multiple_layers.d24_unorm_s8_uint_separate_layouts_stencil_200x180
 dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.multiple_layers.d32_sfloat_s8_uint_200x180
+dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.multiple_layers.d32_sfloat_s8_uint_separate_layouts_depth_200x180
+dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.multiple_layers.d32_sfloat_s8_uint_separate_layouts_stencil_200x180
 dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.multiple_layers.d16_unorm_64x11
 dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.multiple_layers.x8_d24_unorm_pack32_64x11
 dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.multiple_layers.d32_sfloat_64x11
 dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.multiple_layers.s8_uint_64x11
 dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.multiple_layers.d16_unorm_s8_uint_64x11
+dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.multiple_layers.d16_unorm_s8_uint_separate_layouts_depth_64x11
+dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.multiple_layers.d16_unorm_s8_uint_separate_layouts_stencil_64x11
 dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.multiple_layers.d24_unorm_s8_uint_64x11
+dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.multiple_layers.d24_unorm_s8_uint_separate_layouts_depth_64x11
+dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.multiple_layers.d24_unorm_s8_uint_separate_layouts_stencil_64x11
 dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.multiple_layers.d32_sfloat_s8_uint_64x11
+dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.multiple_layers.d32_sfloat_s8_uint_separate_layouts_depth_64x11
+dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.multiple_layers.d32_sfloat_s8_uint_separate_layouts_stencil_64x11
 dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.multiple_layers.d16_unorm_33x128
 dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.multiple_layers.x8_d24_unorm_pack32_33x128
 dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.multiple_layers.d32_sfloat_33x128
 dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.multiple_layers.s8_uint_33x128
 dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.multiple_layers.d16_unorm_s8_uint_33x128
+dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.multiple_layers.d16_unorm_s8_uint_separate_layouts_depth_33x128
+dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.multiple_layers.d16_unorm_s8_uint_separate_layouts_stencil_33x128
 dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.multiple_layers.d24_unorm_s8_uint_33x128
+dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.multiple_layers.d24_unorm_s8_uint_separate_layouts_depth_33x128
+dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.multiple_layers.d24_unorm_s8_uint_separate_layouts_stencil_33x128
 dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.multiple_layers.d32_sfloat_s8_uint_33x128
+dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.multiple_layers.d32_sfloat_s8_uint_separate_layouts_depth_33x128
+dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.multiple_layers.d32_sfloat_s8_uint_separate_layouts_stencil_33x128
 dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.cube_layers.d16_unorm
 dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.cube_layers.x8_d24_unorm_pack32
 dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.cube_layers.d32_sfloat
 dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.cube_layers.s8_uint
 dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.cube_layers.d16_unorm_s8_uint
+dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.cube_layers.d16_unorm_s8_uint_separate_layouts_depth
+dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.cube_layers.d16_unorm_s8_uint_separate_layouts_stencil
 dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.cube_layers.d24_unorm_s8_uint
+dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.cube_layers.d24_unorm_s8_uint_separate_layouts_depth
+dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.cube_layers.d24_unorm_s8_uint_separate_layouts_stencil
 dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.cube_layers.d32_sfloat_s8_uint
+dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.cube_layers.d32_sfloat_s8_uint_separate_layouts_depth
+dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.cube_layers.d32_sfloat_s8_uint_separate_layouts_stencil
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_color_image.1d.optimal.single_layer.r4g4_unorm_pack8
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_color_image.1d.optimal.single_layer.r4g4b4a4_unorm_pack16
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_color_image.1d.optimal.single_layer.b4g4r4a4_unorm_pack16
@@ -103707,141 +103995,261 @@ dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.single
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.single_layer.d32_sfloat
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.single_layer.s8_uint
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.single_layer.d16_unorm_s8_uint
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.single_layer.d16_unorm_s8_uint_separate_layouts_depth
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.single_layer.d16_unorm_s8_uint_separate_layouts_stencil
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.single_layer.d24_unorm_s8_uint
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.single_layer.d24_unorm_s8_uint_separate_layouts_depth
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.single_layer.d24_unorm_s8_uint_separate_layouts_stencil
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.single_layer.d32_sfloat_s8_uint
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.single_layer.d32_sfloat_s8_uint_separate_layouts_depth
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.single_layer.d32_sfloat_s8_uint_separate_layouts_stencil
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.single_layer.d16_unorm_200x180
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.single_layer.x8_d24_unorm_pack32_200x180
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.single_layer.d32_sfloat_200x180
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.single_layer.s8_uint_200x180
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.single_layer.d16_unorm_s8_uint_200x180
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.single_layer.d16_unorm_s8_uint_separate_layouts_depth_200x180
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.single_layer.d16_unorm_s8_uint_separate_layouts_stencil_200x180
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.single_layer.d24_unorm_s8_uint_200x180
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.single_layer.d24_unorm_s8_uint_separate_layouts_depth_200x180
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.single_layer.d24_unorm_s8_uint_separate_layouts_stencil_200x180
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.single_layer.d32_sfloat_s8_uint_200x180
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.single_layer.d32_sfloat_s8_uint_separate_layouts_depth_200x180
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.single_layer.d32_sfloat_s8_uint_separate_layouts_stencil_200x180
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.single_layer.d16_unorm_1x33
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.single_layer.x8_d24_unorm_pack32_1x33
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.single_layer.d32_sfloat_1x33
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.single_layer.s8_uint_1x33
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.single_layer.d16_unorm_s8_uint_1x33
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.single_layer.d16_unorm_s8_uint_separate_layouts_depth_1x33
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.single_layer.d16_unorm_s8_uint_separate_layouts_stencil_1x33
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.single_layer.d24_unorm_s8_uint_1x33
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.single_layer.d24_unorm_s8_uint_separate_layouts_depth_1x33
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.single_layer.d24_unorm_s8_uint_separate_layouts_stencil_1x33
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.single_layer.d32_sfloat_s8_uint_1x33
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.single_layer.d32_sfloat_s8_uint_separate_layouts_depth_1x33
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.single_layer.d32_sfloat_s8_uint_separate_layouts_stencil_1x33
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.single_layer.d16_unorm_64x11
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.single_layer.x8_d24_unorm_pack32_64x11
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.single_layer.d32_sfloat_64x11
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.single_layer.s8_uint_64x11
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.single_layer.d16_unorm_s8_uint_64x11
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.single_layer.d16_unorm_s8_uint_separate_layouts_depth_64x11
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.single_layer.d16_unorm_s8_uint_separate_layouts_stencil_64x11
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.single_layer.d24_unorm_s8_uint_64x11
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.single_layer.d24_unorm_s8_uint_separate_layouts_depth_64x11
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.single_layer.d24_unorm_s8_uint_separate_layouts_stencil_64x11
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.single_layer.d32_sfloat_s8_uint_64x11
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.single_layer.d32_sfloat_s8_uint_separate_layouts_depth_64x11
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.single_layer.d32_sfloat_s8_uint_separate_layouts_stencil_64x11
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.single_layer.d16_unorm_33x128
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.single_layer.x8_d24_unorm_pack32_33x128
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.single_layer.d32_sfloat_33x128
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.single_layer.s8_uint_33x128
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.single_layer.d16_unorm_s8_uint_33x128
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.single_layer.d16_unorm_s8_uint_separate_layouts_depth_33x128
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.single_layer.d16_unorm_s8_uint_separate_layouts_stencil_33x128
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.single_layer.d24_unorm_s8_uint_33x128
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.single_layer.d24_unorm_s8_uint_separate_layouts_depth_33x128
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.single_layer.d24_unorm_s8_uint_separate_layouts_stencil_33x128
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.single_layer.d32_sfloat_s8_uint_33x128
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.single_layer.d32_sfloat_s8_uint_separate_layouts_depth_33x128
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.single_layer.d32_sfloat_s8_uint_separate_layouts_stencil_33x128
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.multiple_layers.d16_unorm
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.multiple_layers.x8_d24_unorm_pack32
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.multiple_layers.d32_sfloat
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.multiple_layers.s8_uint
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.multiple_layers.d16_unorm_s8_uint
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.multiple_layers.d16_unorm_s8_uint_separate_layouts_depth
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.multiple_layers.d16_unorm_s8_uint_separate_layouts_stencil
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.multiple_layers.d24_unorm_s8_uint
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.multiple_layers.d24_unorm_s8_uint_separate_layouts_depth
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.multiple_layers.d24_unorm_s8_uint_separate_layouts_stencil
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.multiple_layers.d32_sfloat_s8_uint
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.multiple_layers.d32_sfloat_s8_uint_separate_layouts_depth
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.multiple_layers.d32_sfloat_s8_uint_separate_layouts_stencil
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.multiple_layers.d16_unorm_200x180
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.multiple_layers.x8_d24_unorm_pack32_200x180
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.multiple_layers.d32_sfloat_200x180
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.multiple_layers.s8_uint_200x180
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.multiple_layers.d16_unorm_s8_uint_200x180
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.multiple_layers.d16_unorm_s8_uint_separate_layouts_depth_200x180
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.multiple_layers.d16_unorm_s8_uint_separate_layouts_stencil_200x180
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.multiple_layers.d24_unorm_s8_uint_200x180
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.multiple_layers.d24_unorm_s8_uint_separate_layouts_depth_200x180
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.multiple_layers.d24_unorm_s8_uint_separate_layouts_stencil_200x180
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.multiple_layers.d32_sfloat_s8_uint_200x180
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.multiple_layers.d32_sfloat_s8_uint_separate_layouts_depth_200x180
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.multiple_layers.d32_sfloat_s8_uint_separate_layouts_stencil_200x180
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.multiple_layers.d16_unorm_1x33
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.multiple_layers.x8_d24_unorm_pack32_1x33
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.multiple_layers.d32_sfloat_1x33
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.multiple_layers.s8_uint_1x33
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.multiple_layers.d16_unorm_s8_uint_1x33
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.multiple_layers.d16_unorm_s8_uint_separate_layouts_depth_1x33
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.multiple_layers.d16_unorm_s8_uint_separate_layouts_stencil_1x33
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.multiple_layers.d24_unorm_s8_uint_1x33
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.multiple_layers.d24_unorm_s8_uint_separate_layouts_depth_1x33
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.multiple_layers.d24_unorm_s8_uint_separate_layouts_stencil_1x33
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.multiple_layers.d32_sfloat_s8_uint_1x33
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.multiple_layers.d32_sfloat_s8_uint_separate_layouts_depth_1x33
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.multiple_layers.d32_sfloat_s8_uint_separate_layouts_stencil_1x33
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.multiple_layers.d16_unorm_64x11
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.multiple_layers.x8_d24_unorm_pack32_64x11
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.multiple_layers.d32_sfloat_64x11
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.multiple_layers.s8_uint_64x11
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.multiple_layers.d16_unorm_s8_uint_64x11
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.multiple_layers.d16_unorm_s8_uint_separate_layouts_depth_64x11
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.multiple_layers.d16_unorm_s8_uint_separate_layouts_stencil_64x11
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.multiple_layers.d24_unorm_s8_uint_64x11
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.multiple_layers.d24_unorm_s8_uint_separate_layouts_depth_64x11
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.multiple_layers.d24_unorm_s8_uint_separate_layouts_stencil_64x11
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.multiple_layers.d32_sfloat_s8_uint_64x11
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.multiple_layers.d32_sfloat_s8_uint_separate_layouts_depth_64x11
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.multiple_layers.d32_sfloat_s8_uint_separate_layouts_stencil_64x11
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.multiple_layers.d16_unorm_33x128
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.multiple_layers.x8_d24_unorm_pack32_33x128
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.multiple_layers.d32_sfloat_33x128
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.multiple_layers.s8_uint_33x128
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.multiple_layers.d16_unorm_s8_uint_33x128
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.multiple_layers.d16_unorm_s8_uint_separate_layouts_depth_33x128
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.multiple_layers.d16_unorm_s8_uint_separate_layouts_stencil_33x128
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.multiple_layers.d24_unorm_s8_uint_33x128
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.multiple_layers.d24_unorm_s8_uint_separate_layouts_depth_33x128
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.multiple_layers.d24_unorm_s8_uint_separate_layouts_stencil_33x128
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.multiple_layers.d32_sfloat_s8_uint_33x128
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.multiple_layers.d32_sfloat_s8_uint_separate_layouts_depth_33x128
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.multiple_layers.d32_sfloat_s8_uint_separate_layouts_stencil_33x128
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers.d16_unorm
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers.x8_d24_unorm_pack32
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers.d32_sfloat
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers.s8_uint
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers.d16_unorm_s8_uint
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers.d16_unorm_s8_uint_separate_layouts_depth
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers.d16_unorm_s8_uint_separate_layouts_stencil
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers.d24_unorm_s8_uint
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers.d24_unorm_s8_uint_separate_layouts_depth
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers.d24_unorm_s8_uint_separate_layouts_stencil
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers.d32_sfloat_s8_uint
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers.d32_sfloat_s8_uint_separate_layouts_depth
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers.d32_sfloat_s8_uint_separate_layouts_stencil
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers.d16_unorm_200x180
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers.x8_d24_unorm_pack32_200x180
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers.d32_sfloat_200x180
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers.s8_uint_200x180
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers.d16_unorm_s8_uint_200x180
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers.d16_unorm_s8_uint_separate_layouts_depth_200x180
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers.d16_unorm_s8_uint_separate_layouts_stencil_200x180
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers.d24_unorm_s8_uint_200x180
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers.d24_unorm_s8_uint_separate_layouts_depth_200x180
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers.d24_unorm_s8_uint_separate_layouts_stencil_200x180
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers.d32_sfloat_s8_uint_200x180
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers.d32_sfloat_s8_uint_separate_layouts_depth_200x180
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers.d32_sfloat_s8_uint_separate_layouts_stencil_200x180
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers.d16_unorm_1x33
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers.x8_d24_unorm_pack32_1x33
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers.d32_sfloat_1x33
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers.s8_uint_1x33
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers.d16_unorm_s8_uint_1x33
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers.d16_unorm_s8_uint_separate_layouts_depth_1x33
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers.d16_unorm_s8_uint_separate_layouts_stencil_1x33
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers.d24_unorm_s8_uint_1x33
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers.d24_unorm_s8_uint_separate_layouts_depth_1x33
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers.d24_unorm_s8_uint_separate_layouts_stencil_1x33
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers.d32_sfloat_s8_uint_1x33
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers.d32_sfloat_s8_uint_separate_layouts_depth_1x33
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers.d32_sfloat_s8_uint_separate_layouts_stencil_1x33
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers.d16_unorm_64x11
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers.x8_d24_unorm_pack32_64x11
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers.d32_sfloat_64x11
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers.s8_uint_64x11
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers.d16_unorm_s8_uint_64x11
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers.d16_unorm_s8_uint_separate_layouts_depth_64x11
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers.d16_unorm_s8_uint_separate_layouts_stencil_64x11
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers.d24_unorm_s8_uint_64x11
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers.d24_unorm_s8_uint_separate_layouts_depth_64x11
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers.d24_unorm_s8_uint_separate_layouts_stencil_64x11
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers.d32_sfloat_s8_uint_64x11
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers.d32_sfloat_s8_uint_separate_layouts_depth_64x11
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers.d32_sfloat_s8_uint_separate_layouts_stencil_64x11
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers.d16_unorm_33x128
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers.x8_d24_unorm_pack32_33x128
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers.d32_sfloat_33x128
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers.s8_uint_33x128
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers.d16_unorm_s8_uint_33x128
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers.d16_unorm_s8_uint_separate_layouts_depth_33x128
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers.d16_unorm_s8_uint_separate_layouts_stencil_33x128
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers.d24_unorm_s8_uint_33x128
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers.d24_unorm_s8_uint_separate_layouts_depth_33x128
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers.d24_unorm_s8_uint_separate_layouts_stencil_33x128
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers.d32_sfloat_s8_uint_33x128
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers.d32_sfloat_s8_uint_separate_layouts_depth_33x128
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers.d32_sfloat_s8_uint_separate_layouts_stencil_33x128
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers_twostep.d16_unorm
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers_twostep.x8_d24_unorm_pack32
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers_twostep.d32_sfloat
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers_twostep.s8_uint
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers_twostep.d16_unorm_s8_uint
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers_twostep.d16_unorm_s8_uint_separate_layouts_depth
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers_twostep.d16_unorm_s8_uint_separate_layouts_stencil
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers_twostep.d24_unorm_s8_uint
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers_twostep.d24_unorm_s8_uint_separate_layouts_depth
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers_twostep.d24_unorm_s8_uint_separate_layouts_stencil
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers_twostep.d32_sfloat_s8_uint
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers_twostep.d32_sfloat_s8_uint_separate_layouts_depth
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers_twostep.d32_sfloat_s8_uint_separate_layouts_stencil
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers_twostep.d16_unorm_200x180
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers_twostep.x8_d24_unorm_pack32_200x180
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers_twostep.d32_sfloat_200x180
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers_twostep.s8_uint_200x180
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers_twostep.d16_unorm_s8_uint_200x180
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers_twostep.d16_unorm_s8_uint_separate_layouts_depth_200x180
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers_twostep.d16_unorm_s8_uint_separate_layouts_stencil_200x180
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers_twostep.d24_unorm_s8_uint_200x180
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers_twostep.d24_unorm_s8_uint_separate_layouts_depth_200x180
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers_twostep.d24_unorm_s8_uint_separate_layouts_stencil_200x180
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers_twostep.d32_sfloat_s8_uint_200x180
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers_twostep.d32_sfloat_s8_uint_separate_layouts_depth_200x180
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers_twostep.d32_sfloat_s8_uint_separate_layouts_stencil_200x180
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers_twostep.d16_unorm_1x33
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers_twostep.x8_d24_unorm_pack32_1x33
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers_twostep.d32_sfloat_1x33
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers_twostep.s8_uint_1x33
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers_twostep.d16_unorm_s8_uint_1x33
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers_twostep.d16_unorm_s8_uint_separate_layouts_depth_1x33
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers_twostep.d16_unorm_s8_uint_separate_layouts_stencil_1x33
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers_twostep.d24_unorm_s8_uint_1x33
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers_twostep.d24_unorm_s8_uint_separate_layouts_depth_1x33
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers_twostep.d24_unorm_s8_uint_separate_layouts_stencil_1x33
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers_twostep.d32_sfloat_s8_uint_1x33
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers_twostep.d32_sfloat_s8_uint_separate_layouts_depth_1x33
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers_twostep.d32_sfloat_s8_uint_separate_layouts_stencil_1x33
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers_twostep.d16_unorm_64x11
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers_twostep.x8_d24_unorm_pack32_64x11
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers_twostep.d32_sfloat_64x11
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers_twostep.s8_uint_64x11
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers_twostep.d16_unorm_s8_uint_64x11
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers_twostep.d16_unorm_s8_uint_separate_layouts_depth_64x11
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers_twostep.d16_unorm_s8_uint_separate_layouts_stencil_64x11
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers_twostep.d24_unorm_s8_uint_64x11
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers_twostep.d24_unorm_s8_uint_separate_layouts_depth_64x11
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers_twostep.d24_unorm_s8_uint_separate_layouts_stencil_64x11
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers_twostep.d32_sfloat_s8_uint_64x11
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers_twostep.d32_sfloat_s8_uint_separate_layouts_depth_64x11
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers_twostep.d32_sfloat_s8_uint_separate_layouts_stencil_64x11
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers_twostep.d16_unorm_33x128
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers_twostep.x8_d24_unorm_pack32_33x128
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers_twostep.d32_sfloat_33x128
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers_twostep.s8_uint_33x128
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers_twostep.d16_unorm_s8_uint_33x128
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers_twostep.d16_unorm_s8_uint_separate_layouts_depth_33x128
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers_twostep.d16_unorm_s8_uint_separate_layouts_stencil_33x128
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers_twostep.d24_unorm_s8_uint_33x128
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers_twostep.d24_unorm_s8_uint_separate_layouts_depth_33x128
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers_twostep.d24_unorm_s8_uint_separate_layouts_stencil_33x128
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers_twostep.d32_sfloat_s8_uint_33x128
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers_twostep.d32_sfloat_s8_uint_separate_layouts_depth_33x128
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers_twostep.d32_sfloat_s8_uint_separate_layouts_stencil_33x128
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_color_attachment.single_layer.r4g4_unorm_pack8
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_color_attachment.single_layer.r4g4b4a4_unorm_pack16
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_color_attachment.single_layer.b4g4r4a4_unorm_pack16
@@ -106067,141 +106475,261 @@ dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.s
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.single_layer.d32_sfloat
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.single_layer.s8_uint
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.single_layer.d16_unorm_s8_uint
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.single_layer.d16_unorm_s8_uint_separate_layouts_depth
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.single_layer.d16_unorm_s8_uint_separate_layouts_stencil
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.single_layer.d24_unorm_s8_uint
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.single_layer.d24_unorm_s8_uint_separate_layouts_depth
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.single_layer.d24_unorm_s8_uint_separate_layouts_stencil
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.single_layer.d32_sfloat_s8_uint
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.single_layer.d32_sfloat_s8_uint_separate_layouts_depth
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.single_layer.d32_sfloat_s8_uint_separate_layouts_stencil
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.single_layer.d16_unorm_200x180
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.single_layer.x8_d24_unorm_pack32_200x180
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.single_layer.d32_sfloat_200x180
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.single_layer.s8_uint_200x180
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.single_layer.d16_unorm_s8_uint_200x180
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.single_layer.d16_unorm_s8_uint_separate_layouts_depth_200x180
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.single_layer.d16_unorm_s8_uint_separate_layouts_stencil_200x180
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.single_layer.d24_unorm_s8_uint_200x180
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.single_layer.d24_unorm_s8_uint_separate_layouts_depth_200x180
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.single_layer.d24_unorm_s8_uint_separate_layouts_stencil_200x180
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.single_layer.d32_sfloat_s8_uint_200x180
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.single_layer.d32_sfloat_s8_uint_separate_layouts_depth_200x180
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.single_layer.d32_sfloat_s8_uint_separate_layouts_stencil_200x180
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.single_layer.d16_unorm_1x33
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.single_layer.x8_d24_unorm_pack32_1x33
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.single_layer.d32_sfloat_1x33
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.single_layer.s8_uint_1x33
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.single_layer.d16_unorm_s8_uint_1x33
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.single_layer.d16_unorm_s8_uint_separate_layouts_depth_1x33
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.single_layer.d16_unorm_s8_uint_separate_layouts_stencil_1x33
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.single_layer.d24_unorm_s8_uint_1x33
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.single_layer.d24_unorm_s8_uint_separate_layouts_depth_1x33
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.single_layer.d24_unorm_s8_uint_separate_layouts_stencil_1x33
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.single_layer.d32_sfloat_s8_uint_1x33
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.single_layer.d32_sfloat_s8_uint_separate_layouts_depth_1x33
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.single_layer.d32_sfloat_s8_uint_separate_layouts_stencil_1x33
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.single_layer.d16_unorm_64x11
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.single_layer.x8_d24_unorm_pack32_64x11
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.single_layer.d32_sfloat_64x11
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.single_layer.s8_uint_64x11
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.single_layer.d16_unorm_s8_uint_64x11
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.single_layer.d16_unorm_s8_uint_separate_layouts_depth_64x11
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.single_layer.d16_unorm_s8_uint_separate_layouts_stencil_64x11
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.single_layer.d24_unorm_s8_uint_64x11
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.single_layer.d24_unorm_s8_uint_separate_layouts_depth_64x11
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.single_layer.d24_unorm_s8_uint_separate_layouts_stencil_64x11
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.single_layer.d32_sfloat_s8_uint_64x11
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.single_layer.d32_sfloat_s8_uint_separate_layouts_depth_64x11
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.single_layer.d32_sfloat_s8_uint_separate_layouts_stencil_64x11
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.single_layer.d16_unorm_33x128
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.single_layer.x8_d24_unorm_pack32_33x128
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.single_layer.d32_sfloat_33x128
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.single_layer.s8_uint_33x128
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.single_layer.d16_unorm_s8_uint_33x128
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.single_layer.d16_unorm_s8_uint_separate_layouts_depth_33x128
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.single_layer.d16_unorm_s8_uint_separate_layouts_stencil_33x128
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.single_layer.d24_unorm_s8_uint_33x128
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.single_layer.d24_unorm_s8_uint_separate_layouts_depth_33x128
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.single_layer.d24_unorm_s8_uint_separate_layouts_stencil_33x128
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.single_layer.d32_sfloat_s8_uint_33x128
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.single_layer.d32_sfloat_s8_uint_separate_layouts_depth_33x128
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.single_layer.d32_sfloat_s8_uint_separate_layouts_stencil_33x128
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.multiple_layers.d16_unorm
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.multiple_layers.x8_d24_unorm_pack32
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.multiple_layers.d32_sfloat
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.multiple_layers.s8_uint
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.multiple_layers.d16_unorm_s8_uint
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.multiple_layers.d16_unorm_s8_uint_separate_layouts_depth
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.multiple_layers.d16_unorm_s8_uint_separate_layouts_stencil
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.multiple_layers.d24_unorm_s8_uint
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.multiple_layers.d24_unorm_s8_uint_separate_layouts_depth
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.multiple_layers.d24_unorm_s8_uint_separate_layouts_stencil
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.multiple_layers.d32_sfloat_s8_uint
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.multiple_layers.d32_sfloat_s8_uint_separate_layouts_depth
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.multiple_layers.d32_sfloat_s8_uint_separate_layouts_stencil
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.multiple_layers.d16_unorm_200x180
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.multiple_layers.x8_d24_unorm_pack32_200x180
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.multiple_layers.d32_sfloat_200x180
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.multiple_layers.s8_uint_200x180
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.multiple_layers.d16_unorm_s8_uint_200x180
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.multiple_layers.d16_unorm_s8_uint_separate_layouts_depth_200x180
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.multiple_layers.d16_unorm_s8_uint_separate_layouts_stencil_200x180
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.multiple_layers.d24_unorm_s8_uint_200x180
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.multiple_layers.d24_unorm_s8_uint_separate_layouts_depth_200x180
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.multiple_layers.d24_unorm_s8_uint_separate_layouts_stencil_200x180
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.multiple_layers.d32_sfloat_s8_uint_200x180
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.multiple_layers.d32_sfloat_s8_uint_separate_layouts_depth_200x180
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.multiple_layers.d32_sfloat_s8_uint_separate_layouts_stencil_200x180
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.multiple_layers.d16_unorm_1x33
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.multiple_layers.x8_d24_unorm_pack32_1x33
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.multiple_layers.d32_sfloat_1x33
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.multiple_layers.s8_uint_1x33
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.multiple_layers.d16_unorm_s8_uint_1x33
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.multiple_layers.d16_unorm_s8_uint_separate_layouts_depth_1x33
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.multiple_layers.d16_unorm_s8_uint_separate_layouts_stencil_1x33
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.multiple_layers.d24_unorm_s8_uint_1x33
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.multiple_layers.d24_unorm_s8_uint_separate_layouts_depth_1x33
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.multiple_layers.d24_unorm_s8_uint_separate_layouts_stencil_1x33
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.multiple_layers.d32_sfloat_s8_uint_1x33
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.multiple_layers.d32_sfloat_s8_uint_separate_layouts_depth_1x33
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.multiple_layers.d32_sfloat_s8_uint_separate_layouts_stencil_1x33
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.multiple_layers.d16_unorm_64x11
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.multiple_layers.x8_d24_unorm_pack32_64x11
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.multiple_layers.d32_sfloat_64x11
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.multiple_layers.s8_uint_64x11
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.multiple_layers.d16_unorm_s8_uint_64x11
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.multiple_layers.d16_unorm_s8_uint_separate_layouts_depth_64x11
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.multiple_layers.d16_unorm_s8_uint_separate_layouts_stencil_64x11
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.multiple_layers.d24_unorm_s8_uint_64x11
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.multiple_layers.d24_unorm_s8_uint_separate_layouts_depth_64x11
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.multiple_layers.d24_unorm_s8_uint_separate_layouts_stencil_64x11
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.multiple_layers.d32_sfloat_s8_uint_64x11
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.multiple_layers.d32_sfloat_s8_uint_separate_layouts_depth_64x11
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.multiple_layers.d32_sfloat_s8_uint_separate_layouts_stencil_64x11
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.multiple_layers.d16_unorm_33x128
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.multiple_layers.x8_d24_unorm_pack32_33x128
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.multiple_layers.d32_sfloat_33x128
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.multiple_layers.s8_uint_33x128
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.multiple_layers.d16_unorm_s8_uint_33x128
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.multiple_layers.d16_unorm_s8_uint_separate_layouts_depth_33x128
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.multiple_layers.d16_unorm_s8_uint_separate_layouts_stencil_33x128
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.multiple_layers.d24_unorm_s8_uint_33x128
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.multiple_layers.d24_unorm_s8_uint_separate_layouts_depth_33x128
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.multiple_layers.d24_unorm_s8_uint_separate_layouts_stencil_33x128
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.multiple_layers.d32_sfloat_s8_uint_33x128
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.multiple_layers.d32_sfloat_s8_uint_separate_layouts_depth_33x128
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.multiple_layers.d32_sfloat_s8_uint_separate_layouts_stencil_33x128
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.cube_layers.d16_unorm
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.cube_layers.x8_d24_unorm_pack32
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.cube_layers.d32_sfloat
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.cube_layers.s8_uint
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.cube_layers.d16_unorm_s8_uint
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.cube_layers.d16_unorm_s8_uint_separate_layouts_depth
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.cube_layers.d16_unorm_s8_uint_separate_layouts_stencil
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.cube_layers.d24_unorm_s8_uint
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.cube_layers.d24_unorm_s8_uint_separate_layouts_depth
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.cube_layers.d24_unorm_s8_uint_separate_layouts_stencil
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.cube_layers.d32_sfloat_s8_uint
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.cube_layers.d32_sfloat_s8_uint_separate_layouts_depth
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.cube_layers.d32_sfloat_s8_uint_separate_layouts_stencil
 dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.single_layer.d16_unorm
 dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.single_layer.x8_d24_unorm_pack32
 dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.single_layer.d32_sfloat
 dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.single_layer.s8_uint
 dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.single_layer.d16_unorm_s8_uint
+dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.single_layer.d16_unorm_s8_uint_separate_layouts_depth
+dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.single_layer.d16_unorm_s8_uint_separate_layouts_stencil
 dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.single_layer.d24_unorm_s8_uint
+dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.single_layer.d24_unorm_s8_uint_separate_layouts_depth
+dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.single_layer.d24_unorm_s8_uint_separate_layouts_stencil
 dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.single_layer.d32_sfloat_s8_uint
+dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.single_layer.d32_sfloat_s8_uint_separate_layouts_depth
+dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.single_layer.d32_sfloat_s8_uint_separate_layouts_stencil
 dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.single_layer.d16_unorm_200x180
 dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.single_layer.x8_d24_unorm_pack32_200x180
 dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.single_layer.d32_sfloat_200x180
 dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.single_layer.s8_uint_200x180
 dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.single_layer.d16_unorm_s8_uint_200x180
+dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.single_layer.d16_unorm_s8_uint_separate_layouts_depth_200x180
+dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.single_layer.d16_unorm_s8_uint_separate_layouts_stencil_200x180
 dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.single_layer.d24_unorm_s8_uint_200x180
+dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.single_layer.d24_unorm_s8_uint_separate_layouts_depth_200x180
+dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.single_layer.d24_unorm_s8_uint_separate_layouts_stencil_200x180
 dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.single_layer.d32_sfloat_s8_uint_200x180
+dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.single_layer.d32_sfloat_s8_uint_separate_layouts_depth_200x180
+dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.single_layer.d32_sfloat_s8_uint_separate_layouts_stencil_200x180
 dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.single_layer.d16_unorm_64x11
 dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.single_layer.x8_d24_unorm_pack32_64x11
 dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.single_layer.d32_sfloat_64x11
 dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.single_layer.s8_uint_64x11
 dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.single_layer.d16_unorm_s8_uint_64x11
+dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.single_layer.d16_unorm_s8_uint_separate_layouts_depth_64x11
+dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.single_layer.d16_unorm_s8_uint_separate_layouts_stencil_64x11
 dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.single_layer.d24_unorm_s8_uint_64x11
+dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.single_layer.d24_unorm_s8_uint_separate_layouts_depth_64x11
+dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.single_layer.d24_unorm_s8_uint_separate_layouts_stencil_64x11
 dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.single_layer.d32_sfloat_s8_uint_64x11
+dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.single_layer.d32_sfloat_s8_uint_separate_layouts_depth_64x11
+dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.single_layer.d32_sfloat_s8_uint_separate_layouts_stencil_64x11
 dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.single_layer.d16_unorm_33x128
 dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.single_layer.x8_d24_unorm_pack32_33x128
 dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.single_layer.d32_sfloat_33x128
 dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.single_layer.s8_uint_33x128
 dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.single_layer.d16_unorm_s8_uint_33x128
+dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.single_layer.d16_unorm_s8_uint_separate_layouts_depth_33x128
+dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.single_layer.d16_unorm_s8_uint_separate_layouts_stencil_33x128
 dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.single_layer.d24_unorm_s8_uint_33x128
+dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.single_layer.d24_unorm_s8_uint_separate_layouts_depth_33x128
+dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.single_layer.d24_unorm_s8_uint_separate_layouts_stencil_33x128
 dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.single_layer.d32_sfloat_s8_uint_33x128
+dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.single_layer.d32_sfloat_s8_uint_separate_layouts_depth_33x128
+dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.single_layer.d32_sfloat_s8_uint_separate_layouts_stencil_33x128
 dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.multiple_layers.d16_unorm
 dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.multiple_layers.x8_d24_unorm_pack32
 dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.multiple_layers.d32_sfloat
 dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.multiple_layers.s8_uint
 dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.multiple_layers.d16_unorm_s8_uint
+dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.multiple_layers.d16_unorm_s8_uint_separate_layouts_depth
+dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.multiple_layers.d16_unorm_s8_uint_separate_layouts_stencil
 dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.multiple_layers.d24_unorm_s8_uint
+dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.multiple_layers.d24_unorm_s8_uint_separate_layouts_depth
+dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.multiple_layers.d24_unorm_s8_uint_separate_layouts_stencil
 dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.multiple_layers.d32_sfloat_s8_uint
+dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.multiple_layers.d32_sfloat_s8_uint_separate_layouts_depth
+dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.multiple_layers.d32_sfloat_s8_uint_separate_layouts_stencil
 dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.multiple_layers.d16_unorm_200x180
 dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.multiple_layers.x8_d24_unorm_pack32_200x180
 dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.multiple_layers.d32_sfloat_200x180
 dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.multiple_layers.s8_uint_200x180
 dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.multiple_layers.d16_unorm_s8_uint_200x180
+dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.multiple_layers.d16_unorm_s8_uint_separate_layouts_depth_200x180
+dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.multiple_layers.d16_unorm_s8_uint_separate_layouts_stencil_200x180
 dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.multiple_layers.d24_unorm_s8_uint_200x180
+dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.multiple_layers.d24_unorm_s8_uint_separate_layouts_depth_200x180
+dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.multiple_layers.d24_unorm_s8_uint_separate_layouts_stencil_200x180
 dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.multiple_layers.d32_sfloat_s8_uint_200x180
+dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.multiple_layers.d32_sfloat_s8_uint_separate_layouts_depth_200x180
+dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.multiple_layers.d32_sfloat_s8_uint_separate_layouts_stencil_200x180
 dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.multiple_layers.d16_unorm_64x11
 dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.multiple_layers.x8_d24_unorm_pack32_64x11
 dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.multiple_layers.d32_sfloat_64x11
 dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.multiple_layers.s8_uint_64x11
 dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.multiple_layers.d16_unorm_s8_uint_64x11
+dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.multiple_layers.d16_unorm_s8_uint_separate_layouts_depth_64x11
+dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.multiple_layers.d16_unorm_s8_uint_separate_layouts_stencil_64x11
 dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.multiple_layers.d24_unorm_s8_uint_64x11
+dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.multiple_layers.d24_unorm_s8_uint_separate_layouts_depth_64x11
+dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.multiple_layers.d24_unorm_s8_uint_separate_layouts_stencil_64x11
 dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.multiple_layers.d32_sfloat_s8_uint_64x11
+dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.multiple_layers.d32_sfloat_s8_uint_separate_layouts_depth_64x11
+dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.multiple_layers.d32_sfloat_s8_uint_separate_layouts_stencil_64x11
 dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.multiple_layers.d16_unorm_33x128
 dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.multiple_layers.x8_d24_unorm_pack32_33x128
 dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.multiple_layers.d32_sfloat_33x128
 dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.multiple_layers.s8_uint_33x128
 dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.multiple_layers.d16_unorm_s8_uint_33x128
+dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.multiple_layers.d16_unorm_s8_uint_separate_layouts_depth_33x128
+dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.multiple_layers.d16_unorm_s8_uint_separate_layouts_stencil_33x128
 dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.multiple_layers.d24_unorm_s8_uint_33x128
+dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.multiple_layers.d24_unorm_s8_uint_separate_layouts_depth_33x128
+dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.multiple_layers.d24_unorm_s8_uint_separate_layouts_stencil_33x128
 dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.multiple_layers.d32_sfloat_s8_uint_33x128
+dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.multiple_layers.d32_sfloat_s8_uint_separate_layouts_depth_33x128
+dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.multiple_layers.d32_sfloat_s8_uint_separate_layouts_stencil_33x128
 dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.cube_layers.d16_unorm
 dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.cube_layers.x8_d24_unorm_pack32
 dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.cube_layers.d32_sfloat
 dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.cube_layers.s8_uint
 dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.cube_layers.d16_unorm_s8_uint
+dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.cube_layers.d16_unorm_s8_uint_separate_layouts_depth
+dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.cube_layers.d16_unorm_s8_uint_separate_layouts_stencil
 dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.cube_layers.d24_unorm_s8_uint
+dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.cube_layers.d24_unorm_s8_uint_separate_layouts_depth
+dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.cube_layers.d24_unorm_s8_uint_separate_layouts_stencil
 dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.cube_layers.d32_sfloat_s8_uint
+dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.cube_layers.d32_sfloat_s8_uint_separate_layouts_depth
+dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.cube_layers.d32_sfloat_s8_uint_separate_layouts_stencil
 dEQP-VK.api.fill_and_update_buffer.suballocation.fill_buffer_whole
 dEQP-VK.api.fill_and_update_buffer.suballocation.update_buffer_whole
 dEQP-VK.api.fill_and_update_buffer.suballocation.fill_buffer_first_one
@@ -118239,6 +118767,4102 @@ dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_decw.dfa
 dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_decw.dfail_decw.comp_not_equal
 dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_decw.dfail_decw.comp_greater_or_equal
 dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_decw.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decw.comp_always
 dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_keep.dfail_keep.comp_never
 dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_keep.dfail_keep.comp_less
 dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_keep.dfail_keep.comp_equal
@@ -122335,6 +126959,4102 @@ dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_decw.dfa
 dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_decw.dfail_decw.comp_not_equal
 dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_decw.dfail_decw.comp_greater_or_equal
 dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_decw.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decw.comp_always
 dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_keep.dfail_keep.comp_never
 dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_keep.dfail_keep.comp_less
 dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_keep.dfail_keep.comp_equal
@@ -126431,6 +135151,4102 @@ dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_decw.df
 dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_decw.dfail_decw.comp_not_equal
 dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_decw.dfail_decw.comp_greater_or_equal
 dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_decw.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decw.comp_always
 dEQP-VK.pipeline.stencil.nocolor.format.s8_uint.states.fail_keep.pass_keep.dfail_keep.comp_never
 dEQP-VK.pipeline.stencil.nocolor.format.s8_uint.states.fail_keep.pass_keep.dfail_keep.comp_less
 dEQP-VK.pipeline.stencil.nocolor.format.s8_uint.states.fail_keep.pass_keep.dfail_keep.comp_equal
@@ -134623,6 +147439,4102 @@ dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint.states.fail_decw.pass_
 dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint.states.fail_decw.pass_decw.dfail_decw.comp_not_equal
 dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint.states.fail_decw.pass_decw.dfail_decw.comp_greater_or_equal
 dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint.states.fail_decw.pass_decw.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decw.comp_always
 dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint.states.fail_keep.pass_keep.dfail_keep.comp_never
 dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint.states.fail_keep.pass_keep.dfail_keep.comp_less
 dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint.states.fail_keep.pass_keep.dfail_keep.comp_equal
@@ -138719,6 +155631,4102 @@ dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint.states.fail_decw.pass_
 dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint.states.fail_decw.pass_decw.dfail_decw.comp_not_equal
 dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint.states.fail_decw.pass_decw.dfail_decw.comp_greater_or_equal
 dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint.states.fail_decw.pass_decw.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decw.comp_always
 dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint.states.fail_keep.pass_keep.dfail_keep.comp_never
 dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint.states.fail_keep.pass_keep.dfail_keep.comp_less
 dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint.states.fail_keep.pass_keep.dfail_keep.comp_equal
@@ -142815,6 +163823,4102 @@ dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint.states.fail_decw.pass
 dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint.states.fail_decw.pass_decw.dfail_decw.comp_not_equal
 dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint.states.fail_decw.pass_decw.dfail_decw.comp_greater_or_equal
 dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint.states.fail_decw.pass_decw.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decw.comp_always
 dEQP-VK.pipeline.blend.format.r4g4_unorm_pack8.states.color_dc_sas_rsub_alpha_1mdc_1msc_sub-color_1msa_1msc_add_alpha_ca_da_min-color_1msc_da_sub_alpha_1mca_ca_sub-color_o_1mda_max_alpha_sa_dc_min
 dEQP-VK.pipeline.blend.format.r4g4_unorm_pack8.states.color_sas_1mda_rsub_alpha_1mda_1mcc_sub-color_1mda_1mca_min_alpha_o_cc_min-color_1mdc_da_min_alpha_1mda_da_min-color_sas_1msa_max_alpha_sas_o_min
 dEQP-VK.pipeline.blend.format.r4g4_unorm_pack8.states.color_ca_1mcc_rsub_alpha_sa_1msc_rsub-color_1mca_ca_rsub_alpha_1msc_da_rsub-color_1mcc_1mdc_sub_alpha_z_da_sub-color_sc_dc_add_alpha_1mdc_1msa_min
@@ -147118,6 +172222,156 @@ dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint.compare_ops.not_equal_less_or_eq
 dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint.compare_ops.not_equal_less_or_equal_not_equal_greater_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint.compare_ops.never_zerodepthbounds_depthdisabled_stencilenabled
 dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint.depth_test_disabled.depth_write_enabled
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.not_equal_not_equal_not_equal_not_equal
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.not_equal_not_equal_not_equal_not_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.not_equal_equal_equal_greater
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.not_equal_equal_equal_greater_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.not_equal_greater_greater_less_or_equal
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.not_equal_greater_greater_less_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.not_equal_greater_or_equal_greater_or_equal_greater_or_equal
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.not_equal_greater_or_equal_greater_or_equal_greater_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.not_equal_less_or_equal_less_or_equal_always
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.not_equal_less_or_equal_less_or_equal_always_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.not_equal_less_less_less
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.not_equal_less_less_less_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.not_equal_never_never_never
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.not_equal_never_never_never_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.equal_not_equal_equal_equal
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.equal_not_equal_equal_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.equal_equal_not_equal_less
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.equal_equal_not_equal_less_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.equal_greater_greater_or_equal_not_equal
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.equal_greater_greater_or_equal_not_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.equal_greater_or_equal_greater_greater
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.equal_greater_or_equal_greater_greater_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.equal_less_or_equal_less_less_or_equal
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.equal_less_or_equal_less_less_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.not_equal_always_always_equal
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.not_equal_always_always_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.equal_less_never_always
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.equal_less_never_always_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.equal_never_less_or_equal_greater_or_equal
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.equal_never_less_or_equal_greater_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.greater_not_equal_greater_less
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.greater_not_equal_greater_less_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.greater_equal_greater_or_equal_always
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.greater_equal_greater_or_equal_always_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.greater_greater_not_equal_greater
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.greater_greater_not_equal_greater_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.greater_greater_or_equal_less_or_equal_not_equal
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.greater_greater_or_equal_less_or_equal_not_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.greater_less_or_equal_never_greater_or_equal
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.greater_less_or_equal_never_greater_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.greater_less_equal_never
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.greater_less_equal_never_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.greater_or_equal_not_equal_greater_or_equal_greater
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.greater_or_equal_not_equal_greater_or_equal_greater_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.greater_never_always_less_or_equal
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.greater_never_always_less_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.greater_or_equal_equal_greater_not_equal
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.greater_or_equal_equal_greater_not_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.greater_or_equal_greater_equal_greater_or_equal
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.greater_or_equal_greater_equal_greater_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.greater_or_equal_greater_or_equal_not_equal_less_or_equal
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.greater_or_equal_greater_or_equal_not_equal_less_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.greater_or_equal_less_or_equal_always_less
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.greater_or_equal_less_or_equal_always_less_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.greater_or_equal_less_less_or_equal_equal
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.greater_or_equal_less_less_or_equal_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.greater_or_equal_always_less_never
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.greater_or_equal_always_less_never_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.less_or_equal_not_equal_less_or_equal_less_or_equal
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.less_or_equal_not_equal_less_or_equal_less_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.less_or_equal_equal_less_equal
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.less_or_equal_equal_less_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.less_or_equal_greater_never_less
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.less_or_equal_greater_never_less_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.less_or_equal_greater_or_equal_equal_always
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.less_or_equal_greater_or_equal_equal_always_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.less_or_equal_less_not_equal_greater_or_equal
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.less_or_equal_less_not_equal_greater_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.less_or_equal_less_or_equal_greater_or_equal_never
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.less_or_equal_less_or_equal_greater_or_equal_never_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.less_not_equal_less_greater_or_equal
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.less_not_equal_less_greater_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.less_equal_never_less_or_equal
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.less_equal_never_less_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.less_greater_less_or_equal_never
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.less_greater_less_or_equal_never_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.less_less_or_equal_greater_equal
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.less_less_or_equal_greater_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.less_less_always_not_equal
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.less_less_always_not_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.less_never_not_equal_always
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.less_never_not_equal_always_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.never_not_equal_always_always
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.never_not_equal_always_always_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.less_always_greater_or_equal_less
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.less_always_greater_or_equal_less_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.never_greater_or_equal_never_equal
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.never_greater_or_equal_never_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.never_never_less_greater
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.never_never_less_greater_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.never_less_or_equal_equal_not_equal
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.never_less_or_equal_equal_not_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.never_less_greater_or_equal_less_or_equal
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.never_less_greater_or_equal_less_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.never_always_greater_greater_or_equal
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.never_always_greater_greater_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.always_equal_always_never
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.always_equal_always_never_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.always_never_equal_less
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.always_never_equal_less_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.always_greater_less_always
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.always_greater_less_always_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.always_always_never_greater
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.always_always_never_greater_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.always_less_or_equal_not_equal_equal
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.always_less_or_equal_not_equal_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.less_or_equal_never_greater_not_equal
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.less_or_equal_never_greater_not_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.never_equal_less_or_equal_less
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.never_equal_less_or_equal_less_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.equal_greater_or_equal_always_never
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.equal_greater_or_equal_always_never_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.greater_always_less_not_equal
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.greater_always_less_not_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.greater_never_greater_or_equal_equal
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.greater_never_greater_or_equal_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.equal_always_equal_less_or_equal
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.equal_always_equal_less_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.less_or_equal_greater_always_greater
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.less_or_equal_greater_always_greater_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.never_not_equal_not_equal_never
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.never_not_equal_not_equal_never_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.always_less_greater_greater
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.always_less_greater_greater_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.always_not_equal_never_not_equal
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.always_not_equal_never_not_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.greater_or_equal_always_not_equal_always
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.greater_or_equal_always_not_equal_always_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.less_or_equal_always_less_or_equal_greater
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.less_or_equal_always_less_or_equal_greater_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.less_greater_or_equal_less_greater
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.less_greater_or_equal_less_greater_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.always_equal_less_or_equal_greater_or_equal
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.always_equal_less_or_equal_greater_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.always_greater_or_equal_greater_or_equal_less_or_equal
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.always_greater_or_equal_greater_or_equal_less_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.greater_or_equal_greater_or_equal_never_less
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.greater_or_equal_greater_or_equal_never_less_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.greater_or_equal_never_greater_never
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.greater_or_equal_never_greater_never_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.less_greater_equal_equal
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.less_greater_equal_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.never_greater_always_greater_or_equal
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.never_greater_always_greater_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.not_equal_not_equal_greater_always
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.not_equal_not_equal_greater_always_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.not_equal_less_or_equal_not_equal_greater
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.not_equal_less_or_equal_not_equal_greater_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.never_zerodepthbounds_depthdisabled_stencilenabled
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.depth_test_disabled.depth_write_enabled
 dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint.compare_ops.not_equal_not_equal_not_equal_not_equal
 dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint.compare_ops.not_equal_not_equal_not_equal_not_equal_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint.compare_ops.not_equal_equal_equal_greater
@@ -147268,6 +172522,156 @@ dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint.compare_ops.not_equal_less_or_eq
 dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint.compare_ops.not_equal_less_or_equal_not_equal_greater_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint.compare_ops.never_zerodepthbounds_depthdisabled_stencilenabled
 dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint.depth_test_disabled.depth_write_enabled
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.not_equal_not_equal_not_equal_not_equal
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.not_equal_not_equal_not_equal_not_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.not_equal_equal_equal_greater
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.not_equal_equal_equal_greater_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.not_equal_greater_greater_less_or_equal
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.not_equal_greater_greater_less_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.not_equal_greater_or_equal_greater_or_equal_greater_or_equal
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.not_equal_greater_or_equal_greater_or_equal_greater_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.not_equal_less_or_equal_less_or_equal_always
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.not_equal_less_or_equal_less_or_equal_always_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.not_equal_less_less_less
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.not_equal_less_less_less_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.not_equal_never_never_never
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.not_equal_never_never_never_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.equal_not_equal_equal_equal
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.equal_not_equal_equal_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.equal_equal_not_equal_less
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.equal_equal_not_equal_less_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.equal_greater_greater_or_equal_not_equal
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.equal_greater_greater_or_equal_not_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.equal_greater_or_equal_greater_greater
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.equal_greater_or_equal_greater_greater_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.equal_less_or_equal_less_less_or_equal
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.equal_less_or_equal_less_less_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.not_equal_always_always_equal
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.not_equal_always_always_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.equal_less_never_always
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.equal_less_never_always_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.equal_never_less_or_equal_greater_or_equal
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.equal_never_less_or_equal_greater_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.greater_not_equal_greater_less
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.greater_not_equal_greater_less_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.greater_equal_greater_or_equal_always
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.greater_equal_greater_or_equal_always_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.greater_greater_not_equal_greater
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.greater_greater_not_equal_greater_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.greater_greater_or_equal_less_or_equal_not_equal
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.greater_greater_or_equal_less_or_equal_not_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.greater_less_or_equal_never_greater_or_equal
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.greater_less_or_equal_never_greater_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.greater_less_equal_never
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.greater_less_equal_never_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.greater_or_equal_not_equal_greater_or_equal_greater
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.greater_or_equal_not_equal_greater_or_equal_greater_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.greater_never_always_less_or_equal
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.greater_never_always_less_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.greater_or_equal_equal_greater_not_equal
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.greater_or_equal_equal_greater_not_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.greater_or_equal_greater_equal_greater_or_equal
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.greater_or_equal_greater_equal_greater_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.greater_or_equal_greater_or_equal_not_equal_less_or_equal
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.greater_or_equal_greater_or_equal_not_equal_less_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.greater_or_equal_less_or_equal_always_less
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.greater_or_equal_less_or_equal_always_less_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.greater_or_equal_less_less_or_equal_equal
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.greater_or_equal_less_less_or_equal_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.greater_or_equal_always_less_never
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.greater_or_equal_always_less_never_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.less_or_equal_not_equal_less_or_equal_less_or_equal
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.less_or_equal_not_equal_less_or_equal_less_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.less_or_equal_equal_less_equal
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.less_or_equal_equal_less_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.less_or_equal_greater_never_less
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.less_or_equal_greater_never_less_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.less_or_equal_greater_or_equal_equal_always
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.less_or_equal_greater_or_equal_equal_always_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.less_or_equal_less_not_equal_greater_or_equal
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.less_or_equal_less_not_equal_greater_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.less_or_equal_less_or_equal_greater_or_equal_never
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.less_or_equal_less_or_equal_greater_or_equal_never_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.less_not_equal_less_greater_or_equal
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.less_not_equal_less_greater_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.less_equal_never_less_or_equal
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.less_equal_never_less_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.less_greater_less_or_equal_never
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.less_greater_less_or_equal_never_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.less_less_or_equal_greater_equal
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.less_less_or_equal_greater_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.less_less_always_not_equal
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.less_less_always_not_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.less_never_not_equal_always
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.less_never_not_equal_always_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.never_not_equal_always_always
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.never_not_equal_always_always_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.less_always_greater_or_equal_less
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.less_always_greater_or_equal_less_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.never_greater_or_equal_never_equal
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.never_greater_or_equal_never_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.never_never_less_greater
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.never_never_less_greater_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.never_less_or_equal_equal_not_equal
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.never_less_or_equal_equal_not_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.never_less_greater_or_equal_less_or_equal
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.never_less_greater_or_equal_less_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.never_always_greater_greater_or_equal
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.never_always_greater_greater_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.always_equal_always_never
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.always_equal_always_never_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.always_never_equal_less
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.always_never_equal_less_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.always_greater_less_always
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.always_greater_less_always_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.always_always_never_greater
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.always_always_never_greater_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.always_less_or_equal_not_equal_equal
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.always_less_or_equal_not_equal_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.less_or_equal_never_greater_not_equal
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.less_or_equal_never_greater_not_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.never_equal_less_or_equal_less
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.never_equal_less_or_equal_less_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.equal_greater_or_equal_always_never
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.equal_greater_or_equal_always_never_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.greater_always_less_not_equal
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.greater_always_less_not_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.greater_never_greater_or_equal_equal
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.greater_never_greater_or_equal_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.equal_always_equal_less_or_equal
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.equal_always_equal_less_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.less_or_equal_greater_always_greater
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.less_or_equal_greater_always_greater_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.never_not_equal_not_equal_never
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.never_not_equal_not_equal_never_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.always_less_greater_greater
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.always_less_greater_greater_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.always_not_equal_never_not_equal
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.always_not_equal_never_not_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.greater_or_equal_always_not_equal_always
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.greater_or_equal_always_not_equal_always_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.less_or_equal_always_less_or_equal_greater
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.less_or_equal_always_less_or_equal_greater_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.less_greater_or_equal_less_greater
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.less_greater_or_equal_less_greater_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.always_equal_less_or_equal_greater_or_equal
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.always_equal_less_or_equal_greater_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.always_greater_or_equal_greater_or_equal_less_or_equal
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.always_greater_or_equal_greater_or_equal_less_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.greater_or_equal_greater_or_equal_never_less
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.greater_or_equal_greater_or_equal_never_less_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.greater_or_equal_never_greater_never
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.greater_or_equal_never_greater_never_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.less_greater_equal_equal
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.less_greater_equal_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.never_greater_always_greater_or_equal
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.never_greater_always_greater_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.not_equal_not_equal_greater_always
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.not_equal_not_equal_greater_always_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.not_equal_less_or_equal_not_equal_greater
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.not_equal_less_or_equal_not_equal_greater_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.never_zerodepthbounds_depthdisabled_stencilenabled
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.depth_test_disabled.depth_write_enabled
 dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint.compare_ops.not_equal_not_equal_not_equal_not_equal
 dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint.compare_ops.not_equal_not_equal_not_equal_not_equal_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint.compare_ops.not_equal_equal_equal_greater
@@ -147418,6 +172822,156 @@ dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint.compare_ops.not_equal_less_or_e
 dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint.compare_ops.not_equal_less_or_equal_not_equal_greater_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint.compare_ops.never_zerodepthbounds_depthdisabled_stencilenabled
 dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint.depth_test_disabled.depth_write_enabled
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.not_equal_not_equal_not_equal_not_equal
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.not_equal_not_equal_not_equal_not_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.not_equal_equal_equal_greater
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.not_equal_equal_equal_greater_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.not_equal_greater_greater_less_or_equal
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.not_equal_greater_greater_less_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.not_equal_greater_or_equal_greater_or_equal_greater_or_equal
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.not_equal_greater_or_equal_greater_or_equal_greater_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.not_equal_less_or_equal_less_or_equal_always
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.not_equal_less_or_equal_less_or_equal_always_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.not_equal_less_less_less
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.not_equal_less_less_less_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.not_equal_never_never_never
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.not_equal_never_never_never_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.equal_not_equal_equal_equal
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.equal_not_equal_equal_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.equal_equal_not_equal_less
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.equal_equal_not_equal_less_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.equal_greater_greater_or_equal_not_equal
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.equal_greater_greater_or_equal_not_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.equal_greater_or_equal_greater_greater
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.equal_greater_or_equal_greater_greater_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.equal_less_or_equal_less_less_or_equal
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.equal_less_or_equal_less_less_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.not_equal_always_always_equal
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.not_equal_always_always_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.equal_less_never_always
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.equal_less_never_always_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.equal_never_less_or_equal_greater_or_equal
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.equal_never_less_or_equal_greater_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.greater_not_equal_greater_less
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.greater_not_equal_greater_less_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.greater_equal_greater_or_equal_always
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.greater_equal_greater_or_equal_always_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.greater_greater_not_equal_greater
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.greater_greater_not_equal_greater_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.greater_greater_or_equal_less_or_equal_not_equal
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.greater_greater_or_equal_less_or_equal_not_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.greater_less_or_equal_never_greater_or_equal
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.greater_less_or_equal_never_greater_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.greater_less_equal_never
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.greater_less_equal_never_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.greater_or_equal_not_equal_greater_or_equal_greater
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.greater_or_equal_not_equal_greater_or_equal_greater_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.greater_never_always_less_or_equal
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.greater_never_always_less_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.greater_or_equal_equal_greater_not_equal
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.greater_or_equal_equal_greater_not_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.greater_or_equal_greater_equal_greater_or_equal
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.greater_or_equal_greater_equal_greater_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.greater_or_equal_greater_or_equal_not_equal_less_or_equal
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.greater_or_equal_greater_or_equal_not_equal_less_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.greater_or_equal_less_or_equal_always_less
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.greater_or_equal_less_or_equal_always_less_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.greater_or_equal_less_less_or_equal_equal
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.greater_or_equal_less_less_or_equal_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.greater_or_equal_always_less_never
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.greater_or_equal_always_less_never_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.less_or_equal_not_equal_less_or_equal_less_or_equal
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.less_or_equal_not_equal_less_or_equal_less_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.less_or_equal_equal_less_equal
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.less_or_equal_equal_less_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.less_or_equal_greater_never_less
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.less_or_equal_greater_never_less_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.less_or_equal_greater_or_equal_equal_always
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.less_or_equal_greater_or_equal_equal_always_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.less_or_equal_less_not_equal_greater_or_equal
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.less_or_equal_less_not_equal_greater_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.less_or_equal_less_or_equal_greater_or_equal_never
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.less_or_equal_less_or_equal_greater_or_equal_never_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.less_not_equal_less_greater_or_equal
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.less_not_equal_less_greater_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.less_equal_never_less_or_equal
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.less_equal_never_less_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.less_greater_less_or_equal_never
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.less_greater_less_or_equal_never_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.less_less_or_equal_greater_equal
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.less_less_or_equal_greater_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.less_less_always_not_equal
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.less_less_always_not_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.less_never_not_equal_always
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.less_never_not_equal_always_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.never_not_equal_always_always
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.never_not_equal_always_always_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.less_always_greater_or_equal_less
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.less_always_greater_or_equal_less_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.never_greater_or_equal_never_equal
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.never_greater_or_equal_never_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.never_never_less_greater
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.never_never_less_greater_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.never_less_or_equal_equal_not_equal
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.never_less_or_equal_equal_not_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.never_less_greater_or_equal_less_or_equal
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.never_less_greater_or_equal_less_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.never_always_greater_greater_or_equal
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.never_always_greater_greater_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.always_equal_always_never
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.always_equal_always_never_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.always_never_equal_less
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.always_never_equal_less_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.always_greater_less_always
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.always_greater_less_always_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.always_always_never_greater
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.always_always_never_greater_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.always_less_or_equal_not_equal_equal
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.always_less_or_equal_not_equal_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.less_or_equal_never_greater_not_equal
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.less_or_equal_never_greater_not_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.never_equal_less_or_equal_less
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.never_equal_less_or_equal_less_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.equal_greater_or_equal_always_never
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.equal_greater_or_equal_always_never_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.greater_always_less_not_equal
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.greater_always_less_not_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.greater_never_greater_or_equal_equal
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.greater_never_greater_or_equal_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.equal_always_equal_less_or_equal
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.equal_always_equal_less_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.less_or_equal_greater_always_greater
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.less_or_equal_greater_always_greater_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.never_not_equal_not_equal_never
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.never_not_equal_not_equal_never_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.always_less_greater_greater
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.always_less_greater_greater_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.always_not_equal_never_not_equal
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.always_not_equal_never_not_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.greater_or_equal_always_not_equal_always
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.greater_or_equal_always_not_equal_always_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.less_or_equal_always_less_or_equal_greater
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.less_or_equal_always_less_or_equal_greater_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.less_greater_or_equal_less_greater
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.less_greater_or_equal_less_greater_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.always_equal_less_or_equal_greater_or_equal
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.always_equal_less_or_equal_greater_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.always_greater_or_equal_greater_or_equal_less_or_equal
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.always_greater_or_equal_greater_or_equal_less_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.greater_or_equal_greater_or_equal_never_less
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.greater_or_equal_greater_or_equal_never_less_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.greater_or_equal_never_greater_never
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.greater_or_equal_never_greater_never_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.less_greater_equal_equal
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.less_greater_equal_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.never_greater_always_greater_or_equal
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.never_greater_always_greater_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.not_equal_not_equal_greater_always
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.not_equal_not_equal_greater_always_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.not_equal_less_or_equal_not_equal_greater
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.not_equal_less_or_equal_not_equal_greater_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.never_zerodepthbounds_depthdisabled_stencilenabled
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.depth_test_disabled.depth_write_enabled
 dEQP-VK.pipeline.depth.nocolor.format.d16_unorm.compare_ops.not_equal_not_equal_not_equal_not_equal
 dEQP-VK.pipeline.depth.nocolor.format.d16_unorm.compare_ops.not_equal_not_equal_not_equal_not_equal_depth_bounds_test
 dEQP-VK.pipeline.depth.nocolor.format.d16_unorm.compare_ops.not_equal_equal_equal_greater
@@ -148018,6 +173572,156 @@ dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint.compare_ops.not_equal_le
 dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint.compare_ops.not_equal_less_or_equal_not_equal_greater_depth_bounds_test
 dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint.compare_ops.never_zerodepthbounds_depthdisabled_stencilenabled
 dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint.depth_test_disabled.depth_write_enabled
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.not_equal_not_equal_not_equal_not_equal
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.not_equal_not_equal_not_equal_not_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.not_equal_equal_equal_greater
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.not_equal_equal_equal_greater_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.not_equal_greater_greater_less_or_equal
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.not_equal_greater_greater_less_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.not_equal_greater_or_equal_greater_or_equal_greater_or_equal
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.not_equal_greater_or_equal_greater_or_equal_greater_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.not_equal_less_or_equal_less_or_equal_always
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.not_equal_less_or_equal_less_or_equal_always_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.not_equal_less_less_less
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.not_equal_less_less_less_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.not_equal_never_never_never
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.not_equal_never_never_never_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.equal_not_equal_equal_equal
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.equal_not_equal_equal_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.equal_equal_not_equal_less
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.equal_equal_not_equal_less_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.equal_greater_greater_or_equal_not_equal
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.equal_greater_greater_or_equal_not_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.equal_greater_or_equal_greater_greater
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.equal_greater_or_equal_greater_greater_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.equal_less_or_equal_less_less_or_equal
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.equal_less_or_equal_less_less_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.not_equal_always_always_equal
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.not_equal_always_always_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.equal_less_never_always
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.equal_less_never_always_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.equal_never_less_or_equal_greater_or_equal
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.equal_never_less_or_equal_greater_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.greater_not_equal_greater_less
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.greater_not_equal_greater_less_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.greater_equal_greater_or_equal_always
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.greater_equal_greater_or_equal_always_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.greater_greater_not_equal_greater
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.greater_greater_not_equal_greater_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.greater_greater_or_equal_less_or_equal_not_equal
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.greater_greater_or_equal_less_or_equal_not_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.greater_less_or_equal_never_greater_or_equal
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.greater_less_or_equal_never_greater_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.greater_less_equal_never
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.greater_less_equal_never_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.greater_or_equal_not_equal_greater_or_equal_greater
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.greater_or_equal_not_equal_greater_or_equal_greater_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.greater_never_always_less_or_equal
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.greater_never_always_less_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.greater_or_equal_equal_greater_not_equal
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.greater_or_equal_equal_greater_not_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.greater_or_equal_greater_equal_greater_or_equal
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.greater_or_equal_greater_equal_greater_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.greater_or_equal_greater_or_equal_not_equal_less_or_equal
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.greater_or_equal_greater_or_equal_not_equal_less_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.greater_or_equal_less_or_equal_always_less
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.greater_or_equal_less_or_equal_always_less_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.greater_or_equal_less_less_or_equal_equal
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.greater_or_equal_less_less_or_equal_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.greater_or_equal_always_less_never
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.greater_or_equal_always_less_never_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.less_or_equal_not_equal_less_or_equal_less_or_equal
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.less_or_equal_not_equal_less_or_equal_less_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.less_or_equal_equal_less_equal
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.less_or_equal_equal_less_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.less_or_equal_greater_never_less
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.less_or_equal_greater_never_less_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.less_or_equal_greater_or_equal_equal_always
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.less_or_equal_greater_or_equal_equal_always_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.less_or_equal_less_not_equal_greater_or_equal
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.less_or_equal_less_not_equal_greater_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.less_or_equal_less_or_equal_greater_or_equal_never
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.less_or_equal_less_or_equal_greater_or_equal_never_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.less_not_equal_less_greater_or_equal
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.less_not_equal_less_greater_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.less_equal_never_less_or_equal
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.less_equal_never_less_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.less_greater_less_or_equal_never
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.less_greater_less_or_equal_never_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.less_less_or_equal_greater_equal
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.less_less_or_equal_greater_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.less_less_always_not_equal
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.less_less_always_not_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.less_never_not_equal_always
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.less_never_not_equal_always_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.never_not_equal_always_always
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.never_not_equal_always_always_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.less_always_greater_or_equal_less
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.less_always_greater_or_equal_less_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.never_greater_or_equal_never_equal
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.never_greater_or_equal_never_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.never_never_less_greater
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.never_never_less_greater_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.never_less_or_equal_equal_not_equal
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.never_less_or_equal_equal_not_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.never_less_greater_or_equal_less_or_equal
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.never_less_greater_or_equal_less_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.never_always_greater_greater_or_equal
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.never_always_greater_greater_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.always_equal_always_never
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.always_equal_always_never_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.always_never_equal_less
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.always_never_equal_less_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.always_greater_less_always
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.always_greater_less_always_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.always_always_never_greater
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.always_always_never_greater_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.always_less_or_equal_not_equal_equal
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.always_less_or_equal_not_equal_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.less_or_equal_never_greater_not_equal
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.less_or_equal_never_greater_not_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.never_equal_less_or_equal_less
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.never_equal_less_or_equal_less_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.equal_greater_or_equal_always_never
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.equal_greater_or_equal_always_never_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.greater_always_less_not_equal
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.greater_always_less_not_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.greater_never_greater_or_equal_equal
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.greater_never_greater_or_equal_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.equal_always_equal_less_or_equal
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.equal_always_equal_less_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.less_or_equal_greater_always_greater
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.less_or_equal_greater_always_greater_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.never_not_equal_not_equal_never
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.never_not_equal_not_equal_never_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.always_less_greater_greater
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.always_less_greater_greater_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.always_not_equal_never_not_equal
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.always_not_equal_never_not_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.greater_or_equal_always_not_equal_always
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.greater_or_equal_always_not_equal_always_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.less_or_equal_always_less_or_equal_greater
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.less_or_equal_always_less_or_equal_greater_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.less_greater_or_equal_less_greater
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.less_greater_or_equal_less_greater_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.always_equal_less_or_equal_greater_or_equal
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.always_equal_less_or_equal_greater_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.always_greater_or_equal_greater_or_equal_less_or_equal
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.always_greater_or_equal_greater_or_equal_less_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.greater_or_equal_greater_or_equal_never_less
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.greater_or_equal_greater_or_equal_never_less_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.greater_or_equal_never_greater_never
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.greater_or_equal_never_greater_never_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.less_greater_equal_equal
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.less_greater_equal_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.never_greater_always_greater_or_equal
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.never_greater_always_greater_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.not_equal_not_equal_greater_always
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.not_equal_not_equal_greater_always_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.not_equal_less_or_equal_not_equal_greater
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.not_equal_less_or_equal_not_equal_greater_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.never_zerodepthbounds_depthdisabled_stencilenabled
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.depth_test_disabled.depth_write_enabled
 dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint.compare_ops.not_equal_not_equal_not_equal_not_equal
 dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint.compare_ops.not_equal_not_equal_not_equal_not_equal_depth_bounds_test
 dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint.compare_ops.not_equal_equal_equal_greater
@@ -148168,6 +173872,156 @@ dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint.compare_ops.not_equal_le
 dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint.compare_ops.not_equal_less_or_equal_not_equal_greater_depth_bounds_test
 dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint.compare_ops.never_zerodepthbounds_depthdisabled_stencilenabled
 dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint.depth_test_disabled.depth_write_enabled
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.not_equal_not_equal_not_equal_not_equal
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.not_equal_not_equal_not_equal_not_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.not_equal_equal_equal_greater
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.not_equal_equal_equal_greater_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.not_equal_greater_greater_less_or_equal
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.not_equal_greater_greater_less_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.not_equal_greater_or_equal_greater_or_equal_greater_or_equal
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.not_equal_greater_or_equal_greater_or_equal_greater_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.not_equal_less_or_equal_less_or_equal_always
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.not_equal_less_or_equal_less_or_equal_always_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.not_equal_less_less_less
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.not_equal_less_less_less_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.not_equal_never_never_never
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.not_equal_never_never_never_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.equal_not_equal_equal_equal
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.equal_not_equal_equal_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.equal_equal_not_equal_less
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.equal_equal_not_equal_less_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.equal_greater_greater_or_equal_not_equal
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.equal_greater_greater_or_equal_not_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.equal_greater_or_equal_greater_greater
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.equal_greater_or_equal_greater_greater_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.equal_less_or_equal_less_less_or_equal
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.equal_less_or_equal_less_less_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.not_equal_always_always_equal
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.not_equal_always_always_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.equal_less_never_always
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.equal_less_never_always_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.equal_never_less_or_equal_greater_or_equal
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.equal_never_less_or_equal_greater_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.greater_not_equal_greater_less
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.greater_not_equal_greater_less_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.greater_equal_greater_or_equal_always
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.greater_equal_greater_or_equal_always_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.greater_greater_not_equal_greater
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.greater_greater_not_equal_greater_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.greater_greater_or_equal_less_or_equal_not_equal
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.greater_greater_or_equal_less_or_equal_not_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.greater_less_or_equal_never_greater_or_equal
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.greater_less_or_equal_never_greater_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.greater_less_equal_never
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.greater_less_equal_never_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.greater_or_equal_not_equal_greater_or_equal_greater
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.greater_or_equal_not_equal_greater_or_equal_greater_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.greater_never_always_less_or_equal
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.greater_never_always_less_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.greater_or_equal_equal_greater_not_equal
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.greater_or_equal_equal_greater_not_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.greater_or_equal_greater_equal_greater_or_equal
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.greater_or_equal_greater_equal_greater_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.greater_or_equal_greater_or_equal_not_equal_less_or_equal
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.greater_or_equal_greater_or_equal_not_equal_less_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.greater_or_equal_less_or_equal_always_less
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.greater_or_equal_less_or_equal_always_less_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.greater_or_equal_less_less_or_equal_equal
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.greater_or_equal_less_less_or_equal_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.greater_or_equal_always_less_never
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.greater_or_equal_always_less_never_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.less_or_equal_not_equal_less_or_equal_less_or_equal
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.less_or_equal_not_equal_less_or_equal_less_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.less_or_equal_equal_less_equal
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.less_or_equal_equal_less_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.less_or_equal_greater_never_less
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.less_or_equal_greater_never_less_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.less_or_equal_greater_or_equal_equal_always
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.less_or_equal_greater_or_equal_equal_always_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.less_or_equal_less_not_equal_greater_or_equal
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.less_or_equal_less_not_equal_greater_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.less_or_equal_less_or_equal_greater_or_equal_never
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.less_or_equal_less_or_equal_greater_or_equal_never_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.less_not_equal_less_greater_or_equal
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.less_not_equal_less_greater_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.less_equal_never_less_or_equal
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.less_equal_never_less_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.less_greater_less_or_equal_never
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.less_greater_less_or_equal_never_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.less_less_or_equal_greater_equal
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.less_less_or_equal_greater_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.less_less_always_not_equal
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.less_less_always_not_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.less_never_not_equal_always
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.less_never_not_equal_always_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.never_not_equal_always_always
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.never_not_equal_always_always_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.less_always_greater_or_equal_less
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.less_always_greater_or_equal_less_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.never_greater_or_equal_never_equal
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.never_greater_or_equal_never_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.never_never_less_greater
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.never_never_less_greater_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.never_less_or_equal_equal_not_equal
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.never_less_or_equal_equal_not_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.never_less_greater_or_equal_less_or_equal
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.never_less_greater_or_equal_less_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.never_always_greater_greater_or_equal
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.never_always_greater_greater_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.always_equal_always_never
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.always_equal_always_never_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.always_never_equal_less
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.always_never_equal_less_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.always_greater_less_always
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.always_greater_less_always_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.always_always_never_greater
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.always_always_never_greater_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.always_less_or_equal_not_equal_equal
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.always_less_or_equal_not_equal_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.less_or_equal_never_greater_not_equal
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.less_or_equal_never_greater_not_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.never_equal_less_or_equal_less
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.never_equal_less_or_equal_less_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.equal_greater_or_equal_always_never
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.equal_greater_or_equal_always_never_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.greater_always_less_not_equal
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.greater_always_less_not_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.greater_never_greater_or_equal_equal
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.greater_never_greater_or_equal_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.equal_always_equal_less_or_equal
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.equal_always_equal_less_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.less_or_equal_greater_always_greater
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.less_or_equal_greater_always_greater_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.never_not_equal_not_equal_never
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.never_not_equal_not_equal_never_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.always_less_greater_greater
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.always_less_greater_greater_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.always_not_equal_never_not_equal
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.always_not_equal_never_not_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.greater_or_equal_always_not_equal_always
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.greater_or_equal_always_not_equal_always_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.less_or_equal_always_less_or_equal_greater
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.less_or_equal_always_less_or_equal_greater_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.less_greater_or_equal_less_greater
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.less_greater_or_equal_less_greater_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.always_equal_less_or_equal_greater_or_equal
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.always_equal_less_or_equal_greater_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.always_greater_or_equal_greater_or_equal_less_or_equal
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.always_greater_or_equal_greater_or_equal_less_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.greater_or_equal_greater_or_equal_never_less
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.greater_or_equal_greater_or_equal_never_less_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.greater_or_equal_never_greater_never
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.greater_or_equal_never_greater_never_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.less_greater_equal_equal
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.less_greater_equal_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.never_greater_always_greater_or_equal
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.never_greater_always_greater_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.not_equal_not_equal_greater_always
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.not_equal_not_equal_greater_always_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.not_equal_less_or_equal_not_equal_greater
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.not_equal_less_or_equal_not_equal_greater_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.never_zerodepthbounds_depthdisabled_stencilenabled
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.depth_test_disabled.depth_write_enabled
 dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint.compare_ops.not_equal_not_equal_not_equal_not_equal
 dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint.compare_ops.not_equal_not_equal_not_equal_not_equal_depth_bounds_test
 dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint.compare_ops.not_equal_equal_equal_greater
@@ -148318,6 +174172,156 @@ dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint.compare_ops.not_equal_l
 dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint.compare_ops.not_equal_less_or_equal_not_equal_greater_depth_bounds_test
 dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint.compare_ops.never_zerodepthbounds_depthdisabled_stencilenabled
 dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint.depth_test_disabled.depth_write_enabled
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.not_equal_not_equal_not_equal_not_equal
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.not_equal_not_equal_not_equal_not_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.not_equal_equal_equal_greater
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.not_equal_equal_equal_greater_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.not_equal_greater_greater_less_or_equal
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.not_equal_greater_greater_less_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.not_equal_greater_or_equal_greater_or_equal_greater_or_equal
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.not_equal_greater_or_equal_greater_or_equal_greater_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.not_equal_less_or_equal_less_or_equal_always
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.not_equal_less_or_equal_less_or_equal_always_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.not_equal_less_less_less
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.not_equal_less_less_less_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.not_equal_never_never_never
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.not_equal_never_never_never_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.equal_not_equal_equal_equal
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.equal_not_equal_equal_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.equal_equal_not_equal_less
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.equal_equal_not_equal_less_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.equal_greater_greater_or_equal_not_equal
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.equal_greater_greater_or_equal_not_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.equal_greater_or_equal_greater_greater
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.equal_greater_or_equal_greater_greater_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.equal_less_or_equal_less_less_or_equal
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.equal_less_or_equal_less_less_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.not_equal_always_always_equal
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.not_equal_always_always_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.equal_less_never_always
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.equal_less_never_always_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.equal_never_less_or_equal_greater_or_equal
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.equal_never_less_or_equal_greater_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.greater_not_equal_greater_less
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.greater_not_equal_greater_less_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.greater_equal_greater_or_equal_always
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.greater_equal_greater_or_equal_always_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.greater_greater_not_equal_greater
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.greater_greater_not_equal_greater_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.greater_greater_or_equal_less_or_equal_not_equal
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.greater_greater_or_equal_less_or_equal_not_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.greater_less_or_equal_never_greater_or_equal
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.greater_less_or_equal_never_greater_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.greater_less_equal_never
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.greater_less_equal_never_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.greater_or_equal_not_equal_greater_or_equal_greater
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.greater_or_equal_not_equal_greater_or_equal_greater_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.greater_never_always_less_or_equal
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.greater_never_always_less_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.greater_or_equal_equal_greater_not_equal
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.greater_or_equal_equal_greater_not_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.greater_or_equal_greater_equal_greater_or_equal
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.greater_or_equal_greater_equal_greater_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.greater_or_equal_greater_or_equal_not_equal_less_or_equal
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.greater_or_equal_greater_or_equal_not_equal_less_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.greater_or_equal_less_or_equal_always_less
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.greater_or_equal_less_or_equal_always_less_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.greater_or_equal_less_less_or_equal_equal
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.greater_or_equal_less_less_or_equal_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.greater_or_equal_always_less_never
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.greater_or_equal_always_less_never_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.less_or_equal_not_equal_less_or_equal_less_or_equal
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.less_or_equal_not_equal_less_or_equal_less_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.less_or_equal_equal_less_equal
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.less_or_equal_equal_less_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.less_or_equal_greater_never_less
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.less_or_equal_greater_never_less_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.less_or_equal_greater_or_equal_equal_always
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.less_or_equal_greater_or_equal_equal_always_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.less_or_equal_less_not_equal_greater_or_equal
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.less_or_equal_less_not_equal_greater_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.less_or_equal_less_or_equal_greater_or_equal_never
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.less_or_equal_less_or_equal_greater_or_equal_never_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.less_not_equal_less_greater_or_equal
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.less_not_equal_less_greater_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.less_equal_never_less_or_equal
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.less_equal_never_less_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.less_greater_less_or_equal_never
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.less_greater_less_or_equal_never_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.less_less_or_equal_greater_equal
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.less_less_or_equal_greater_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.less_less_always_not_equal
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.less_less_always_not_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.less_never_not_equal_always
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.less_never_not_equal_always_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.never_not_equal_always_always
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.never_not_equal_always_always_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.less_always_greater_or_equal_less
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.less_always_greater_or_equal_less_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.never_greater_or_equal_never_equal
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.never_greater_or_equal_never_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.never_never_less_greater
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.never_never_less_greater_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.never_less_or_equal_equal_not_equal
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.never_less_or_equal_equal_not_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.never_less_greater_or_equal_less_or_equal
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.never_less_greater_or_equal_less_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.never_always_greater_greater_or_equal
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.never_always_greater_greater_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.always_equal_always_never
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.always_equal_always_never_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.always_never_equal_less
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.always_never_equal_less_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.always_greater_less_always
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.always_greater_less_always_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.always_always_never_greater
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.always_always_never_greater_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.always_less_or_equal_not_equal_equal
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.always_less_or_equal_not_equal_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.less_or_equal_never_greater_not_equal
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.less_or_equal_never_greater_not_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.never_equal_less_or_equal_less
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.never_equal_less_or_equal_less_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.equal_greater_or_equal_always_never
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.equal_greater_or_equal_always_never_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.greater_always_less_not_equal
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.greater_always_less_not_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.greater_never_greater_or_equal_equal
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.greater_never_greater_or_equal_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.equal_always_equal_less_or_equal
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.equal_always_equal_less_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.less_or_equal_greater_always_greater
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.less_or_equal_greater_always_greater_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.never_not_equal_not_equal_never
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.never_not_equal_not_equal_never_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.always_less_greater_greater
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.always_less_greater_greater_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.always_not_equal_never_not_equal
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.always_not_equal_never_not_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.greater_or_equal_always_not_equal_always
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.greater_or_equal_always_not_equal_always_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.less_or_equal_always_less_or_equal_greater
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.less_or_equal_always_less_or_equal_greater_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.less_greater_or_equal_less_greater
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.less_greater_or_equal_less_greater_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.always_equal_less_or_equal_greater_or_equal
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.always_equal_less_or_equal_greater_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.always_greater_or_equal_greater_or_equal_less_or_equal
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.always_greater_or_equal_greater_or_equal_less_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.greater_or_equal_greater_or_equal_never_less
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.greater_or_equal_greater_or_equal_never_less_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.greater_or_equal_never_greater_never
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.greater_or_equal_never_greater_never_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.less_greater_equal_equal
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.less_greater_equal_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.never_greater_always_greater_or_equal
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.never_greater_always_greater_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.not_equal_not_equal_greater_always
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.not_equal_not_equal_greater_always_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.not_equal_less_or_equal_not_equal_greater
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.not_equal_less_or_equal_not_equal_greater_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.never_zerodepthbounds_depthdisabled_stencilenabled
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.depth_test_disabled.depth_write_enabled
 dEQP-VK.pipeline.dynamic_offset.graphics.uniform_buffer.numcmdbuffers_1.sameorder.numdescriptorsetbindings_1.numdynamicbindings_1.numnondynamicbindings_0
 dEQP-VK.pipeline.dynamic_offset.graphics.uniform_buffer.numcmdbuffers_1.sameorder.numdescriptorsetbindings_1.numdynamicbindings_1.numnondynamicbindings_1
 dEQP-VK.pipeline.dynamic_offset.graphics.uniform_buffer.numcmdbuffers_1.sameorder.numdescriptorsetbindings_1.numdynamicbindings_2.numnondynamicbindings_0
@@ -334881,6 +360885,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d16_unorm_s8_
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d16_unorm_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d16_unorm_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d16_unorm_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d24_unorm_s8_uint.depth_none_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d24_unorm_s8_uint.depth_none_stencil_zero_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d24_unorm_s8_uint.depth_none_stencil_min_testing_depth
@@ -334919,6 +360961,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d24_unorm_s8_
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d24_unorm_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d24_unorm_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d24_unorm_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d32_sfloat_s8_uint.depth_none_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d32_sfloat_s8_uint.depth_none_stencil_zero_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d32_sfloat_s8_uint.depth_none_stencil_min_testing_depth
@@ -334957,6 +361037,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d32_sfloat_s8
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d32_sfloat_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d32_sfloat_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d32_sfloat_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d16_unorm.depth_zero_stencil_none_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d16_unorm.depth_zero_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d16_unorm.depth_average_stencil_none_testing_depth
@@ -335022,6 +361140,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d16_unorm_s8_
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d16_unorm_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d16_unorm_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d16_unorm_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d24_unorm_s8_uint.depth_none_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d24_unorm_s8_uint.depth_none_stencil_zero_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d24_unorm_s8_uint.depth_none_stencil_min_testing_depth
@@ -335060,6 +361216,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d24_unorm_s8_
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d24_unorm_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d24_unorm_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d24_unorm_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d32_sfloat_s8_uint.depth_none_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d32_sfloat_s8_uint.depth_none_stencil_zero_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d32_sfloat_s8_uint.depth_none_stencil_min_testing_depth
@@ -335098,6 +361292,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d32_sfloat_s8
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d32_sfloat_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d32_sfloat_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d32_sfloat_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d16_unorm.depth_zero_stencil_none_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d16_unorm.depth_zero_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d16_unorm.depth_average_stencil_none_testing_depth
@@ -335163,6 +361395,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d16_unorm_s8_
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d16_unorm_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d16_unorm_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d16_unorm_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d24_unorm_s8_uint.depth_none_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d24_unorm_s8_uint.depth_none_stencil_zero_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d24_unorm_s8_uint.depth_none_stencil_min_testing_depth
@@ -335201,6 +361471,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d24_unorm_s8_
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d24_unorm_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d24_unorm_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d24_unorm_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d32_sfloat_s8_uint.depth_none_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d32_sfloat_s8_uint.depth_none_stencil_zero_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d32_sfloat_s8_uint.depth_none_stencil_min_testing_depth
@@ -335239,6 +361547,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d32_sfloat_s8
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d32_sfloat_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d32_sfloat_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d32_sfloat_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d16_unorm.depth_zero_stencil_none_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d16_unorm.depth_zero_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d16_unorm.depth_average_stencil_none_testing_depth
@@ -335304,6 +361650,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d16_unorm_s8
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d16_unorm_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d16_unorm_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d16_unorm_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d24_unorm_s8_uint.depth_none_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d24_unorm_s8_uint.depth_none_stencil_zero_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d24_unorm_s8_uint.depth_none_stencil_min_testing_depth
@@ -335342,6 +361726,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d24_unorm_s8
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d24_unorm_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d24_unorm_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d24_unorm_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d32_sfloat_s8_uint.depth_none_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d32_sfloat_s8_uint.depth_none_stencil_zero_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d32_sfloat_s8_uint.depth_none_stencil_min_testing_depth
@@ -335380,6 +361802,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d32_sfloat_s
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d32_sfloat_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d32_sfloat_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d32_sfloat_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d16_unorm.depth_zero_stencil_none_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d16_unorm.depth_zero_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d16_unorm.depth_average_stencil_none_testing_depth
@@ -335445,6 +361905,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d16_unorm_s8
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d16_unorm_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d16_unorm_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d16_unorm_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d24_unorm_s8_uint.depth_none_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d24_unorm_s8_uint.depth_none_stencil_zero_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d24_unorm_s8_uint.depth_none_stencil_min_testing_depth
@@ -335483,6 +361981,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d24_unorm_s8
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d24_unorm_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d24_unorm_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d24_unorm_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d32_sfloat_s8_uint.depth_none_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d32_sfloat_s8_uint.depth_none_stencil_zero_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d32_sfloat_s8_uint.depth_none_stencil_min_testing_depth
@@ -335521,6 +362057,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d32_sfloat_s
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d32_sfloat_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d32_sfloat_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d32_sfloat_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d16_unorm.depth_zero_stencil_none_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d16_unorm.depth_zero_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d16_unorm.depth_average_stencil_none_testing_depth
@@ -335586,6 +362160,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d16_unorm_s8
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d16_unorm_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d16_unorm_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d16_unorm_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d24_unorm_s8_uint.depth_none_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d24_unorm_s8_uint.depth_none_stencil_zero_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d24_unorm_s8_uint.depth_none_stencil_min_testing_depth
@@ -335624,6 +362236,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d24_unorm_s8
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d24_unorm_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d24_unorm_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d24_unorm_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d32_sfloat_s8_uint.depth_none_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d32_sfloat_s8_uint.depth_none_stencil_zero_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d32_sfloat_s8_uint.depth_none_stencil_min_testing_depth
@@ -335662,6 +362312,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d32_sfloat_s
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d32_sfloat_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d32_sfloat_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d32_sfloat_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d16_unorm.depth_zero_stencil_none_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d16_unorm.depth_zero_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d16_unorm.depth_average_stencil_none_testing_depth
@@ -335727,6 +362415,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d16_unorm_s8_u
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d16_unorm_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d16_unorm_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d16_unorm_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d24_unorm_s8_uint.depth_none_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d24_unorm_s8_uint.depth_none_stencil_zero_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d24_unorm_s8_uint.depth_none_stencil_min_testing_depth
@@ -335765,6 +362491,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d24_unorm_s8_u
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d24_unorm_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d24_unorm_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d24_unorm_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d32_sfloat_s8_uint.depth_none_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d32_sfloat_s8_uint.depth_none_stencil_zero_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d32_sfloat_s8_uint.depth_none_stencil_min_testing_depth
@@ -335803,6 +362567,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d32_sfloat_s8_
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d32_sfloat_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d32_sfloat_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d32_sfloat_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d16_unorm.depth_zero_stencil_none_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d16_unorm.depth_zero_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d16_unorm.depth_average_stencil_none_testing_depth
@@ -335868,6 +362670,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d16_unorm_s8_u
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d16_unorm_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d16_unorm_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d16_unorm_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d24_unorm_s8_uint.depth_none_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d24_unorm_s8_uint.depth_none_stencil_zero_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d24_unorm_s8_uint.depth_none_stencil_min_testing_depth
@@ -335906,6 +362746,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d24_unorm_s8_u
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d24_unorm_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d24_unorm_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d24_unorm_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d32_sfloat_s8_uint.depth_none_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d32_sfloat_s8_uint.depth_none_stencil_zero_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d32_sfloat_s8_uint.depth_none_stencil_min_testing_depth
@@ -335944,6 +362822,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d32_sfloat_s8_
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d32_sfloat_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d32_sfloat_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d32_sfloat_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d16_unorm.depth_zero_stencil_none_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d16_unorm.depth_zero_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d16_unorm.depth_average_stencil_none_testing_depth
@@ -336009,6 +362925,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d16_unorm_s8_u
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d16_unorm_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d16_unorm_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d16_unorm_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d24_unorm_s8_uint.depth_none_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d24_unorm_s8_uint.depth_none_stencil_zero_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d24_unorm_s8_uint.depth_none_stencil_min_testing_depth
@@ -336047,6 +363001,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d24_unorm_s8_u
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d24_unorm_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d24_unorm_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d24_unorm_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d32_sfloat_s8_uint.depth_none_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d32_sfloat_s8_uint.depth_none_stencil_zero_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d32_sfloat_s8_uint.depth_none_stencil_min_testing_depth
@@ -336085,6 +363077,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d32_sfloat_s8_
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d32_sfloat_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d32_sfloat_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d32_sfloat_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d16_unorm.depth_zero_stencil_none_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d16_unorm.depth_zero_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d16_unorm.depth_average_stencil_none_testing_depth
@@ -336150,6 +363180,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d16_unorm_s8_
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d16_unorm_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d16_unorm_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d16_unorm_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d24_unorm_s8_uint.depth_none_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d24_unorm_s8_uint.depth_none_stencil_zero_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d24_unorm_s8_uint.depth_none_stencil_min_testing_depth
@@ -336188,6 +363256,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d24_unorm_s8_
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d24_unorm_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d24_unorm_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d24_unorm_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d32_sfloat_s8_uint.depth_none_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d32_sfloat_s8_uint.depth_none_stencil_zero_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d32_sfloat_s8_uint.depth_none_stencil_min_testing_depth
@@ -336226,6 +363332,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d32_sfloat_s8
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d32_sfloat_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d32_sfloat_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d32_sfloat_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d16_unorm.depth_zero_stencil_none_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d16_unorm.depth_zero_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d16_unorm.depth_average_stencil_none_testing_depth
@@ -336291,6 +363435,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d16_unorm_s8_
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d16_unorm_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d16_unorm_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d16_unorm_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d24_unorm_s8_uint.depth_none_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d24_unorm_s8_uint.depth_none_stencil_zero_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d24_unorm_s8_uint.depth_none_stencil_min_testing_depth
@@ -336329,6 +363511,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d24_unorm_s8_
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d24_unorm_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d24_unorm_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d24_unorm_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d32_sfloat_s8_uint.depth_none_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d32_sfloat_s8_uint.depth_none_stencil_zero_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d32_sfloat_s8_uint.depth_none_stencil_min_testing_depth
@@ -336367,6 +363587,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d32_sfloat_s8
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d32_sfloat_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d32_sfloat_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d32_sfloat_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d16_unorm.depth_zero_stencil_none_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d16_unorm.depth_zero_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d16_unorm.depth_average_stencil_none_testing_depth
@@ -336432,6 +363690,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d16_unorm_s8_
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d16_unorm_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d16_unorm_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d16_unorm_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d24_unorm_s8_uint.depth_none_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d24_unorm_s8_uint.depth_none_stencil_zero_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d24_unorm_s8_uint.depth_none_stencil_min_testing_depth
@@ -336470,6 +363766,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d24_unorm_s8_
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d24_unorm_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d24_unorm_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d24_unorm_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d32_sfloat_s8_uint.depth_none_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d32_sfloat_s8_uint.depth_none_stencil_zero_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d32_sfloat_s8_uint.depth_none_stencil_min_testing_depth
@@ -336508,6 +363842,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d32_sfloat_s8
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d32_sfloat_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d32_sfloat_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d32_sfloat_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d16_unorm.depth_zero_stencil_none_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d16_unorm.depth_zero_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d16_unorm.depth_average_stencil_none_testing_depth
@@ -336573,6 +363945,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d16_unorm_s8_
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d16_unorm_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d16_unorm_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d16_unorm_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d24_unorm_s8_uint.depth_none_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d24_unorm_s8_uint.depth_none_stencil_zero_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d24_unorm_s8_uint.depth_none_stencil_min_testing_depth
@@ -336611,6 +364021,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d24_unorm_s8_
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d24_unorm_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d24_unorm_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d24_unorm_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d32_sfloat_s8_uint.depth_none_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d32_sfloat_s8_uint.depth_none_stencil_zero_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d32_sfloat_s8_uint.depth_none_stencil_min_testing_depth
@@ -336649,6 +364097,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d32_sfloat_s8
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d32_sfloat_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d32_sfloat_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d32_sfloat_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d16_unorm.depth_zero_stencil_none_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d16_unorm.depth_zero_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d16_unorm.depth_average_stencil_none_testing_depth
@@ -336714,6 +364200,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d16_unorm_s8_
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d16_unorm_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d16_unorm_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d16_unorm_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d24_unorm_s8_uint.depth_none_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d24_unorm_s8_uint.depth_none_stencil_zero_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d24_unorm_s8_uint.depth_none_stencil_min_testing_depth
@@ -336752,6 +364276,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d24_unorm_s8_
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d24_unorm_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d24_unorm_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d24_unorm_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d32_sfloat_s8_uint.depth_none_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d32_sfloat_s8_uint.depth_none_stencil_zero_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d32_sfloat_s8_uint.depth_none_stencil_min_testing_depth
@@ -336790,6 +364352,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d32_sfloat_s8
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d32_sfloat_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d32_sfloat_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d32_sfloat_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d16_unorm.depth_zero_stencil_none_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d16_unorm.depth_zero_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d16_unorm.depth_average_stencil_none_testing_depth
@@ -336855,6 +364455,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d16_unorm_s8_
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d16_unorm_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d16_unorm_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d16_unorm_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d24_unorm_s8_uint.depth_none_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d24_unorm_s8_uint.depth_none_stencil_zero_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d24_unorm_s8_uint.depth_none_stencil_min_testing_depth
@@ -336893,6 +364531,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d24_unorm_s8_
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d24_unorm_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d24_unorm_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d24_unorm_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d32_sfloat_s8_uint.depth_none_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d32_sfloat_s8_uint.depth_none_stencil_zero_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d32_sfloat_s8_uint.depth_none_stencil_min_testing_depth
@@ -336931,6 +364607,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d32_sfloat_s8
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d32_sfloat_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d32_sfloat_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d32_sfloat_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d16_unorm.depth_zero_stencil_none_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d16_unorm.depth_zero_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d16_unorm.depth_average_stencil_none_testing_depth
@@ -336996,6 +364710,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d16_unorm_s8
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d16_unorm_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d16_unorm_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d16_unorm_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d24_unorm_s8_uint.depth_none_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d24_unorm_s8_uint.depth_none_stencil_zero_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d24_unorm_s8_uint.depth_none_stencil_min_testing_depth
@@ -337034,6 +364786,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d24_unorm_s8
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d24_unorm_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d24_unorm_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d24_unorm_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d32_sfloat_s8_uint.depth_none_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d32_sfloat_s8_uint.depth_none_stencil_zero_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d32_sfloat_s8_uint.depth_none_stencil_min_testing_depth
@@ -337072,6 +364862,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d32_sfloat_s
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d32_sfloat_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d32_sfloat_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d32_sfloat_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d16_unorm.depth_zero_stencil_none_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d16_unorm.depth_zero_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d16_unorm.depth_average_stencil_none_testing_depth
@@ -337137,6 +364965,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d16_unorm_s8
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d16_unorm_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d16_unorm_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d16_unorm_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d24_unorm_s8_uint.depth_none_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d24_unorm_s8_uint.depth_none_stencil_zero_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d24_unorm_s8_uint.depth_none_stencil_min_testing_depth
@@ -337175,6 +365041,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d24_unorm_s8
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d24_unorm_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d24_unorm_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d24_unorm_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d32_sfloat_s8_uint.depth_none_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d32_sfloat_s8_uint.depth_none_stencil_zero_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d32_sfloat_s8_uint.depth_none_stencil_min_testing_depth
@@ -337213,6 +365117,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d32_sfloat_s
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d32_sfloat_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d32_sfloat_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d32_sfloat_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d16_unorm.depth_zero_stencil_none_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d16_unorm.depth_zero_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d16_unorm.depth_average_stencil_none_testing_depth
@@ -337278,6 +365220,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d16_unorm_s8
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d16_unorm_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d16_unorm_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d16_unorm_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d24_unorm_s8_uint.depth_none_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d24_unorm_s8_uint.depth_none_stencil_zero_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d24_unorm_s8_uint.depth_none_stencil_min_testing_depth
@@ -337316,6 +365296,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d24_unorm_s8
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d24_unorm_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d24_unorm_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d24_unorm_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d32_sfloat_s8_uint.depth_none_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d32_sfloat_s8_uint.depth_none_stencil_zero_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d32_sfloat_s8_uint.depth_none_stencil_min_testing_depth
@@ -337354,6 +365372,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d32_sfloat_s
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d32_sfloat_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d32_sfloat_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d32_sfloat_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d16_unorm.depth_zero_stencil_none_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d16_unorm.depth_zero_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d16_unorm.depth_average_stencil_none_testing_depth
@@ -337419,6 +365475,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d16_unorm_s8_ui
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d16_unorm_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d16_unorm_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d16_unorm_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d24_unorm_s8_uint.depth_none_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d24_unorm_s8_uint.depth_none_stencil_zero_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d24_unorm_s8_uint.depth_none_stencil_min_testing_depth
@@ -337457,6 +365551,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d24_unorm_s8_ui
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d24_unorm_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d24_unorm_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d24_unorm_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d32_sfloat_s8_uint.depth_none_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d32_sfloat_s8_uint.depth_none_stencil_zero_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d32_sfloat_s8_uint.depth_none_stencil_min_testing_depth
@@ -337495,6 +365627,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d32_sfloat_s8_u
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d32_sfloat_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d32_sfloat_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d32_sfloat_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d16_unorm.depth_zero_stencil_none_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d16_unorm.depth_zero_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d16_unorm.depth_average_stencil_none_testing_depth
@@ -337560,6 +365730,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d16_unorm_s8_ui
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d16_unorm_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d16_unorm_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d16_unorm_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d24_unorm_s8_uint.depth_none_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d24_unorm_s8_uint.depth_none_stencil_zero_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d24_unorm_s8_uint.depth_none_stencil_min_testing_depth
@@ -337598,6 +365806,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d24_unorm_s8_ui
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d24_unorm_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d24_unorm_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d24_unorm_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d32_sfloat_s8_uint.depth_none_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d32_sfloat_s8_uint.depth_none_stencil_zero_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d32_sfloat_s8_uint.depth_none_stencil_min_testing_depth
@@ -337636,6 +365882,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d32_sfloat_s8_u
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d32_sfloat_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d32_sfloat_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d32_sfloat_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d16_unorm.depth_zero_stencil_none_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d16_unorm.depth_zero_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d16_unorm.depth_average_stencil_none_testing_depth
@@ -337701,6 +365985,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d16_unorm_s8_ui
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d16_unorm_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d16_unorm_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d16_unorm_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d24_unorm_s8_uint.depth_none_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d24_unorm_s8_uint.depth_none_stencil_zero_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d24_unorm_s8_uint.depth_none_stencil_min_testing_depth
@@ -337739,6 +366061,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d24_unorm_s8_ui
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d24_unorm_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d24_unorm_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d24_unorm_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d32_sfloat_s8_uint.depth_none_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d32_sfloat_s8_uint.depth_none_stencil_zero_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d32_sfloat_s8_uint.depth_none_stencil_min_testing_depth
@@ -337777,6 +366137,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d32_sfloat_s8_u
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d32_sfloat_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d32_sfloat_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d32_sfloat_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d16_unorm.depth_zero_stencil_none_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d16_unorm.depth_zero_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d16_unorm.depth_average_stencil_none_testing_depth
@@ -337842,6 +366240,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d16_unorm_s8_u
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d16_unorm_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d16_unorm_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d16_unorm_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d24_unorm_s8_uint.depth_none_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d24_unorm_s8_uint.depth_none_stencil_zero_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d24_unorm_s8_uint.depth_none_stencil_min_testing_depth
@@ -337880,6 +366316,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d24_unorm_s8_u
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d24_unorm_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d24_unorm_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d24_unorm_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d32_sfloat_s8_uint.depth_none_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d32_sfloat_s8_uint.depth_none_stencil_zero_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d32_sfloat_s8_uint.depth_none_stencil_min_testing_depth
@@ -337918,6 +366392,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d32_sfloat_s8_
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d32_sfloat_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d32_sfloat_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d32_sfloat_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d16_unorm.depth_zero_stencil_none_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d16_unorm.depth_zero_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d16_unorm.depth_average_stencil_none_testing_depth
@@ -337983,6 +366495,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d16_unorm_s8_u
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d16_unorm_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d16_unorm_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d16_unorm_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d24_unorm_s8_uint.depth_none_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d24_unorm_s8_uint.depth_none_stencil_zero_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d24_unorm_s8_uint.depth_none_stencil_min_testing_depth
@@ -338021,6 +366571,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d24_unorm_s8_u
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d24_unorm_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d24_unorm_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d24_unorm_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d32_sfloat_s8_uint.depth_none_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d32_sfloat_s8_uint.depth_none_stencil_zero_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d32_sfloat_s8_uint.depth_none_stencil_min_testing_depth
@@ -338059,6 +366647,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d32_sfloat_s8_
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d32_sfloat_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d32_sfloat_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d32_sfloat_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d16_unorm.depth_zero_stencil_none_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d16_unorm.depth_zero_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d16_unorm.depth_average_stencil_none_testing_depth
@@ -338124,6 +366750,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d16_unorm_s8_u
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d16_unorm_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d16_unorm_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d16_unorm_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d24_unorm_s8_uint.depth_none_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d24_unorm_s8_uint.depth_none_stencil_zero_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d24_unorm_s8_uint.depth_none_stencil_min_testing_depth
@@ -338162,6 +366826,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d24_unorm_s8_u
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d24_unorm_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d24_unorm_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d24_unorm_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d32_sfloat_s8_uint.depth_none_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d32_sfloat_s8_uint.depth_none_stencil_zero_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d32_sfloat_s8_uint.depth_none_stencil_min_testing_depth
@@ -338200,6 +366902,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d32_sfloat_s8_
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d32_sfloat_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d32_sfloat_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d32_sfloat_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d16_unorm.depth_zero_stencil_none_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d16_unorm.depth_zero_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d16_unorm.depth_average_stencil_none_testing_depth
@@ -338265,6 +367005,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d16_unorm_s8_u
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d16_unorm_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d16_unorm_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d16_unorm_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d24_unorm_s8_uint.depth_none_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d24_unorm_s8_uint.depth_none_stencil_zero_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d24_unorm_s8_uint.depth_none_stencil_min_testing_depth
@@ -338303,6 +367081,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d24_unorm_s8_u
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d24_unorm_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d24_unorm_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d24_unorm_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d32_sfloat_s8_uint.depth_none_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d32_sfloat_s8_uint.depth_none_stencil_zero_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d32_sfloat_s8_uint.depth_none_stencil_min_testing_depth
@@ -338341,6 +367157,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d32_sfloat_s8_
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d32_sfloat_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d32_sfloat_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d32_sfloat_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d16_unorm.depth_zero_stencil_none_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d16_unorm.depth_zero_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d16_unorm.depth_average_stencil_none_testing_depth
@@ -338406,6 +367260,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d16_unorm_s8_u
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d16_unorm_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d16_unorm_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d16_unorm_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d24_unorm_s8_uint.depth_none_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d24_unorm_s8_uint.depth_none_stencil_zero_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d24_unorm_s8_uint.depth_none_stencil_min_testing_depth
@@ -338444,6 +367336,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d24_unorm_s8_u
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d24_unorm_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d24_unorm_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d24_unorm_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d32_sfloat_s8_uint.depth_none_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d32_sfloat_s8_uint.depth_none_stencil_zero_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d32_sfloat_s8_uint.depth_none_stencil_min_testing_depth
@@ -338482,6 +367412,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d32_sfloat_s8_
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d32_sfloat_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d32_sfloat_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d32_sfloat_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d16_unorm.depth_zero_stencil_none_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d16_unorm.depth_zero_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d16_unorm.depth_average_stencil_none_testing_depth
@@ -338547,6 +367515,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d16_unorm_s8_u
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d16_unorm_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d16_unorm_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d16_unorm_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d24_unorm_s8_uint.depth_none_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d24_unorm_s8_uint.depth_none_stencil_zero_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d24_unorm_s8_uint.depth_none_stencil_min_testing_depth
@@ -338585,6 +367591,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d24_unorm_s8_u
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d24_unorm_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d24_unorm_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d24_unorm_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d32_sfloat_s8_uint.depth_none_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d32_sfloat_s8_uint.depth_none_stencil_zero_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d32_sfloat_s8_uint.depth_none_stencil_min_testing_depth
@@ -338623,6 +367667,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d32_sfloat_s8_
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d32_sfloat_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d32_sfloat_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d32_sfloat_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d16_unorm.depth_zero_stencil_none_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d16_unorm.depth_zero_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d16_unorm.depth_average_stencil_none_testing_depth
@@ -338688,6 +367770,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d16_unorm_s8_
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d16_unorm_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d16_unorm_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d16_unorm_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d24_unorm_s8_uint.depth_none_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d24_unorm_s8_uint.depth_none_stencil_zero_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d24_unorm_s8_uint.depth_none_stencil_min_testing_depth
@@ -338726,6 +367846,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d24_unorm_s8_
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d24_unorm_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d24_unorm_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d24_unorm_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d32_sfloat_s8_uint.depth_none_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d32_sfloat_s8_uint.depth_none_stencil_zero_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d32_sfloat_s8_uint.depth_none_stencil_min_testing_depth
@@ -338764,6 +367922,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d32_sfloat_s8
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d32_sfloat_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d32_sfloat_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d32_sfloat_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d16_unorm.depth_zero_stencil_none_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d16_unorm.depth_zero_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d16_unorm.depth_average_stencil_none_testing_depth
@@ -338829,6 +368025,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d16_unorm_s8_
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d16_unorm_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d16_unorm_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d16_unorm_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d24_unorm_s8_uint.depth_none_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d24_unorm_s8_uint.depth_none_stencil_zero_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d24_unorm_s8_uint.depth_none_stencil_min_testing_depth
@@ -338867,6 +368101,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d24_unorm_s8_
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d24_unorm_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d24_unorm_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d24_unorm_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d32_sfloat_s8_uint.depth_none_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d32_sfloat_s8_uint.depth_none_stencil_zero_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d32_sfloat_s8_uint.depth_none_stencil_min_testing_depth
@@ -338905,6 +368177,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d32_sfloat_s8
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d32_sfloat_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d32_sfloat_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d32_sfloat_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d16_unorm.depth_zero_stencil_none_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d16_unorm.depth_zero_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d16_unorm.depth_average_stencil_none_testing_depth
@@ -338970,6 +368280,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d16_unorm_s8_
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d16_unorm_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d16_unorm_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d16_unorm_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d24_unorm_s8_uint.depth_none_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d24_unorm_s8_uint.depth_none_stencil_zero_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d24_unorm_s8_uint.depth_none_stencil_min_testing_depth
@@ -339008,6 +368356,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d24_unorm_s8_
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d24_unorm_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d24_unorm_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d24_unorm_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d32_sfloat_s8_uint.depth_none_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d32_sfloat_s8_uint.depth_none_stencil_zero_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d32_sfloat_s8_uint.depth_none_stencil_min_testing_depth
@@ -339046,6 +368432,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d32_sfloat_s8
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d32_sfloat_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d32_sfloat_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d32_sfloat_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_2.d16_unorm.depth_none
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_2.d16_unorm.depth_zero
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_2.d16_unorm.depth_average
@@ -339074,6 +368498,15 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_2.d16_unorm_s
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_2.d16_unorm_s8_uint.stencil_min
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_2.d16_unorm_s8_uint.depth_max
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_2.d16_unorm_s8_uint.stencil_max
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_2.d16_unorm_s8_uint_separate_layouts.depth_none
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_2.d16_unorm_s8_uint_separate_layouts.stencil_none
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_2.d16_unorm_s8_uint_separate_layouts.depth_zero
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_2.d16_unorm_s8_uint_separate_layouts.stencil_zero
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_2.d16_unorm_s8_uint_separate_layouts.depth_average
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_2.d16_unorm_s8_uint_separate_layouts.depth_min
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_2.d16_unorm_s8_uint_separate_layouts.stencil_min
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_2.d16_unorm_s8_uint_separate_layouts.depth_max
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_2.d16_unorm_s8_uint_separate_layouts.stencil_max
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_2.d24_unorm_s8_uint.depth_none
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_2.d24_unorm_s8_uint.stencil_none
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_2.d24_unorm_s8_uint.depth_zero
@@ -339083,6 +368516,15 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_2.d24_unorm_s
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_2.d24_unorm_s8_uint.stencil_min
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_2.d24_unorm_s8_uint.depth_max
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_2.d24_unorm_s8_uint.stencil_max
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_2.d24_unorm_s8_uint_separate_layouts.depth_none
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_2.d24_unorm_s8_uint_separate_layouts.stencil_none
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_2.d24_unorm_s8_uint_separate_layouts.depth_zero
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_2.d24_unorm_s8_uint_separate_layouts.stencil_zero
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_2.d24_unorm_s8_uint_separate_layouts.depth_average
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_2.d24_unorm_s8_uint_separate_layouts.depth_min
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_2.d24_unorm_s8_uint_separate_layouts.stencil_min
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_2.d24_unorm_s8_uint_separate_layouts.depth_max
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_2.d24_unorm_s8_uint_separate_layouts.stencil_max
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_2.d32_sfloat_s8_uint.depth_none
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_2.d32_sfloat_s8_uint.stencil_none
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_2.d32_sfloat_s8_uint.depth_zero
@@ -339092,6 +368534,15 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_2.d32_sfloat_
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_2.d32_sfloat_s8_uint.stencil_min
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_2.d32_sfloat_s8_uint.depth_max
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_2.d32_sfloat_s8_uint.stencil_max
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_none
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_2.d32_sfloat_s8_uint_separate_layouts.stencil_none
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_zero
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_2.d32_sfloat_s8_uint_separate_layouts.stencil_zero
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_average
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_min
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_2.d32_sfloat_s8_uint_separate_layouts.stencil_min
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_max
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_2.d32_sfloat_s8_uint_separate_layouts.stencil_max
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_4.d16_unorm.depth_none
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_4.d16_unorm.depth_zero
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_4.d16_unorm.depth_average
@@ -339120,6 +368571,15 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_4.d16_unorm_s
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_4.d16_unorm_s8_uint.stencil_min
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_4.d16_unorm_s8_uint.depth_max
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_4.d16_unorm_s8_uint.stencil_max
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_4.d16_unorm_s8_uint_separate_layouts.depth_none
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_4.d16_unorm_s8_uint_separate_layouts.stencil_none
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_4.d16_unorm_s8_uint_separate_layouts.depth_zero
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_4.d16_unorm_s8_uint_separate_layouts.stencil_zero
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_4.d16_unorm_s8_uint_separate_layouts.depth_average
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_4.d16_unorm_s8_uint_separate_layouts.depth_min
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_4.d16_unorm_s8_uint_separate_layouts.stencil_min
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_4.d16_unorm_s8_uint_separate_layouts.depth_max
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_4.d16_unorm_s8_uint_separate_layouts.stencil_max
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_4.d24_unorm_s8_uint.depth_none
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_4.d24_unorm_s8_uint.stencil_none
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_4.d24_unorm_s8_uint.depth_zero
@@ -339129,6 +368589,15 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_4.d24_unorm_s
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_4.d24_unorm_s8_uint.stencil_min
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_4.d24_unorm_s8_uint.depth_max
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_4.d24_unorm_s8_uint.stencil_max
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_4.d24_unorm_s8_uint_separate_layouts.depth_none
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_4.d24_unorm_s8_uint_separate_layouts.stencil_none
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_4.d24_unorm_s8_uint_separate_layouts.depth_zero
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_4.d24_unorm_s8_uint_separate_layouts.stencil_zero
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_4.d24_unorm_s8_uint_separate_layouts.depth_average
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_4.d24_unorm_s8_uint_separate_layouts.depth_min
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_4.d24_unorm_s8_uint_separate_layouts.stencil_min
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_4.d24_unorm_s8_uint_separate_layouts.depth_max
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_4.d24_unorm_s8_uint_separate_layouts.stencil_max
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_4.d32_sfloat_s8_uint.depth_none
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_4.d32_sfloat_s8_uint.stencil_none
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_4.d32_sfloat_s8_uint.depth_zero
@@ -339138,6 +368607,15 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_4.d32_sfloat_
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_4.d32_sfloat_s8_uint.stencil_min
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_4.d32_sfloat_s8_uint.depth_max
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_4.d32_sfloat_s8_uint.stencil_max
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_none
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_4.d32_sfloat_s8_uint_separate_layouts.stencil_none
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_zero
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_4.d32_sfloat_s8_uint_separate_layouts.stencil_zero
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_average
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_min
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_4.d32_sfloat_s8_uint_separate_layouts.stencil_min
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_max
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_4.d32_sfloat_s8_uint_separate_layouts.stencil_max
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_8.d16_unorm.depth_none
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_8.d16_unorm.depth_zero
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_8.d16_unorm.depth_average
@@ -339166,6 +368644,15 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_8.d16_unorm_s
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_8.d16_unorm_s8_uint.stencil_min
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_8.d16_unorm_s8_uint.depth_max
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_8.d16_unorm_s8_uint.stencil_max
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_8.d16_unorm_s8_uint_separate_layouts.depth_none
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_8.d16_unorm_s8_uint_separate_layouts.stencil_none
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_8.d16_unorm_s8_uint_separate_layouts.depth_zero
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_8.d16_unorm_s8_uint_separate_layouts.stencil_zero
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_8.d16_unorm_s8_uint_separate_layouts.depth_average
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_8.d16_unorm_s8_uint_separate_layouts.depth_min
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_8.d16_unorm_s8_uint_separate_layouts.stencil_min
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_8.d16_unorm_s8_uint_separate_layouts.depth_max
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_8.d16_unorm_s8_uint_separate_layouts.stencil_max
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_8.d24_unorm_s8_uint.depth_none
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_8.d24_unorm_s8_uint.stencil_none
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_8.d24_unorm_s8_uint.depth_zero
@@ -339175,6 +368662,15 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_8.d24_unorm_s
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_8.d24_unorm_s8_uint.stencil_min
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_8.d24_unorm_s8_uint.depth_max
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_8.d24_unorm_s8_uint.stencil_max
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_8.d24_unorm_s8_uint_separate_layouts.depth_none
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_8.d24_unorm_s8_uint_separate_layouts.stencil_none
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_8.d24_unorm_s8_uint_separate_layouts.depth_zero
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_8.d24_unorm_s8_uint_separate_layouts.stencil_zero
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_8.d24_unorm_s8_uint_separate_layouts.depth_average
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_8.d24_unorm_s8_uint_separate_layouts.depth_min
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_8.d24_unorm_s8_uint_separate_layouts.stencil_min
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_8.d24_unorm_s8_uint_separate_layouts.depth_max
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_8.d24_unorm_s8_uint_separate_layouts.stencil_max
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_8.d32_sfloat_s8_uint.depth_none
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_8.d32_sfloat_s8_uint.stencil_none
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_8.d32_sfloat_s8_uint.depth_zero
@@ -339184,6 +368680,15 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_8.d32_sfloat_
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_8.d32_sfloat_s8_uint.stencil_min
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_8.d32_sfloat_s8_uint.depth_max
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_8.d32_sfloat_s8_uint.stencil_max
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_none
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_8.d32_sfloat_s8_uint_separate_layouts.stencil_none
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_zero
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_8.d32_sfloat_s8_uint_separate_layouts.stencil_zero
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_average
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_min
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_8.d32_sfloat_s8_uint_separate_layouts.stencil_min
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_max
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_8.d32_sfloat_s8_uint_separate_layouts.stencil_max
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_16.d16_unorm.depth_none
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_16.d16_unorm.depth_zero
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_16.d16_unorm.depth_average
@@ -339212,6 +368717,15 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_16.d16_unorm_
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_16.d16_unorm_s8_uint.stencil_min
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_16.d16_unorm_s8_uint.depth_max
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_16.d16_unorm_s8_uint.stencil_max
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_16.d16_unorm_s8_uint_separate_layouts.depth_none
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_16.d16_unorm_s8_uint_separate_layouts.stencil_none
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_16.d16_unorm_s8_uint_separate_layouts.depth_zero
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_16.d16_unorm_s8_uint_separate_layouts.stencil_zero
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_16.d16_unorm_s8_uint_separate_layouts.depth_average
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_16.d16_unorm_s8_uint_separate_layouts.depth_min
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_16.d16_unorm_s8_uint_separate_layouts.stencil_min
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_16.d16_unorm_s8_uint_separate_layouts.depth_max
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_16.d16_unorm_s8_uint_separate_layouts.stencil_max
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_16.d24_unorm_s8_uint.depth_none
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_16.d24_unorm_s8_uint.stencil_none
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_16.d24_unorm_s8_uint.depth_zero
@@ -339221,6 +368735,15 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_16.d24_unorm_
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_16.d24_unorm_s8_uint.stencil_min
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_16.d24_unorm_s8_uint.depth_max
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_16.d24_unorm_s8_uint.stencil_max
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_16.d24_unorm_s8_uint_separate_layouts.depth_none
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_16.d24_unorm_s8_uint_separate_layouts.stencil_none
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_16.d24_unorm_s8_uint_separate_layouts.depth_zero
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_16.d24_unorm_s8_uint_separate_layouts.stencil_zero
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_16.d24_unorm_s8_uint_separate_layouts.depth_average
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_16.d24_unorm_s8_uint_separate_layouts.depth_min
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_16.d24_unorm_s8_uint_separate_layouts.stencil_min
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_16.d24_unorm_s8_uint_separate_layouts.depth_max
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_16.d24_unorm_s8_uint_separate_layouts.stencil_max
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_16.d32_sfloat_s8_uint.depth_none
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_16.d32_sfloat_s8_uint.stencil_none
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_16.d32_sfloat_s8_uint.depth_zero
@@ -339230,6 +368753,15 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_16.d32_sfloat
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_16.d32_sfloat_s8_uint.stencil_min
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_16.d32_sfloat_s8_uint.depth_max
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_16.d32_sfloat_s8_uint.stencil_max
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_none
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_16.d32_sfloat_s8_uint_separate_layouts.stencil_none
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_zero
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_16.d32_sfloat_s8_uint_separate_layouts.stencil_zero
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_average
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_min
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_16.d32_sfloat_s8_uint_separate_layouts.stencil_min
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_max
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_16.d32_sfloat_s8_uint_separate_layouts.stencil_max
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_32.d16_unorm.depth_none
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_32.d16_unorm.depth_zero
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_32.d16_unorm.depth_average
@@ -339258,6 +368790,15 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_32.d16_unorm_
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_32.d16_unorm_s8_uint.stencil_min
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_32.d16_unorm_s8_uint.depth_max
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_32.d16_unorm_s8_uint.stencil_max
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_32.d16_unorm_s8_uint_separate_layouts.depth_none
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_32.d16_unorm_s8_uint_separate_layouts.stencil_none
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_32.d16_unorm_s8_uint_separate_layouts.depth_zero
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_32.d16_unorm_s8_uint_separate_layouts.stencil_zero
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_32.d16_unorm_s8_uint_separate_layouts.depth_average
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_32.d16_unorm_s8_uint_separate_layouts.depth_min
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_32.d16_unorm_s8_uint_separate_layouts.stencil_min
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_32.d16_unorm_s8_uint_separate_layouts.depth_max
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_32.d16_unorm_s8_uint_separate_layouts.stencil_max
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_32.d24_unorm_s8_uint.depth_none
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_32.d24_unorm_s8_uint.stencil_none
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_32.d24_unorm_s8_uint.depth_zero
@@ -339267,6 +368808,15 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_32.d24_unorm_
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_32.d24_unorm_s8_uint.stencil_min
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_32.d24_unorm_s8_uint.depth_max
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_32.d24_unorm_s8_uint.stencil_max
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_32.d24_unorm_s8_uint_separate_layouts.depth_none
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_32.d24_unorm_s8_uint_separate_layouts.stencil_none
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_32.d24_unorm_s8_uint_separate_layouts.depth_zero
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_32.d24_unorm_s8_uint_separate_layouts.stencil_zero
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_32.d24_unorm_s8_uint_separate_layouts.depth_average
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_32.d24_unorm_s8_uint_separate_layouts.depth_min
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_32.d24_unorm_s8_uint_separate_layouts.stencil_min
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_32.d24_unorm_s8_uint_separate_layouts.depth_max
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_32.d24_unorm_s8_uint_separate_layouts.stencil_max
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_32.d32_sfloat_s8_uint.depth_none
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_32.d32_sfloat_s8_uint.stencil_none
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_32.d32_sfloat_s8_uint.depth_zero
@@ -339276,6 +368826,15 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_32.d32_sfloat
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_32.d32_sfloat_s8_uint.stencil_min
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_32.d32_sfloat_s8_uint.depth_max
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_32.d32_sfloat_s8_uint.stencil_max
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_none
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_32.d32_sfloat_s8_uint_separate_layouts.stencil_none
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_zero
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_32.d32_sfloat_s8_uint_separate_layouts.stencil_zero
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_average
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_min
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_32.d32_sfloat_s8_uint_separate_layouts.stencil_min
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_max
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_32.d32_sfloat_s8_uint_separate_layouts.stencil_max
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_64.d16_unorm.depth_none
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_64.d16_unorm.depth_zero
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_64.d16_unorm.depth_average
@@ -339304,6 +368863,15 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_64.d16_unorm_
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_64.d16_unorm_s8_uint.stencil_min
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_64.d16_unorm_s8_uint.depth_max
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_64.d16_unorm_s8_uint.stencil_max
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_64.d16_unorm_s8_uint_separate_layouts.depth_none
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_64.d16_unorm_s8_uint_separate_layouts.stencil_none
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_64.d16_unorm_s8_uint_separate_layouts.depth_zero
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_64.d16_unorm_s8_uint_separate_layouts.stencil_zero
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_64.d16_unorm_s8_uint_separate_layouts.depth_average
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_64.d16_unorm_s8_uint_separate_layouts.depth_min
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_64.d16_unorm_s8_uint_separate_layouts.stencil_min
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_64.d16_unorm_s8_uint_separate_layouts.depth_max
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_64.d16_unorm_s8_uint_separate_layouts.stencil_max
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_64.d24_unorm_s8_uint.depth_none
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_64.d24_unorm_s8_uint.stencil_none
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_64.d24_unorm_s8_uint.depth_zero
@@ -339313,6 +368881,15 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_64.d24_unorm_
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_64.d24_unorm_s8_uint.stencil_min
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_64.d24_unorm_s8_uint.depth_max
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_64.d24_unorm_s8_uint.stencil_max
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_64.d24_unorm_s8_uint_separate_layouts.depth_none
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_64.d24_unorm_s8_uint_separate_layouts.stencil_none
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_64.d24_unorm_s8_uint_separate_layouts.depth_zero
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_64.d24_unorm_s8_uint_separate_layouts.stencil_zero
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_64.d24_unorm_s8_uint_separate_layouts.depth_average
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_64.d24_unorm_s8_uint_separate_layouts.depth_min
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_64.d24_unorm_s8_uint_separate_layouts.stencil_min
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_64.d24_unorm_s8_uint_separate_layouts.depth_max
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_64.d24_unorm_s8_uint_separate_layouts.stencil_max
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_64.d32_sfloat_s8_uint.depth_none
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_64.d32_sfloat_s8_uint.stencil_none
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_64.d32_sfloat_s8_uint.depth_zero
@@ -339322,6 +368899,15 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_64.d32_sfloat
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_64.d32_sfloat_s8_uint.stencil_min
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_64.d32_sfloat_s8_uint.depth_max
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_64.d32_sfloat_s8_uint.stencil_max
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_none
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_64.d32_sfloat_s8_uint_separate_layouts.stencil_none
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_zero
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_64.d32_sfloat_s8_uint_separate_layouts.stencil_zero
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_average
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_min
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_64.d32_sfloat_s8_uint_separate_layouts.stencil_min
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_max
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_64.d32_sfloat_s8_uint_separate_layouts.stencil_max
 dEQP-VK.ubo.2_level_array.std140.float.vertex
 dEQP-VK.ubo.2_level_array.std140.float.fragment
 dEQP-VK.ubo.2_level_array.std140.float.both

diff --git a/external/vulkancts/mustpass/master/vk-default.txt b/external/vulkancts/mustpass/master/vk-default.txt
index b7d2c08..251566c 100644 (file)
--- a/external/vulkancts/mustpass/master/vk-default.txt
+++ b/external/vulkancts/mustpass/master/vk-default.txt
@@ -22679,14 +22679,26 @@ dEQP-VK.api.copy_and_blit.core.image_to_image.all_formats.depth_stencil.3d_d16_u
 dEQP-VK.api.copy_and_blit.core.image_to_image.all_formats.depth_stencil.3d_d16_unorm_s8_uint_d16_unorm_s8_uint.optimal_general
 dEQP-VK.api.copy_and_blit.core.image_to_image.all_formats.depth_stencil.3d_d16_unorm_s8_uint_d16_unorm_s8_uint.general_optimal
 dEQP-VK.api.copy_and_blit.core.image_to_image.all_formats.depth_stencil.3d_d16_unorm_s8_uint_d16_unorm_s8_uint.general_general
+dEQP-VK.api.copy_and_blit.core.image_to_image.all_formats.depth_stencil.d16_unorm_s8_uint_d16_unorm_s8_uint_separate_layouts.optimal_optimal
+dEQP-VK.api.copy_and_blit.core.image_to_image.all_formats.depth_stencil.d16_unorm_s8_uint_d16_unorm_s8_uint_separate_layouts.optimal_general
+dEQP-VK.api.copy_and_blit.core.image_to_image.all_formats.depth_stencil.d16_unorm_s8_uint_d16_unorm_s8_uint_separate_layouts.general_optimal
+dEQP-VK.api.copy_and_blit.core.image_to_image.all_formats.depth_stencil.d16_unorm_s8_uint_d16_unorm_s8_uint_separate_layouts.general_general
 dEQP-VK.api.copy_and_blit.core.image_to_image.all_formats.depth_stencil.3d_d24_unorm_s8_uint_d24_unorm_s8_uint.optimal_optimal
 dEQP-VK.api.copy_and_blit.core.image_to_image.all_formats.depth_stencil.3d_d24_unorm_s8_uint_d24_unorm_s8_uint.optimal_general
 dEQP-VK.api.copy_and_blit.core.image_to_image.all_formats.depth_stencil.3d_d24_unorm_s8_uint_d24_unorm_s8_uint.general_optimal
 dEQP-VK.api.copy_and_blit.core.image_to_image.all_formats.depth_stencil.3d_d24_unorm_s8_uint_d24_unorm_s8_uint.general_general
+dEQP-VK.api.copy_and_blit.core.image_to_image.all_formats.depth_stencil.d24_unorm_s8_uint_d24_unorm_s8_uint_separate_layouts.optimal_optimal
+dEQP-VK.api.copy_and_blit.core.image_to_image.all_formats.depth_stencil.d24_unorm_s8_uint_d24_unorm_s8_uint_separate_layouts.optimal_general
+dEQP-VK.api.copy_and_blit.core.image_to_image.all_formats.depth_stencil.d24_unorm_s8_uint_d24_unorm_s8_uint_separate_layouts.general_optimal
+dEQP-VK.api.copy_and_blit.core.image_to_image.all_formats.depth_stencil.d24_unorm_s8_uint_d24_unorm_s8_uint_separate_layouts.general_general
 dEQP-VK.api.copy_and_blit.core.image_to_image.all_formats.depth_stencil.3d_d32_sfloat_s8_uint_d32_sfloat_s8_uint.optimal_optimal
 dEQP-VK.api.copy_and_blit.core.image_to_image.all_formats.depth_stencil.3d_d32_sfloat_s8_uint_d32_sfloat_s8_uint.optimal_general
 dEQP-VK.api.copy_and_blit.core.image_to_image.all_formats.depth_stencil.3d_d32_sfloat_s8_uint_d32_sfloat_s8_uint.general_optimal
 dEQP-VK.api.copy_and_blit.core.image_to_image.all_formats.depth_stencil.3d_d32_sfloat_s8_uint_d32_sfloat_s8_uint.general_general
+dEQP-VK.api.copy_and_blit.core.image_to_image.all_formats.depth_stencil.d32_sfloat_s8_uint_d32_sfloat_s8_uint_separate_layouts.optimal_optimal
+dEQP-VK.api.copy_and_blit.core.image_to_image.all_formats.depth_stencil.d32_sfloat_s8_uint_d32_sfloat_s8_uint_separate_layouts.optimal_general
+dEQP-VK.api.copy_and_blit.core.image_to_image.all_formats.depth_stencil.d32_sfloat_s8_uint_d32_sfloat_s8_uint_separate_layouts.general_optimal
+dEQP-VK.api.copy_and_blit.core.image_to_image.all_formats.depth_stencil.d32_sfloat_s8_uint_d32_sfloat_s8_uint_separate_layouts.general_general
 dEQP-VK.api.copy_and_blit.core.image_to_image.3d_images.3d_to_2d_by_slices
 dEQP-VK.api.copy_and_blit.core.image_to_image.3d_images.2d_to_3d_by_layers
 dEQP-VK.api.copy_and_blit.core.image_to_image.3d_images.3d_to_2d_whole
@@ -72464,14 +72476,26 @@ dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.depth_stencil.3d_d16_unorm
 dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.depth_stencil.3d_d16_unorm_s8_uint_d16_unorm_s8_uint.optimal_general_nearest
 dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.depth_stencil.3d_d16_unorm_s8_uint_d16_unorm_s8_uint.general_optimal_nearest
 dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.depth_stencil.3d_d16_unorm_s8_uint_d16_unorm_s8_uint.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.depth_stencil.d16_unorm_s8_uint_d16_unorm_s8_uint_separate_layouts.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.depth_stencil.d16_unorm_s8_uint_d16_unorm_s8_uint_separate_layouts.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.depth_stencil.d16_unorm_s8_uint_d16_unorm_s8_uint_separate_layouts.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.depth_stencil.d16_unorm_s8_uint_d16_unorm_s8_uint_separate_layouts.general_general_nearest
 dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.depth_stencil.3d_d24_unorm_s8_uint_d24_unorm_s8_uint.optimal_optimal_nearest
 dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.depth_stencil.3d_d24_unorm_s8_uint_d24_unorm_s8_uint.optimal_general_nearest
 dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.depth_stencil.3d_d24_unorm_s8_uint_d24_unorm_s8_uint.general_optimal_nearest
 dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.depth_stencil.3d_d24_unorm_s8_uint_d24_unorm_s8_uint.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.depth_stencil.d24_unorm_s8_uint_d24_unorm_s8_uint_separate_layouts.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.depth_stencil.d24_unorm_s8_uint_d24_unorm_s8_uint_separate_layouts.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.depth_stencil.d24_unorm_s8_uint_d24_unorm_s8_uint_separate_layouts.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.depth_stencil.d24_unorm_s8_uint_d24_unorm_s8_uint_separate_layouts.general_general_nearest
 dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.depth_stencil.3d_d32_sfloat_s8_uint_d32_sfloat_s8_uint.optimal_optimal_nearest
 dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.depth_stencil.3d_d32_sfloat_s8_uint_d32_sfloat_s8_uint.optimal_general_nearest
 dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.depth_stencil.3d_d32_sfloat_s8_uint_d32_sfloat_s8_uint.general_optimal_nearest
 dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.depth_stencil.3d_d32_sfloat_s8_uint_d32_sfloat_s8_uint.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.depth_stencil.d32_sfloat_s8_uint_d32_sfloat_s8_uint_separate_layouts.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.depth_stencil.d32_sfloat_s8_uint_d32_sfloat_s8_uint_separate_layouts.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.depth_stencil.d32_sfloat_s8_uint_d32_sfloat_s8_uint_separate_layouts.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.depth_stencil.d32_sfloat_s8_uint_d32_sfloat_s8_uint_separate_layouts.general_general_nearest
 dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8_uint.optimal_optimal_nearest
 dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8_uint.optimal_general_nearest
 dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8_uint.general_optimal_nearest
@@ -77121,14 +77145,26 @@ dEQP-VK.api.copy_and_blit.dedicated_allocation.image_to_image.all_formats.depth_
 dEQP-VK.api.copy_and_blit.dedicated_allocation.image_to_image.all_formats.depth_stencil.3d_d16_unorm_s8_uint_d16_unorm_s8_uint.optimal_general
 dEQP-VK.api.copy_and_blit.dedicated_allocation.image_to_image.all_formats.depth_stencil.3d_d16_unorm_s8_uint_d16_unorm_s8_uint.general_optimal
 dEQP-VK.api.copy_and_blit.dedicated_allocation.image_to_image.all_formats.depth_stencil.3d_d16_unorm_s8_uint_d16_unorm_s8_uint.general_general
+dEQP-VK.api.copy_and_blit.dedicated_allocation.image_to_image.all_formats.depth_stencil.d16_unorm_s8_uint_d16_unorm_s8_uint_separate_layouts.optimal_optimal
+dEQP-VK.api.copy_and_blit.dedicated_allocation.image_to_image.all_formats.depth_stencil.d16_unorm_s8_uint_d16_unorm_s8_uint_separate_layouts.optimal_general
+dEQP-VK.api.copy_and_blit.dedicated_allocation.image_to_image.all_formats.depth_stencil.d16_unorm_s8_uint_d16_unorm_s8_uint_separate_layouts.general_optimal
+dEQP-VK.api.copy_and_blit.dedicated_allocation.image_to_image.all_formats.depth_stencil.d16_unorm_s8_uint_d16_unorm_s8_uint_separate_layouts.general_general
 dEQP-VK.api.copy_and_blit.dedicated_allocation.image_to_image.all_formats.depth_stencil.3d_d24_unorm_s8_uint_d24_unorm_s8_uint.optimal_optimal
 dEQP-VK.api.copy_and_blit.dedicated_allocation.image_to_image.all_formats.depth_stencil.3d_d24_unorm_s8_uint_d24_unorm_s8_uint.optimal_general
 dEQP-VK.api.copy_and_blit.dedicated_allocation.image_to_image.all_formats.depth_stencil.3d_d24_unorm_s8_uint_d24_unorm_s8_uint.general_optimal
 dEQP-VK.api.copy_and_blit.dedicated_allocation.image_to_image.all_formats.depth_stencil.3d_d24_unorm_s8_uint_d24_unorm_s8_uint.general_general
+dEQP-VK.api.copy_and_blit.dedicated_allocation.image_to_image.all_formats.depth_stencil.d24_unorm_s8_uint_d24_unorm_s8_uint_separate_layouts.optimal_optimal
+dEQP-VK.api.copy_and_blit.dedicated_allocation.image_to_image.all_formats.depth_stencil.d24_unorm_s8_uint_d24_unorm_s8_uint_separate_layouts.optimal_general
+dEQP-VK.api.copy_and_blit.dedicated_allocation.image_to_image.all_formats.depth_stencil.d24_unorm_s8_uint_d24_unorm_s8_uint_separate_layouts.general_optimal
+dEQP-VK.api.copy_and_blit.dedicated_allocation.image_to_image.all_formats.depth_stencil.d24_unorm_s8_uint_d24_unorm_s8_uint_separate_layouts.general_general
 dEQP-VK.api.copy_and_blit.dedicated_allocation.image_to_image.all_formats.depth_stencil.3d_d32_sfloat_s8_uint_d32_sfloat_s8_uint.optimal_optimal
 dEQP-VK.api.copy_and_blit.dedicated_allocation.image_to_image.all_formats.depth_stencil.3d_d32_sfloat_s8_uint_d32_sfloat_s8_uint.optimal_general
 dEQP-VK.api.copy_and_blit.dedicated_allocation.image_to_image.all_formats.depth_stencil.3d_d32_sfloat_s8_uint_d32_sfloat_s8_uint.general_optimal
 dEQP-VK.api.copy_and_blit.dedicated_allocation.image_to_image.all_formats.depth_stencil.3d_d32_sfloat_s8_uint_d32_sfloat_s8_uint.general_general
+dEQP-VK.api.copy_and_blit.dedicated_allocation.image_to_image.all_formats.depth_stencil.d32_sfloat_s8_uint_d32_sfloat_s8_uint_separate_layouts.optimal_optimal
+dEQP-VK.api.copy_and_blit.dedicated_allocation.image_to_image.all_formats.depth_stencil.d32_sfloat_s8_uint_d32_sfloat_s8_uint_separate_layouts.optimal_general
+dEQP-VK.api.copy_and_blit.dedicated_allocation.image_to_image.all_formats.depth_stencil.d32_sfloat_s8_uint_d32_sfloat_s8_uint_separate_layouts.general_optimal
+dEQP-VK.api.copy_and_blit.dedicated_allocation.image_to_image.all_formats.depth_stencil.d32_sfloat_s8_uint_d32_sfloat_s8_uint_separate_layouts.general_general
 dEQP-VK.api.copy_and_blit.dedicated_allocation.image_to_image.3d_images.3d_to_2d_by_slices
 dEQP-VK.api.copy_and_blit.dedicated_allocation.image_to_image.3d_images.2d_to_3d_by_layers
 dEQP-VK.api.copy_and_blit.dedicated_allocation.image_to_image.3d_images.3d_to_2d_whole
@@ -82050,14 +82086,26 @@ dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.depth_sten
 dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.depth_stencil.3d_d16_unorm_s8_uint_d16_unorm_s8_uint.optimal_general_nearest
 dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.depth_stencil.3d_d16_unorm_s8_uint_d16_unorm_s8_uint.general_optimal_nearest
 dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.depth_stencil.3d_d16_unorm_s8_uint_d16_unorm_s8_uint.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.depth_stencil.d16_unorm_s8_uint_d16_unorm_s8_uint_separate_layouts.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.depth_stencil.d16_unorm_s8_uint_d16_unorm_s8_uint_separate_layouts.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.depth_stencil.d16_unorm_s8_uint_d16_unorm_s8_uint_separate_layouts.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.depth_stencil.d16_unorm_s8_uint_d16_unorm_s8_uint_separate_layouts.general_general_nearest
 dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.depth_stencil.3d_d24_unorm_s8_uint_d24_unorm_s8_uint.optimal_optimal_nearest
 dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.depth_stencil.3d_d24_unorm_s8_uint_d24_unorm_s8_uint.optimal_general_nearest
 dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.depth_stencil.3d_d24_unorm_s8_uint_d24_unorm_s8_uint.general_optimal_nearest
 dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.depth_stencil.3d_d24_unorm_s8_uint_d24_unorm_s8_uint.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.depth_stencil.d24_unorm_s8_uint_d24_unorm_s8_uint_separate_layouts.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.depth_stencil.d24_unorm_s8_uint_d24_unorm_s8_uint_separate_layouts.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.depth_stencil.d24_unorm_s8_uint_d24_unorm_s8_uint_separate_layouts.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.depth_stencil.d24_unorm_s8_uint_d24_unorm_s8_uint_separate_layouts.general_general_nearest
 dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.depth_stencil.3d_d32_sfloat_s8_uint_d32_sfloat_s8_uint.optimal_optimal_nearest
 dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.depth_stencil.3d_d32_sfloat_s8_uint_d32_sfloat_s8_uint.optimal_general_nearest
 dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.depth_stencil.3d_d32_sfloat_s8_uint_d32_sfloat_s8_uint.general_optimal_nearest
 dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.depth_stencil.3d_d32_sfloat_s8_uint_d32_sfloat_s8_uint.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.depth_stencil.d32_sfloat_s8_uint_d32_sfloat_s8_uint_separate_layouts.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.depth_stencil.d32_sfloat_s8_uint_d32_sfloat_s8_uint_separate_layouts.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.depth_stencil.d32_sfloat_s8_uint_d32_sfloat_s8_uint_separate_layouts.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.depth_stencil.d32_sfloat_s8_uint_d32_sfloat_s8_uint_separate_layouts.general_general_nearest
 dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8_uint.optimal_optimal_nearest
 dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8_uint.optimal_general_nearest
 dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8_uint.general_optimal_nearest
@@ -93215,141 +93263,261 @@ dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.single_layer.x8_d24_un
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.single_layer.d32_sfloat
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.single_layer.s8_uint
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.single_layer.d16_unorm_s8_uint
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.single_layer.d16_unorm_s8_uint_separate_layouts_depth
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.single_layer.d16_unorm_s8_uint_separate_layouts_stencil
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.single_layer.d24_unorm_s8_uint
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.single_layer.d24_unorm_s8_uint_separate_layouts_depth
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.single_layer.d24_unorm_s8_uint_separate_layouts_stencil
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.single_layer.d32_sfloat_s8_uint
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.single_layer.d32_sfloat_s8_uint_separate_layouts_depth
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.single_layer.d32_sfloat_s8_uint_separate_layouts_stencil
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.single_layer.d16_unorm_200x180
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.single_layer.x8_d24_unorm_pack32_200x180
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.single_layer.d32_sfloat_200x180
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.single_layer.s8_uint_200x180
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.single_layer.d16_unorm_s8_uint_200x180
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.single_layer.d16_unorm_s8_uint_separate_layouts_depth_200x180
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.single_layer.d16_unorm_s8_uint_separate_layouts_stencil_200x180
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.single_layer.d24_unorm_s8_uint_200x180
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.single_layer.d24_unorm_s8_uint_separate_layouts_depth_200x180
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.single_layer.d24_unorm_s8_uint_separate_layouts_stencil_200x180
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.single_layer.d32_sfloat_s8_uint_200x180
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.single_layer.d32_sfloat_s8_uint_separate_layouts_depth_200x180
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.single_layer.d32_sfloat_s8_uint_separate_layouts_stencil_200x180
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.single_layer.d16_unorm_1x33
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.single_layer.x8_d24_unorm_pack32_1x33
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.single_layer.d32_sfloat_1x33
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.single_layer.s8_uint_1x33
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.single_layer.d16_unorm_s8_uint_1x33
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.single_layer.d16_unorm_s8_uint_separate_layouts_depth_1x33
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.single_layer.d16_unorm_s8_uint_separate_layouts_stencil_1x33
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.single_layer.d24_unorm_s8_uint_1x33
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.single_layer.d24_unorm_s8_uint_separate_layouts_depth_1x33
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.single_layer.d24_unorm_s8_uint_separate_layouts_stencil_1x33
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.single_layer.d32_sfloat_s8_uint_1x33
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.single_layer.d32_sfloat_s8_uint_separate_layouts_depth_1x33
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.single_layer.d32_sfloat_s8_uint_separate_layouts_stencil_1x33
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.single_layer.d16_unorm_64x11
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.single_layer.x8_d24_unorm_pack32_64x11
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.single_layer.d32_sfloat_64x11
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.single_layer.s8_uint_64x11
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.single_layer.d16_unorm_s8_uint_64x11
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.single_layer.d16_unorm_s8_uint_separate_layouts_depth_64x11
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.single_layer.d16_unorm_s8_uint_separate_layouts_stencil_64x11
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.single_layer.d24_unorm_s8_uint_64x11
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.single_layer.d24_unorm_s8_uint_separate_layouts_depth_64x11
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.single_layer.d24_unorm_s8_uint_separate_layouts_stencil_64x11
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.single_layer.d32_sfloat_s8_uint_64x11
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.single_layer.d32_sfloat_s8_uint_separate_layouts_depth_64x11
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.single_layer.d32_sfloat_s8_uint_separate_layouts_stencil_64x11
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.single_layer.d16_unorm_33x128
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.single_layer.x8_d24_unorm_pack32_33x128
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.single_layer.d32_sfloat_33x128
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.single_layer.s8_uint_33x128
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.single_layer.d16_unorm_s8_uint_33x128
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.single_layer.d16_unorm_s8_uint_separate_layouts_depth_33x128
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.single_layer.d16_unorm_s8_uint_separate_layouts_stencil_33x128
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.single_layer.d24_unorm_s8_uint_33x128
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.single_layer.d24_unorm_s8_uint_separate_layouts_depth_33x128
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.single_layer.d24_unorm_s8_uint_separate_layouts_stencil_33x128
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.single_layer.d32_sfloat_s8_uint_33x128
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.single_layer.d32_sfloat_s8_uint_separate_layouts_depth_33x128
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.single_layer.d32_sfloat_s8_uint_separate_layouts_stencil_33x128
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.multiple_layers.d16_unorm
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.multiple_layers.x8_d24_unorm_pack32
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.multiple_layers.d32_sfloat
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.multiple_layers.s8_uint
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.multiple_layers.d16_unorm_s8_uint
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.multiple_layers.d16_unorm_s8_uint_separate_layouts_depth
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.multiple_layers.d16_unorm_s8_uint_separate_layouts_stencil
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.multiple_layers.d24_unorm_s8_uint
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.multiple_layers.d24_unorm_s8_uint_separate_layouts_depth
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.multiple_layers.d24_unorm_s8_uint_separate_layouts_stencil
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.multiple_layers.d32_sfloat_s8_uint
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.multiple_layers.d32_sfloat_s8_uint_separate_layouts_depth
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.multiple_layers.d32_sfloat_s8_uint_separate_layouts_stencil
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.multiple_layers.d16_unorm_200x180
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.multiple_layers.x8_d24_unorm_pack32_200x180
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.multiple_layers.d32_sfloat_200x180
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.multiple_layers.s8_uint_200x180
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.multiple_layers.d16_unorm_s8_uint_200x180
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.multiple_layers.d16_unorm_s8_uint_separate_layouts_depth_200x180
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.multiple_layers.d16_unorm_s8_uint_separate_layouts_stencil_200x180
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.multiple_layers.d24_unorm_s8_uint_200x180
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.multiple_layers.d24_unorm_s8_uint_separate_layouts_depth_200x180
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.multiple_layers.d24_unorm_s8_uint_separate_layouts_stencil_200x180
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.multiple_layers.d32_sfloat_s8_uint_200x180
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.multiple_layers.d32_sfloat_s8_uint_separate_layouts_depth_200x180
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.multiple_layers.d32_sfloat_s8_uint_separate_layouts_stencil_200x180
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.multiple_layers.d16_unorm_1x33
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.multiple_layers.x8_d24_unorm_pack32_1x33
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.multiple_layers.d32_sfloat_1x33
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.multiple_layers.s8_uint_1x33
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.multiple_layers.d16_unorm_s8_uint_1x33
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.multiple_layers.d16_unorm_s8_uint_separate_layouts_depth_1x33
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.multiple_layers.d16_unorm_s8_uint_separate_layouts_stencil_1x33
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.multiple_layers.d24_unorm_s8_uint_1x33
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.multiple_layers.d24_unorm_s8_uint_separate_layouts_depth_1x33
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.multiple_layers.d24_unorm_s8_uint_separate_layouts_stencil_1x33
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.multiple_layers.d32_sfloat_s8_uint_1x33
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.multiple_layers.d32_sfloat_s8_uint_separate_layouts_depth_1x33
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.multiple_layers.d32_sfloat_s8_uint_separate_layouts_stencil_1x33
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.multiple_layers.d16_unorm_64x11
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.multiple_layers.x8_d24_unorm_pack32_64x11
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.multiple_layers.d32_sfloat_64x11
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.multiple_layers.s8_uint_64x11
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.multiple_layers.d16_unorm_s8_uint_64x11
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.multiple_layers.d16_unorm_s8_uint_separate_layouts_depth_64x11
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.multiple_layers.d16_unorm_s8_uint_separate_layouts_stencil_64x11
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.multiple_layers.d24_unorm_s8_uint_64x11
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.multiple_layers.d24_unorm_s8_uint_separate_layouts_depth_64x11
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.multiple_layers.d24_unorm_s8_uint_separate_layouts_stencil_64x11
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.multiple_layers.d32_sfloat_s8_uint_64x11
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.multiple_layers.d32_sfloat_s8_uint_separate_layouts_depth_64x11
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.multiple_layers.d32_sfloat_s8_uint_separate_layouts_stencil_64x11
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.multiple_layers.d16_unorm_33x128
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.multiple_layers.x8_d24_unorm_pack32_33x128
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.multiple_layers.d32_sfloat_33x128
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.multiple_layers.s8_uint_33x128
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.multiple_layers.d16_unorm_s8_uint_33x128
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.multiple_layers.d16_unorm_s8_uint_separate_layouts_depth_33x128
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.multiple_layers.d16_unorm_s8_uint_separate_layouts_stencil_33x128
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.multiple_layers.d24_unorm_s8_uint_33x128
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.multiple_layers.d24_unorm_s8_uint_separate_layouts_depth_33x128
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.multiple_layers.d24_unorm_s8_uint_separate_layouts_stencil_33x128
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.multiple_layers.d32_sfloat_s8_uint_33x128
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.multiple_layers.d32_sfloat_s8_uint_separate_layouts_depth_33x128
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.multiple_layers.d32_sfloat_s8_uint_separate_layouts_stencil_33x128
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers.d16_unorm
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers.x8_d24_unorm_pack32
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers.d32_sfloat
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers.s8_uint
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers.d16_unorm_s8_uint
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers.d16_unorm_s8_uint_separate_layouts_depth
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers.d16_unorm_s8_uint_separate_layouts_stencil
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers.d24_unorm_s8_uint
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers.d24_unorm_s8_uint_separate_layouts_depth
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers.d24_unorm_s8_uint_separate_layouts_stencil
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers.d32_sfloat_s8_uint
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers.d32_sfloat_s8_uint_separate_layouts_depth
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers.d32_sfloat_s8_uint_separate_layouts_stencil
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers.d16_unorm_200x180
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers.x8_d24_unorm_pack32_200x180
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers.d32_sfloat_200x180
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers.s8_uint_200x180
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers.d16_unorm_s8_uint_200x180
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers.d16_unorm_s8_uint_separate_layouts_depth_200x180
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers.d16_unorm_s8_uint_separate_layouts_stencil_200x180
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers.d24_unorm_s8_uint_200x180
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers.d24_unorm_s8_uint_separate_layouts_depth_200x180
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers.d24_unorm_s8_uint_separate_layouts_stencil_200x180
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers.d32_sfloat_s8_uint_200x180
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers.d32_sfloat_s8_uint_separate_layouts_depth_200x180
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers.d32_sfloat_s8_uint_separate_layouts_stencil_200x180
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers.d16_unorm_1x33
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers.x8_d24_unorm_pack32_1x33
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers.d32_sfloat_1x33
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers.s8_uint_1x33
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers.d16_unorm_s8_uint_1x33
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers.d16_unorm_s8_uint_separate_layouts_depth_1x33
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers.d16_unorm_s8_uint_separate_layouts_stencil_1x33
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers.d24_unorm_s8_uint_1x33
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers.d24_unorm_s8_uint_separate_layouts_depth_1x33
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers.d24_unorm_s8_uint_separate_layouts_stencil_1x33
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers.d32_sfloat_s8_uint_1x33
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers.d32_sfloat_s8_uint_separate_layouts_depth_1x33
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers.d32_sfloat_s8_uint_separate_layouts_stencil_1x33
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers.d16_unorm_64x11
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers.x8_d24_unorm_pack32_64x11
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers.d32_sfloat_64x11
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers.s8_uint_64x11
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers.d16_unorm_s8_uint_64x11
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers.d16_unorm_s8_uint_separate_layouts_depth_64x11
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers.d16_unorm_s8_uint_separate_layouts_stencil_64x11
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers.d24_unorm_s8_uint_64x11
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers.d24_unorm_s8_uint_separate_layouts_depth_64x11
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers.d24_unorm_s8_uint_separate_layouts_stencil_64x11
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers.d32_sfloat_s8_uint_64x11
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers.d32_sfloat_s8_uint_separate_layouts_depth_64x11
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers.d32_sfloat_s8_uint_separate_layouts_stencil_64x11
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers.d16_unorm_33x128
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers.x8_d24_unorm_pack32_33x128
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers.d32_sfloat_33x128
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers.s8_uint_33x128
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers.d16_unorm_s8_uint_33x128
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers.d16_unorm_s8_uint_separate_layouts_depth_33x128
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers.d16_unorm_s8_uint_separate_layouts_stencil_33x128
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers.d24_unorm_s8_uint_33x128
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers.d24_unorm_s8_uint_separate_layouts_depth_33x128
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers.d24_unorm_s8_uint_separate_layouts_stencil_33x128
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers.d32_sfloat_s8_uint_33x128
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers.d32_sfloat_s8_uint_separate_layouts_depth_33x128
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers.d32_sfloat_s8_uint_separate_layouts_stencil_33x128
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers_twostep.d16_unorm
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers_twostep.x8_d24_unorm_pack32
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers_twostep.d32_sfloat
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers_twostep.s8_uint
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers_twostep.d16_unorm_s8_uint
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers_twostep.d16_unorm_s8_uint_separate_layouts_depth
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers_twostep.d16_unorm_s8_uint_separate_layouts_stencil
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers_twostep.d24_unorm_s8_uint
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers_twostep.d24_unorm_s8_uint_separate_layouts_depth
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers_twostep.d24_unorm_s8_uint_separate_layouts_stencil
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers_twostep.d32_sfloat_s8_uint
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers_twostep.d32_sfloat_s8_uint_separate_layouts_depth
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers_twostep.d32_sfloat_s8_uint_separate_layouts_stencil
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers_twostep.d16_unorm_200x180
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers_twostep.x8_d24_unorm_pack32_200x180
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers_twostep.d32_sfloat_200x180
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers_twostep.s8_uint_200x180
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers_twostep.d16_unorm_s8_uint_200x180
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers_twostep.d16_unorm_s8_uint_separate_layouts_depth_200x180
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers_twostep.d16_unorm_s8_uint_separate_layouts_stencil_200x180
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers_twostep.d24_unorm_s8_uint_200x180
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers_twostep.d24_unorm_s8_uint_separate_layouts_depth_200x180
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers_twostep.d24_unorm_s8_uint_separate_layouts_stencil_200x180
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers_twostep.d32_sfloat_s8_uint_200x180
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers_twostep.d32_sfloat_s8_uint_separate_layouts_depth_200x180
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers_twostep.d32_sfloat_s8_uint_separate_layouts_stencil_200x180
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers_twostep.d16_unorm_1x33
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers_twostep.x8_d24_unorm_pack32_1x33
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers_twostep.d32_sfloat_1x33
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers_twostep.s8_uint_1x33
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers_twostep.d16_unorm_s8_uint_1x33
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers_twostep.d16_unorm_s8_uint_separate_layouts_depth_1x33
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers_twostep.d16_unorm_s8_uint_separate_layouts_stencil_1x33
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers_twostep.d24_unorm_s8_uint_1x33
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers_twostep.d24_unorm_s8_uint_separate_layouts_depth_1x33
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers_twostep.d24_unorm_s8_uint_separate_layouts_stencil_1x33
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers_twostep.d32_sfloat_s8_uint_1x33
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers_twostep.d32_sfloat_s8_uint_separate_layouts_depth_1x33
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers_twostep.d32_sfloat_s8_uint_separate_layouts_stencil_1x33
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers_twostep.d16_unorm_64x11
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers_twostep.x8_d24_unorm_pack32_64x11
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers_twostep.d32_sfloat_64x11
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers_twostep.s8_uint_64x11
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers_twostep.d16_unorm_s8_uint_64x11
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers_twostep.d16_unorm_s8_uint_separate_layouts_depth_64x11
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers_twostep.d16_unorm_s8_uint_separate_layouts_stencil_64x11
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers_twostep.d24_unorm_s8_uint_64x11
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers_twostep.d24_unorm_s8_uint_separate_layouts_depth_64x11
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers_twostep.d24_unorm_s8_uint_separate_layouts_stencil_64x11
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers_twostep.d32_sfloat_s8_uint_64x11
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers_twostep.d32_sfloat_s8_uint_separate_layouts_depth_64x11
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers_twostep.d32_sfloat_s8_uint_separate_layouts_stencil_64x11
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers_twostep.d16_unorm_33x128
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers_twostep.x8_d24_unorm_pack32_33x128
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers_twostep.d32_sfloat_33x128
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers_twostep.s8_uint_33x128
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers_twostep.d16_unorm_s8_uint_33x128
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers_twostep.d16_unorm_s8_uint_separate_layouts_depth_33x128
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers_twostep.d16_unorm_s8_uint_separate_layouts_stencil_33x128
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers_twostep.d24_unorm_s8_uint_33x128
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers_twostep.d24_unorm_s8_uint_separate_layouts_depth_33x128
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers_twostep.d24_unorm_s8_uint_separate_layouts_stencil_33x128
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers_twostep.d32_sfloat_s8_uint_33x128
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers_twostep.d32_sfloat_s8_uint_separate_layouts_depth_33x128
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_image.remaining_array_layers_twostep.d32_sfloat_s8_uint_separate_layouts_stencil_33x128
 dEQP-VK.api.image_clearing.core.clear_color_attachment.single_layer.r4g4_unorm_pack8
 dEQP-VK.api.image_clearing.core.clear_color_attachment.single_layer.r4g4b4a4_unorm_pack16
 dEQP-VK.api.image_clearing.core.clear_color_attachment.single_layer.b4g4r4a4_unorm_pack16
@@ -95575,141 +95743,261 @@ dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.single_layer.x8_d
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.single_layer.d32_sfloat
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.single_layer.s8_uint
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.single_layer.d16_unorm_s8_uint
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.single_layer.d16_unorm_s8_uint_separate_layouts_depth
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.single_layer.d16_unorm_s8_uint_separate_layouts_stencil
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.single_layer.d24_unorm_s8_uint
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.single_layer.d24_unorm_s8_uint_separate_layouts_depth
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.single_layer.d24_unorm_s8_uint_separate_layouts_stencil
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.single_layer.d32_sfloat_s8_uint
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.single_layer.d32_sfloat_s8_uint_separate_layouts_depth
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.single_layer.d32_sfloat_s8_uint_separate_layouts_stencil
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.single_layer.d16_unorm_200x180
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.single_layer.x8_d24_unorm_pack32_200x180
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.single_layer.d32_sfloat_200x180
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.single_layer.s8_uint_200x180
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.single_layer.d16_unorm_s8_uint_200x180
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.single_layer.d16_unorm_s8_uint_separate_layouts_depth_200x180
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.single_layer.d16_unorm_s8_uint_separate_layouts_stencil_200x180
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.single_layer.d24_unorm_s8_uint_200x180
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.single_layer.d24_unorm_s8_uint_separate_layouts_depth_200x180
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.single_layer.d24_unorm_s8_uint_separate_layouts_stencil_200x180
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.single_layer.d32_sfloat_s8_uint_200x180
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.single_layer.d32_sfloat_s8_uint_separate_layouts_depth_200x180
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.single_layer.d32_sfloat_s8_uint_separate_layouts_stencil_200x180
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.single_layer.d16_unorm_1x33
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.single_layer.x8_d24_unorm_pack32_1x33
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.single_layer.d32_sfloat_1x33
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.single_layer.s8_uint_1x33
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.single_layer.d16_unorm_s8_uint_1x33
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.single_layer.d16_unorm_s8_uint_separate_layouts_depth_1x33
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.single_layer.d16_unorm_s8_uint_separate_layouts_stencil_1x33
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.single_layer.d24_unorm_s8_uint_1x33
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.single_layer.d24_unorm_s8_uint_separate_layouts_depth_1x33
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.single_layer.d24_unorm_s8_uint_separate_layouts_stencil_1x33
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.single_layer.d32_sfloat_s8_uint_1x33
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.single_layer.d32_sfloat_s8_uint_separate_layouts_depth_1x33
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.single_layer.d32_sfloat_s8_uint_separate_layouts_stencil_1x33
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.single_layer.d16_unorm_64x11
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.single_layer.x8_d24_unorm_pack32_64x11
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.single_layer.d32_sfloat_64x11
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.single_layer.s8_uint_64x11
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.single_layer.d16_unorm_s8_uint_64x11
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.single_layer.d16_unorm_s8_uint_separate_layouts_depth_64x11
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.single_layer.d16_unorm_s8_uint_separate_layouts_stencil_64x11
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.single_layer.d24_unorm_s8_uint_64x11
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.single_layer.d24_unorm_s8_uint_separate_layouts_depth_64x11
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.single_layer.d24_unorm_s8_uint_separate_layouts_stencil_64x11
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.single_layer.d32_sfloat_s8_uint_64x11
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.single_layer.d32_sfloat_s8_uint_separate_layouts_depth_64x11
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.single_layer.d32_sfloat_s8_uint_separate_layouts_stencil_64x11
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.single_layer.d16_unorm_33x128
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.single_layer.x8_d24_unorm_pack32_33x128
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.single_layer.d32_sfloat_33x128
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.single_layer.s8_uint_33x128
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.single_layer.d16_unorm_s8_uint_33x128
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.single_layer.d16_unorm_s8_uint_separate_layouts_depth_33x128
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.single_layer.d16_unorm_s8_uint_separate_layouts_stencil_33x128
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.single_layer.d24_unorm_s8_uint_33x128
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.single_layer.d24_unorm_s8_uint_separate_layouts_depth_33x128
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.single_layer.d24_unorm_s8_uint_separate_layouts_stencil_33x128
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.single_layer.d32_sfloat_s8_uint_33x128
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.single_layer.d32_sfloat_s8_uint_separate_layouts_depth_33x128
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.single_layer.d32_sfloat_s8_uint_separate_layouts_stencil_33x128
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.multiple_layers.d16_unorm
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.multiple_layers.x8_d24_unorm_pack32
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.multiple_layers.d32_sfloat
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.multiple_layers.s8_uint
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.multiple_layers.d16_unorm_s8_uint
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.multiple_layers.d16_unorm_s8_uint_separate_layouts_depth
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.multiple_layers.d16_unorm_s8_uint_separate_layouts_stencil
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.multiple_layers.d24_unorm_s8_uint
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.multiple_layers.d24_unorm_s8_uint_separate_layouts_depth
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.multiple_layers.d24_unorm_s8_uint_separate_layouts_stencil
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.multiple_layers.d32_sfloat_s8_uint
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.multiple_layers.d32_sfloat_s8_uint_separate_layouts_depth
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.multiple_layers.d32_sfloat_s8_uint_separate_layouts_stencil
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.multiple_layers.d16_unorm_200x180
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.multiple_layers.x8_d24_unorm_pack32_200x180
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.multiple_layers.d32_sfloat_200x180
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.multiple_layers.s8_uint_200x180
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.multiple_layers.d16_unorm_s8_uint_200x180
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.multiple_layers.d16_unorm_s8_uint_separate_layouts_depth_200x180
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.multiple_layers.d16_unorm_s8_uint_separate_layouts_stencil_200x180
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.multiple_layers.d24_unorm_s8_uint_200x180
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.multiple_layers.d24_unorm_s8_uint_separate_layouts_depth_200x180
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.multiple_layers.d24_unorm_s8_uint_separate_layouts_stencil_200x180
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.multiple_layers.d32_sfloat_s8_uint_200x180
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.multiple_layers.d32_sfloat_s8_uint_separate_layouts_depth_200x180
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.multiple_layers.d32_sfloat_s8_uint_separate_layouts_stencil_200x180
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.multiple_layers.d16_unorm_1x33
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.multiple_layers.x8_d24_unorm_pack32_1x33
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.multiple_layers.d32_sfloat_1x33
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.multiple_layers.s8_uint_1x33
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.multiple_layers.d16_unorm_s8_uint_1x33
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.multiple_layers.d16_unorm_s8_uint_separate_layouts_depth_1x33
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.multiple_layers.d16_unorm_s8_uint_separate_layouts_stencil_1x33
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.multiple_layers.d24_unorm_s8_uint_1x33
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.multiple_layers.d24_unorm_s8_uint_separate_layouts_depth_1x33
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.multiple_layers.d24_unorm_s8_uint_separate_layouts_stencil_1x33
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.multiple_layers.d32_sfloat_s8_uint_1x33
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.multiple_layers.d32_sfloat_s8_uint_separate_layouts_depth_1x33
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.multiple_layers.d32_sfloat_s8_uint_separate_layouts_stencil_1x33
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.multiple_layers.d16_unorm_64x11
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.multiple_layers.x8_d24_unorm_pack32_64x11
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.multiple_layers.d32_sfloat_64x11
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.multiple_layers.s8_uint_64x11
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.multiple_layers.d16_unorm_s8_uint_64x11
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.multiple_layers.d16_unorm_s8_uint_separate_layouts_depth_64x11
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.multiple_layers.d16_unorm_s8_uint_separate_layouts_stencil_64x11
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.multiple_layers.d24_unorm_s8_uint_64x11
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.multiple_layers.d24_unorm_s8_uint_separate_layouts_depth_64x11
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.multiple_layers.d24_unorm_s8_uint_separate_layouts_stencil_64x11
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.multiple_layers.d32_sfloat_s8_uint_64x11
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.multiple_layers.d32_sfloat_s8_uint_separate_layouts_depth_64x11
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.multiple_layers.d32_sfloat_s8_uint_separate_layouts_stencil_64x11
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.multiple_layers.d16_unorm_33x128
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.multiple_layers.x8_d24_unorm_pack32_33x128
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.multiple_layers.d32_sfloat_33x128
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.multiple_layers.s8_uint_33x128
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.multiple_layers.d16_unorm_s8_uint_33x128
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.multiple_layers.d16_unorm_s8_uint_separate_layouts_depth_33x128
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.multiple_layers.d16_unorm_s8_uint_separate_layouts_stencil_33x128
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.multiple_layers.d24_unorm_s8_uint_33x128
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.multiple_layers.d24_unorm_s8_uint_separate_layouts_depth_33x128
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.multiple_layers.d24_unorm_s8_uint_separate_layouts_stencil_33x128
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.multiple_layers.d32_sfloat_s8_uint_33x128
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.multiple_layers.d32_sfloat_s8_uint_separate_layouts_depth_33x128
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.multiple_layers.d32_sfloat_s8_uint_separate_layouts_stencil_33x128
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.cube_layers.d16_unorm
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.cube_layers.x8_d24_unorm_pack32
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.cube_layers.d32_sfloat
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.cube_layers.s8_uint
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.cube_layers.d16_unorm_s8_uint
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.cube_layers.d16_unorm_s8_uint_separate_layouts_depth
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.cube_layers.d16_unorm_s8_uint_separate_layouts_stencil
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.cube_layers.d24_unorm_s8_uint
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.cube_layers.d24_unorm_s8_uint_separate_layouts_depth
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.cube_layers.d24_unorm_s8_uint_separate_layouts_stencil
 dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.cube_layers.d32_sfloat_s8_uint
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.cube_layers.d32_sfloat_s8_uint_separate_layouts_depth
+dEQP-VK.api.image_clearing.core.clear_depth_stencil_attachment.cube_layers.d32_sfloat_s8_uint_separate_layouts_stencil
 dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.single_layer.d16_unorm
 dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.single_layer.x8_d24_unorm_pack32
 dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.single_layer.d32_sfloat
 dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.single_layer.s8_uint
 dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.single_layer.d16_unorm_s8_uint
+dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.single_layer.d16_unorm_s8_uint_separate_layouts_depth
+dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.single_layer.d16_unorm_s8_uint_separate_layouts_stencil
 dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.single_layer.d24_unorm_s8_uint
+dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.single_layer.d24_unorm_s8_uint_separate_layouts_depth
+dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.single_layer.d24_unorm_s8_uint_separate_layouts_stencil
 dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.single_layer.d32_sfloat_s8_uint
+dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.single_layer.d32_sfloat_s8_uint_separate_layouts_depth
+dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.single_layer.d32_sfloat_s8_uint_separate_layouts_stencil
 dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.single_layer.d16_unorm_200x180
 dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.single_layer.x8_d24_unorm_pack32_200x180
 dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.single_layer.d32_sfloat_200x180
 dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.single_layer.s8_uint_200x180
 dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.single_layer.d16_unorm_s8_uint_200x180
+dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.single_layer.d16_unorm_s8_uint_separate_layouts_depth_200x180
+dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.single_layer.d16_unorm_s8_uint_separate_layouts_stencil_200x180
 dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.single_layer.d24_unorm_s8_uint_200x180
+dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.single_layer.d24_unorm_s8_uint_separate_layouts_depth_200x180
+dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.single_layer.d24_unorm_s8_uint_separate_layouts_stencil_200x180
 dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.single_layer.d32_sfloat_s8_uint_200x180
+dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.single_layer.d32_sfloat_s8_uint_separate_layouts_depth_200x180
+dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.single_layer.d32_sfloat_s8_uint_separate_layouts_stencil_200x180
 dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.single_layer.d16_unorm_64x11
 dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.single_layer.x8_d24_unorm_pack32_64x11
 dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.single_layer.d32_sfloat_64x11
 dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.single_layer.s8_uint_64x11
 dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.single_layer.d16_unorm_s8_uint_64x11
+dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.single_layer.d16_unorm_s8_uint_separate_layouts_depth_64x11
+dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.single_layer.d16_unorm_s8_uint_separate_layouts_stencil_64x11
 dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.single_layer.d24_unorm_s8_uint_64x11
+dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.single_layer.d24_unorm_s8_uint_separate_layouts_depth_64x11
+dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.single_layer.d24_unorm_s8_uint_separate_layouts_stencil_64x11
 dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.single_layer.d32_sfloat_s8_uint_64x11
+dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.single_layer.d32_sfloat_s8_uint_separate_layouts_depth_64x11
+dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.single_layer.d32_sfloat_s8_uint_separate_layouts_stencil_64x11
 dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.single_layer.d16_unorm_33x128
 dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.single_layer.x8_d24_unorm_pack32_33x128
 dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.single_layer.d32_sfloat_33x128
 dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.single_layer.s8_uint_33x128
 dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.single_layer.d16_unorm_s8_uint_33x128
+dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.single_layer.d16_unorm_s8_uint_separate_layouts_depth_33x128
+dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.single_layer.d16_unorm_s8_uint_separate_layouts_stencil_33x128
 dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.single_layer.d24_unorm_s8_uint_33x128
+dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.single_layer.d24_unorm_s8_uint_separate_layouts_depth_33x128
+dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.single_layer.d24_unorm_s8_uint_separate_layouts_stencil_33x128
 dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.single_layer.d32_sfloat_s8_uint_33x128
+dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.single_layer.d32_sfloat_s8_uint_separate_layouts_depth_33x128
+dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.single_layer.d32_sfloat_s8_uint_separate_layouts_stencil_33x128
 dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.multiple_layers.d16_unorm
 dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.multiple_layers.x8_d24_unorm_pack32
 dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.multiple_layers.d32_sfloat
 dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.multiple_layers.s8_uint
 dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.multiple_layers.d16_unorm_s8_uint
+dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.multiple_layers.d16_unorm_s8_uint_separate_layouts_depth
+dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.multiple_layers.d16_unorm_s8_uint_separate_layouts_stencil
 dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.multiple_layers.d24_unorm_s8_uint
+dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.multiple_layers.d24_unorm_s8_uint_separate_layouts_depth
+dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.multiple_layers.d24_unorm_s8_uint_separate_layouts_stencil
 dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.multiple_layers.d32_sfloat_s8_uint
+dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.multiple_layers.d32_sfloat_s8_uint_separate_layouts_depth
+dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.multiple_layers.d32_sfloat_s8_uint_separate_layouts_stencil
 dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.multiple_layers.d16_unorm_200x180
 dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.multiple_layers.x8_d24_unorm_pack32_200x180
 dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.multiple_layers.d32_sfloat_200x180
 dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.multiple_layers.s8_uint_200x180
 dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.multiple_layers.d16_unorm_s8_uint_200x180
+dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.multiple_layers.d16_unorm_s8_uint_separate_layouts_depth_200x180
+dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.multiple_layers.d16_unorm_s8_uint_separate_layouts_stencil_200x180
 dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.multiple_layers.d24_unorm_s8_uint_200x180
+dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.multiple_layers.d24_unorm_s8_uint_separate_layouts_depth_200x180
+dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.multiple_layers.d24_unorm_s8_uint_separate_layouts_stencil_200x180
 dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.multiple_layers.d32_sfloat_s8_uint_200x180
+dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.multiple_layers.d32_sfloat_s8_uint_separate_layouts_depth_200x180
+dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.multiple_layers.d32_sfloat_s8_uint_separate_layouts_stencil_200x180
 dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.multiple_layers.d16_unorm_64x11
 dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.multiple_layers.x8_d24_unorm_pack32_64x11
 dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.multiple_layers.d32_sfloat_64x11
 dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.multiple_layers.s8_uint_64x11
 dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.multiple_layers.d16_unorm_s8_uint_64x11
+dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.multiple_layers.d16_unorm_s8_uint_separate_layouts_depth_64x11
+dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.multiple_layers.d16_unorm_s8_uint_separate_layouts_stencil_64x11
 dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.multiple_layers.d24_unorm_s8_uint_64x11
+dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.multiple_layers.d24_unorm_s8_uint_separate_layouts_depth_64x11
+dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.multiple_layers.d24_unorm_s8_uint_separate_layouts_stencil_64x11
 dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.multiple_layers.d32_sfloat_s8_uint_64x11
+dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.multiple_layers.d32_sfloat_s8_uint_separate_layouts_depth_64x11
+dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.multiple_layers.d32_sfloat_s8_uint_separate_layouts_stencil_64x11
 dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.multiple_layers.d16_unorm_33x128
 dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.multiple_layers.x8_d24_unorm_pack32_33x128
 dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.multiple_layers.d32_sfloat_33x128
 dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.multiple_layers.s8_uint_33x128
 dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.multiple_layers.d16_unorm_s8_uint_33x128
+dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.multiple_layers.d16_unorm_s8_uint_separate_layouts_depth_33x128
+dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.multiple_layers.d16_unorm_s8_uint_separate_layouts_stencil_33x128
 dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.multiple_layers.d24_unorm_s8_uint_33x128
+dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.multiple_layers.d24_unorm_s8_uint_separate_layouts_depth_33x128
+dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.multiple_layers.d24_unorm_s8_uint_separate_layouts_stencil_33x128
 dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.multiple_layers.d32_sfloat_s8_uint_33x128
+dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.multiple_layers.d32_sfloat_s8_uint_separate_layouts_depth_33x128
+dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.multiple_layers.d32_sfloat_s8_uint_separate_layouts_stencil_33x128
 dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.cube_layers.d16_unorm
 dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.cube_layers.x8_d24_unorm_pack32
 dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.cube_layers.d32_sfloat
 dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.cube_layers.s8_uint
 dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.cube_layers.d16_unorm_s8_uint
+dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.cube_layers.d16_unorm_s8_uint_separate_layouts_depth
+dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.cube_layers.d16_unorm_s8_uint_separate_layouts_stencil
 dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.cube_layers.d24_unorm_s8_uint
+dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.cube_layers.d24_unorm_s8_uint_separate_layouts_depth
+dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.cube_layers.d24_unorm_s8_uint_separate_layouts_stencil
 dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.cube_layers.d32_sfloat_s8_uint
+dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.cube_layers.d32_sfloat_s8_uint_separate_layouts_depth
+dEQP-VK.api.image_clearing.core.partial_clear_depth_stencil_attachment.cube_layers.d32_sfloat_s8_uint_separate_layouts_stencil
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_color_image.1d.optimal.single_layer.r4g4_unorm_pack8
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_color_image.1d.optimal.single_layer.r4g4b4a4_unorm_pack16
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_color_image.1d.optimal.single_layer.b4g4r4a4_unorm_pack16
@@ -103707,141 +103995,261 @@ dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.single
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.single_layer.d32_sfloat
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.single_layer.s8_uint
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.single_layer.d16_unorm_s8_uint
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.single_layer.d16_unorm_s8_uint_separate_layouts_depth
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.single_layer.d16_unorm_s8_uint_separate_layouts_stencil
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.single_layer.d24_unorm_s8_uint
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.single_layer.d24_unorm_s8_uint_separate_layouts_depth
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.single_layer.d24_unorm_s8_uint_separate_layouts_stencil
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.single_layer.d32_sfloat_s8_uint
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.single_layer.d32_sfloat_s8_uint_separate_layouts_depth
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.single_layer.d32_sfloat_s8_uint_separate_layouts_stencil
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.single_layer.d16_unorm_200x180
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.single_layer.x8_d24_unorm_pack32_200x180
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.single_layer.d32_sfloat_200x180
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.single_layer.s8_uint_200x180
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.single_layer.d16_unorm_s8_uint_200x180
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.single_layer.d16_unorm_s8_uint_separate_layouts_depth_200x180
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.single_layer.d16_unorm_s8_uint_separate_layouts_stencil_200x180
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.single_layer.d24_unorm_s8_uint_200x180
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.single_layer.d24_unorm_s8_uint_separate_layouts_depth_200x180
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.single_layer.d24_unorm_s8_uint_separate_layouts_stencil_200x180
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.single_layer.d32_sfloat_s8_uint_200x180
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.single_layer.d32_sfloat_s8_uint_separate_layouts_depth_200x180
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.single_layer.d32_sfloat_s8_uint_separate_layouts_stencil_200x180
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.single_layer.d16_unorm_1x33
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.single_layer.x8_d24_unorm_pack32_1x33
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.single_layer.d32_sfloat_1x33
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.single_layer.s8_uint_1x33
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.single_layer.d16_unorm_s8_uint_1x33
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.single_layer.d16_unorm_s8_uint_separate_layouts_depth_1x33
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.single_layer.d16_unorm_s8_uint_separate_layouts_stencil_1x33
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.single_layer.d24_unorm_s8_uint_1x33
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.single_layer.d24_unorm_s8_uint_separate_layouts_depth_1x33
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.single_layer.d24_unorm_s8_uint_separate_layouts_stencil_1x33
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.single_layer.d32_sfloat_s8_uint_1x33
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.single_layer.d32_sfloat_s8_uint_separate_layouts_depth_1x33
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.single_layer.d32_sfloat_s8_uint_separate_layouts_stencil_1x33
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.single_layer.d16_unorm_64x11
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.single_layer.x8_d24_unorm_pack32_64x11
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.single_layer.d32_sfloat_64x11
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.single_layer.s8_uint_64x11
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.single_layer.d16_unorm_s8_uint_64x11
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.single_layer.d16_unorm_s8_uint_separate_layouts_depth_64x11
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.single_layer.d16_unorm_s8_uint_separate_layouts_stencil_64x11
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.single_layer.d24_unorm_s8_uint_64x11
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.single_layer.d24_unorm_s8_uint_separate_layouts_depth_64x11
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.single_layer.d24_unorm_s8_uint_separate_layouts_stencil_64x11
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.single_layer.d32_sfloat_s8_uint_64x11
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.single_layer.d32_sfloat_s8_uint_separate_layouts_depth_64x11
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.single_layer.d32_sfloat_s8_uint_separate_layouts_stencil_64x11
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.single_layer.d16_unorm_33x128
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.single_layer.x8_d24_unorm_pack32_33x128
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.single_layer.d32_sfloat_33x128
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.single_layer.s8_uint_33x128
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.single_layer.d16_unorm_s8_uint_33x128
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.single_layer.d16_unorm_s8_uint_separate_layouts_depth_33x128
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.single_layer.d16_unorm_s8_uint_separate_layouts_stencil_33x128
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.single_layer.d24_unorm_s8_uint_33x128
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.single_layer.d24_unorm_s8_uint_separate_layouts_depth_33x128
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.single_layer.d24_unorm_s8_uint_separate_layouts_stencil_33x128
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.single_layer.d32_sfloat_s8_uint_33x128
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.single_layer.d32_sfloat_s8_uint_separate_layouts_depth_33x128
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.single_layer.d32_sfloat_s8_uint_separate_layouts_stencil_33x128
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.multiple_layers.d16_unorm
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.multiple_layers.x8_d24_unorm_pack32
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.multiple_layers.d32_sfloat
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.multiple_layers.s8_uint
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.multiple_layers.d16_unorm_s8_uint
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.multiple_layers.d16_unorm_s8_uint_separate_layouts_depth
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.multiple_layers.d16_unorm_s8_uint_separate_layouts_stencil
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.multiple_layers.d24_unorm_s8_uint
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.multiple_layers.d24_unorm_s8_uint_separate_layouts_depth
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.multiple_layers.d24_unorm_s8_uint_separate_layouts_stencil
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.multiple_layers.d32_sfloat_s8_uint
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.multiple_layers.d32_sfloat_s8_uint_separate_layouts_depth
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.multiple_layers.d32_sfloat_s8_uint_separate_layouts_stencil
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.multiple_layers.d16_unorm_200x180
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.multiple_layers.x8_d24_unorm_pack32_200x180
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.multiple_layers.d32_sfloat_200x180
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.multiple_layers.s8_uint_200x180
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.multiple_layers.d16_unorm_s8_uint_200x180
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.multiple_layers.d16_unorm_s8_uint_separate_layouts_depth_200x180
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.multiple_layers.d16_unorm_s8_uint_separate_layouts_stencil_200x180
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.multiple_layers.d24_unorm_s8_uint_200x180
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.multiple_layers.d24_unorm_s8_uint_separate_layouts_depth_200x180
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.multiple_layers.d24_unorm_s8_uint_separate_layouts_stencil_200x180
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.multiple_layers.d32_sfloat_s8_uint_200x180
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.multiple_layers.d32_sfloat_s8_uint_separate_layouts_depth_200x180
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.multiple_layers.d32_sfloat_s8_uint_separate_layouts_stencil_200x180
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.multiple_layers.d16_unorm_1x33
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.multiple_layers.x8_d24_unorm_pack32_1x33
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.multiple_layers.d32_sfloat_1x33
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.multiple_layers.s8_uint_1x33
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.multiple_layers.d16_unorm_s8_uint_1x33
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.multiple_layers.d16_unorm_s8_uint_separate_layouts_depth_1x33
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.multiple_layers.d16_unorm_s8_uint_separate_layouts_stencil_1x33
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.multiple_layers.d24_unorm_s8_uint_1x33
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.multiple_layers.d24_unorm_s8_uint_separate_layouts_depth_1x33
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.multiple_layers.d24_unorm_s8_uint_separate_layouts_stencil_1x33
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.multiple_layers.d32_sfloat_s8_uint_1x33
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.multiple_layers.d32_sfloat_s8_uint_separate_layouts_depth_1x33
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.multiple_layers.d32_sfloat_s8_uint_separate_layouts_stencil_1x33
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.multiple_layers.d16_unorm_64x11
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.multiple_layers.x8_d24_unorm_pack32_64x11
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.multiple_layers.d32_sfloat_64x11
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.multiple_layers.s8_uint_64x11
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.multiple_layers.d16_unorm_s8_uint_64x11
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.multiple_layers.d16_unorm_s8_uint_separate_layouts_depth_64x11
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.multiple_layers.d16_unorm_s8_uint_separate_layouts_stencil_64x11
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.multiple_layers.d24_unorm_s8_uint_64x11
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.multiple_layers.d24_unorm_s8_uint_separate_layouts_depth_64x11
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.multiple_layers.d24_unorm_s8_uint_separate_layouts_stencil_64x11
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.multiple_layers.d32_sfloat_s8_uint_64x11
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.multiple_layers.d32_sfloat_s8_uint_separate_layouts_depth_64x11
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.multiple_layers.d32_sfloat_s8_uint_separate_layouts_stencil_64x11
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.multiple_layers.d16_unorm_33x128
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.multiple_layers.x8_d24_unorm_pack32_33x128
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.multiple_layers.d32_sfloat_33x128
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.multiple_layers.s8_uint_33x128
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.multiple_layers.d16_unorm_s8_uint_33x128
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.multiple_layers.d16_unorm_s8_uint_separate_layouts_depth_33x128
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.multiple_layers.d16_unorm_s8_uint_separate_layouts_stencil_33x128
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.multiple_layers.d24_unorm_s8_uint_33x128
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.multiple_layers.d24_unorm_s8_uint_separate_layouts_depth_33x128
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.multiple_layers.d24_unorm_s8_uint_separate_layouts_stencil_33x128
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.multiple_layers.d32_sfloat_s8_uint_33x128
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.multiple_layers.d32_sfloat_s8_uint_separate_layouts_depth_33x128
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.multiple_layers.d32_sfloat_s8_uint_separate_layouts_stencil_33x128
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers.d16_unorm
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers.x8_d24_unorm_pack32
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers.d32_sfloat
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers.s8_uint
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers.d16_unorm_s8_uint
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers.d16_unorm_s8_uint_separate_layouts_depth
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers.d16_unorm_s8_uint_separate_layouts_stencil
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers.d24_unorm_s8_uint
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers.d24_unorm_s8_uint_separate_layouts_depth
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers.d24_unorm_s8_uint_separate_layouts_stencil
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers.d32_sfloat_s8_uint
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers.d32_sfloat_s8_uint_separate_layouts_depth
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers.d32_sfloat_s8_uint_separate_layouts_stencil
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers.d16_unorm_200x180
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers.x8_d24_unorm_pack32_200x180
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers.d32_sfloat_200x180
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers.s8_uint_200x180
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers.d16_unorm_s8_uint_200x180
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers.d16_unorm_s8_uint_separate_layouts_depth_200x180
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers.d16_unorm_s8_uint_separate_layouts_stencil_200x180
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers.d24_unorm_s8_uint_200x180
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers.d24_unorm_s8_uint_separate_layouts_depth_200x180
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers.d24_unorm_s8_uint_separate_layouts_stencil_200x180
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers.d32_sfloat_s8_uint_200x180
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers.d32_sfloat_s8_uint_separate_layouts_depth_200x180
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers.d32_sfloat_s8_uint_separate_layouts_stencil_200x180
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers.d16_unorm_1x33
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers.x8_d24_unorm_pack32_1x33
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers.d32_sfloat_1x33
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers.s8_uint_1x33
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers.d16_unorm_s8_uint_1x33
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers.d16_unorm_s8_uint_separate_layouts_depth_1x33
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers.d16_unorm_s8_uint_separate_layouts_stencil_1x33
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers.d24_unorm_s8_uint_1x33
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers.d24_unorm_s8_uint_separate_layouts_depth_1x33
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers.d24_unorm_s8_uint_separate_layouts_stencil_1x33
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers.d32_sfloat_s8_uint_1x33
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers.d32_sfloat_s8_uint_separate_layouts_depth_1x33
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers.d32_sfloat_s8_uint_separate_layouts_stencil_1x33
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers.d16_unorm_64x11
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers.x8_d24_unorm_pack32_64x11
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers.d32_sfloat_64x11
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers.s8_uint_64x11
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers.d16_unorm_s8_uint_64x11
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers.d16_unorm_s8_uint_separate_layouts_depth_64x11
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers.d16_unorm_s8_uint_separate_layouts_stencil_64x11
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers.d24_unorm_s8_uint_64x11
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers.d24_unorm_s8_uint_separate_layouts_depth_64x11
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers.d24_unorm_s8_uint_separate_layouts_stencil_64x11
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers.d32_sfloat_s8_uint_64x11
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers.d32_sfloat_s8_uint_separate_layouts_depth_64x11
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers.d32_sfloat_s8_uint_separate_layouts_stencil_64x11
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers.d16_unorm_33x128
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers.x8_d24_unorm_pack32_33x128
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers.d32_sfloat_33x128
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers.s8_uint_33x128
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers.d16_unorm_s8_uint_33x128
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers.d16_unorm_s8_uint_separate_layouts_depth_33x128
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers.d16_unorm_s8_uint_separate_layouts_stencil_33x128
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers.d24_unorm_s8_uint_33x128
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers.d24_unorm_s8_uint_separate_layouts_depth_33x128
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers.d24_unorm_s8_uint_separate_layouts_stencil_33x128
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers.d32_sfloat_s8_uint_33x128
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers.d32_sfloat_s8_uint_separate_layouts_depth_33x128
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers.d32_sfloat_s8_uint_separate_layouts_stencil_33x128
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers_twostep.d16_unorm
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers_twostep.x8_d24_unorm_pack32
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers_twostep.d32_sfloat
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers_twostep.s8_uint
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers_twostep.d16_unorm_s8_uint
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers_twostep.d16_unorm_s8_uint_separate_layouts_depth
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers_twostep.d16_unorm_s8_uint_separate_layouts_stencil
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers_twostep.d24_unorm_s8_uint
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers_twostep.d24_unorm_s8_uint_separate_layouts_depth
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers_twostep.d24_unorm_s8_uint_separate_layouts_stencil
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers_twostep.d32_sfloat_s8_uint
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers_twostep.d32_sfloat_s8_uint_separate_layouts_depth
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers_twostep.d32_sfloat_s8_uint_separate_layouts_stencil
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers_twostep.d16_unorm_200x180
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers_twostep.x8_d24_unorm_pack32_200x180
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers_twostep.d32_sfloat_200x180
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers_twostep.s8_uint_200x180
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers_twostep.d16_unorm_s8_uint_200x180
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers_twostep.d16_unorm_s8_uint_separate_layouts_depth_200x180
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers_twostep.d16_unorm_s8_uint_separate_layouts_stencil_200x180
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers_twostep.d24_unorm_s8_uint_200x180
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers_twostep.d24_unorm_s8_uint_separate_layouts_depth_200x180
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers_twostep.d24_unorm_s8_uint_separate_layouts_stencil_200x180
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers_twostep.d32_sfloat_s8_uint_200x180
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers_twostep.d32_sfloat_s8_uint_separate_layouts_depth_200x180
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers_twostep.d32_sfloat_s8_uint_separate_layouts_stencil_200x180
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers_twostep.d16_unorm_1x33
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers_twostep.x8_d24_unorm_pack32_1x33
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers_twostep.d32_sfloat_1x33
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers_twostep.s8_uint_1x33
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers_twostep.d16_unorm_s8_uint_1x33
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers_twostep.d16_unorm_s8_uint_separate_layouts_depth_1x33
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers_twostep.d16_unorm_s8_uint_separate_layouts_stencil_1x33
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers_twostep.d24_unorm_s8_uint_1x33
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers_twostep.d24_unorm_s8_uint_separate_layouts_depth_1x33
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers_twostep.d24_unorm_s8_uint_separate_layouts_stencil_1x33
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers_twostep.d32_sfloat_s8_uint_1x33
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers_twostep.d32_sfloat_s8_uint_separate_layouts_depth_1x33
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers_twostep.d32_sfloat_s8_uint_separate_layouts_stencil_1x33
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers_twostep.d16_unorm_64x11
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers_twostep.x8_d24_unorm_pack32_64x11
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers_twostep.d32_sfloat_64x11
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers_twostep.s8_uint_64x11
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers_twostep.d16_unorm_s8_uint_64x11
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers_twostep.d16_unorm_s8_uint_separate_layouts_depth_64x11
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers_twostep.d16_unorm_s8_uint_separate_layouts_stencil_64x11
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers_twostep.d24_unorm_s8_uint_64x11
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers_twostep.d24_unorm_s8_uint_separate_layouts_depth_64x11
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers_twostep.d24_unorm_s8_uint_separate_layouts_stencil_64x11
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers_twostep.d32_sfloat_s8_uint_64x11
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers_twostep.d32_sfloat_s8_uint_separate_layouts_depth_64x11
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers_twostep.d32_sfloat_s8_uint_separate_layouts_stencil_64x11
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers_twostep.d16_unorm_33x128
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers_twostep.x8_d24_unorm_pack32_33x128
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers_twostep.d32_sfloat_33x128
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers_twostep.s8_uint_33x128
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers_twostep.d16_unorm_s8_uint_33x128
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers_twostep.d16_unorm_s8_uint_separate_layouts_depth_33x128
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers_twostep.d16_unorm_s8_uint_separate_layouts_stencil_33x128
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers_twostep.d24_unorm_s8_uint_33x128
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers_twostep.d24_unorm_s8_uint_separate_layouts_depth_33x128
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers_twostep.d24_unorm_s8_uint_separate_layouts_stencil_33x128
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers_twostep.d32_sfloat_s8_uint_33x128
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers_twostep.d32_sfloat_s8_uint_separate_layouts_depth_33x128
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_image.remaining_array_layers_twostep.d32_sfloat_s8_uint_separate_layouts_stencil_33x128
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_color_attachment.single_layer.r4g4_unorm_pack8
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_color_attachment.single_layer.r4g4b4a4_unorm_pack16
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_color_attachment.single_layer.b4g4r4a4_unorm_pack16
@@ -106067,141 +106475,261 @@ dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.s
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.single_layer.d32_sfloat
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.single_layer.s8_uint
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.single_layer.d16_unorm_s8_uint
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.single_layer.d16_unorm_s8_uint_separate_layouts_depth
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.single_layer.d16_unorm_s8_uint_separate_layouts_stencil
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.single_layer.d24_unorm_s8_uint
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.single_layer.d24_unorm_s8_uint_separate_layouts_depth
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.single_layer.d24_unorm_s8_uint_separate_layouts_stencil
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.single_layer.d32_sfloat_s8_uint
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.single_layer.d32_sfloat_s8_uint_separate_layouts_depth
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.single_layer.d32_sfloat_s8_uint_separate_layouts_stencil
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.single_layer.d16_unorm_200x180
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.single_layer.x8_d24_unorm_pack32_200x180
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.single_layer.d32_sfloat_200x180
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.single_layer.s8_uint_200x180
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.single_layer.d16_unorm_s8_uint_200x180
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.single_layer.d16_unorm_s8_uint_separate_layouts_depth_200x180
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.single_layer.d16_unorm_s8_uint_separate_layouts_stencil_200x180
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.single_layer.d24_unorm_s8_uint_200x180
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.single_layer.d24_unorm_s8_uint_separate_layouts_depth_200x180
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.single_layer.d24_unorm_s8_uint_separate_layouts_stencil_200x180
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.single_layer.d32_sfloat_s8_uint_200x180
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.single_layer.d32_sfloat_s8_uint_separate_layouts_depth_200x180
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.single_layer.d32_sfloat_s8_uint_separate_layouts_stencil_200x180
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.single_layer.d16_unorm_1x33
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.single_layer.x8_d24_unorm_pack32_1x33
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.single_layer.d32_sfloat_1x33
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.single_layer.s8_uint_1x33
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.single_layer.d16_unorm_s8_uint_1x33
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.single_layer.d16_unorm_s8_uint_separate_layouts_depth_1x33
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.single_layer.d16_unorm_s8_uint_separate_layouts_stencil_1x33
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.single_layer.d24_unorm_s8_uint_1x33
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.single_layer.d24_unorm_s8_uint_separate_layouts_depth_1x33
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.single_layer.d24_unorm_s8_uint_separate_layouts_stencil_1x33
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.single_layer.d32_sfloat_s8_uint_1x33
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.single_layer.d32_sfloat_s8_uint_separate_layouts_depth_1x33
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.single_layer.d32_sfloat_s8_uint_separate_layouts_stencil_1x33
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.single_layer.d16_unorm_64x11
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.single_layer.x8_d24_unorm_pack32_64x11
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.single_layer.d32_sfloat_64x11
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.single_layer.s8_uint_64x11
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.single_layer.d16_unorm_s8_uint_64x11
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.single_layer.d16_unorm_s8_uint_separate_layouts_depth_64x11
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.single_layer.d16_unorm_s8_uint_separate_layouts_stencil_64x11
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.single_layer.d24_unorm_s8_uint_64x11
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.single_layer.d24_unorm_s8_uint_separate_layouts_depth_64x11
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.single_layer.d24_unorm_s8_uint_separate_layouts_stencil_64x11
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.single_layer.d32_sfloat_s8_uint_64x11
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.single_layer.d32_sfloat_s8_uint_separate_layouts_depth_64x11
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.single_layer.d32_sfloat_s8_uint_separate_layouts_stencil_64x11
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.single_layer.d16_unorm_33x128
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.single_layer.x8_d24_unorm_pack32_33x128
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.single_layer.d32_sfloat_33x128
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.single_layer.s8_uint_33x128
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.single_layer.d16_unorm_s8_uint_33x128
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.single_layer.d16_unorm_s8_uint_separate_layouts_depth_33x128
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.single_layer.d16_unorm_s8_uint_separate_layouts_stencil_33x128
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.single_layer.d24_unorm_s8_uint_33x128
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.single_layer.d24_unorm_s8_uint_separate_layouts_depth_33x128
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.single_layer.d24_unorm_s8_uint_separate_layouts_stencil_33x128
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.single_layer.d32_sfloat_s8_uint_33x128
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.single_layer.d32_sfloat_s8_uint_separate_layouts_depth_33x128
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.single_layer.d32_sfloat_s8_uint_separate_layouts_stencil_33x128
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.multiple_layers.d16_unorm
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.multiple_layers.x8_d24_unorm_pack32
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.multiple_layers.d32_sfloat
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.multiple_layers.s8_uint
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.multiple_layers.d16_unorm_s8_uint
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.multiple_layers.d16_unorm_s8_uint_separate_layouts_depth
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.multiple_layers.d16_unorm_s8_uint_separate_layouts_stencil
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.multiple_layers.d24_unorm_s8_uint
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.multiple_layers.d24_unorm_s8_uint_separate_layouts_depth
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.multiple_layers.d24_unorm_s8_uint_separate_layouts_stencil
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.multiple_layers.d32_sfloat_s8_uint
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.multiple_layers.d32_sfloat_s8_uint_separate_layouts_depth
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.multiple_layers.d32_sfloat_s8_uint_separate_layouts_stencil
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.multiple_layers.d16_unorm_200x180
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.multiple_layers.x8_d24_unorm_pack32_200x180
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.multiple_layers.d32_sfloat_200x180
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.multiple_layers.s8_uint_200x180
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.multiple_layers.d16_unorm_s8_uint_200x180
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.multiple_layers.d16_unorm_s8_uint_separate_layouts_depth_200x180
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.multiple_layers.d16_unorm_s8_uint_separate_layouts_stencil_200x180
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.multiple_layers.d24_unorm_s8_uint_200x180
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.multiple_layers.d24_unorm_s8_uint_separate_layouts_depth_200x180
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.multiple_layers.d24_unorm_s8_uint_separate_layouts_stencil_200x180
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.multiple_layers.d32_sfloat_s8_uint_200x180
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.multiple_layers.d32_sfloat_s8_uint_separate_layouts_depth_200x180
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.multiple_layers.d32_sfloat_s8_uint_separate_layouts_stencil_200x180
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.multiple_layers.d16_unorm_1x33
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.multiple_layers.x8_d24_unorm_pack32_1x33
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.multiple_layers.d32_sfloat_1x33
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.multiple_layers.s8_uint_1x33
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.multiple_layers.d16_unorm_s8_uint_1x33
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.multiple_layers.d16_unorm_s8_uint_separate_layouts_depth_1x33
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.multiple_layers.d16_unorm_s8_uint_separate_layouts_stencil_1x33
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.multiple_layers.d24_unorm_s8_uint_1x33
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.multiple_layers.d24_unorm_s8_uint_separate_layouts_depth_1x33
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.multiple_layers.d24_unorm_s8_uint_separate_layouts_stencil_1x33
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.multiple_layers.d32_sfloat_s8_uint_1x33
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.multiple_layers.d32_sfloat_s8_uint_separate_layouts_depth_1x33
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.multiple_layers.d32_sfloat_s8_uint_separate_layouts_stencil_1x33
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.multiple_layers.d16_unorm_64x11
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.multiple_layers.x8_d24_unorm_pack32_64x11
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.multiple_layers.d32_sfloat_64x11
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.multiple_layers.s8_uint_64x11
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.multiple_layers.d16_unorm_s8_uint_64x11
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.multiple_layers.d16_unorm_s8_uint_separate_layouts_depth_64x11
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.multiple_layers.d16_unorm_s8_uint_separate_layouts_stencil_64x11
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.multiple_layers.d24_unorm_s8_uint_64x11
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.multiple_layers.d24_unorm_s8_uint_separate_layouts_depth_64x11
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.multiple_layers.d24_unorm_s8_uint_separate_layouts_stencil_64x11
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.multiple_layers.d32_sfloat_s8_uint_64x11
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.multiple_layers.d32_sfloat_s8_uint_separate_layouts_depth_64x11
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.multiple_layers.d32_sfloat_s8_uint_separate_layouts_stencil_64x11
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.multiple_layers.d16_unorm_33x128
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.multiple_layers.x8_d24_unorm_pack32_33x128
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.multiple_layers.d32_sfloat_33x128
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.multiple_layers.s8_uint_33x128
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.multiple_layers.d16_unorm_s8_uint_33x128
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.multiple_layers.d16_unorm_s8_uint_separate_layouts_depth_33x128
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.multiple_layers.d16_unorm_s8_uint_separate_layouts_stencil_33x128
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.multiple_layers.d24_unorm_s8_uint_33x128
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.multiple_layers.d24_unorm_s8_uint_separate_layouts_depth_33x128
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.multiple_layers.d24_unorm_s8_uint_separate_layouts_stencil_33x128
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.multiple_layers.d32_sfloat_s8_uint_33x128
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.multiple_layers.d32_sfloat_s8_uint_separate_layouts_depth_33x128
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.multiple_layers.d32_sfloat_s8_uint_separate_layouts_stencil_33x128
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.cube_layers.d16_unorm
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.cube_layers.x8_d24_unorm_pack32
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.cube_layers.d32_sfloat
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.cube_layers.s8_uint
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.cube_layers.d16_unorm_s8_uint
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.cube_layers.d16_unorm_s8_uint_separate_layouts_depth
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.cube_layers.d16_unorm_s8_uint_separate_layouts_stencil
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.cube_layers.d24_unorm_s8_uint
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.cube_layers.d24_unorm_s8_uint_separate_layouts_depth
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.cube_layers.d24_unorm_s8_uint_separate_layouts_stencil
 dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.cube_layers.d32_sfloat_s8_uint
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.cube_layers.d32_sfloat_s8_uint_separate_layouts_depth
+dEQP-VK.api.image_clearing.dedicated_allocation.clear_depth_stencil_attachment.cube_layers.d32_sfloat_s8_uint_separate_layouts_stencil
 dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.single_layer.d16_unorm
 dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.single_layer.x8_d24_unorm_pack32
 dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.single_layer.d32_sfloat
 dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.single_layer.s8_uint
 dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.single_layer.d16_unorm_s8_uint
+dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.single_layer.d16_unorm_s8_uint_separate_layouts_depth
+dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.single_layer.d16_unorm_s8_uint_separate_layouts_stencil
 dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.single_layer.d24_unorm_s8_uint
+dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.single_layer.d24_unorm_s8_uint_separate_layouts_depth
+dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.single_layer.d24_unorm_s8_uint_separate_layouts_stencil
 dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.single_layer.d32_sfloat_s8_uint
+dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.single_layer.d32_sfloat_s8_uint_separate_layouts_depth
+dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.single_layer.d32_sfloat_s8_uint_separate_layouts_stencil
 dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.single_layer.d16_unorm_200x180
 dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.single_layer.x8_d24_unorm_pack32_200x180
 dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.single_layer.d32_sfloat_200x180
 dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.single_layer.s8_uint_200x180
 dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.single_layer.d16_unorm_s8_uint_200x180
+dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.single_layer.d16_unorm_s8_uint_separate_layouts_depth_200x180
+dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.single_layer.d16_unorm_s8_uint_separate_layouts_stencil_200x180
 dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.single_layer.d24_unorm_s8_uint_200x180
+dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.single_layer.d24_unorm_s8_uint_separate_layouts_depth_200x180
+dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.single_layer.d24_unorm_s8_uint_separate_layouts_stencil_200x180
 dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.single_layer.d32_sfloat_s8_uint_200x180
+dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.single_layer.d32_sfloat_s8_uint_separate_layouts_depth_200x180
+dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.single_layer.d32_sfloat_s8_uint_separate_layouts_stencil_200x180
 dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.single_layer.d16_unorm_64x11
 dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.single_layer.x8_d24_unorm_pack32_64x11
 dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.single_layer.d32_sfloat_64x11
 dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.single_layer.s8_uint_64x11
 dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.single_layer.d16_unorm_s8_uint_64x11
+dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.single_layer.d16_unorm_s8_uint_separate_layouts_depth_64x11
+dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.single_layer.d16_unorm_s8_uint_separate_layouts_stencil_64x11
 dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.single_layer.d24_unorm_s8_uint_64x11
+dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.single_layer.d24_unorm_s8_uint_separate_layouts_depth_64x11
+dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.single_layer.d24_unorm_s8_uint_separate_layouts_stencil_64x11
 dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.single_layer.d32_sfloat_s8_uint_64x11
+dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.single_layer.d32_sfloat_s8_uint_separate_layouts_depth_64x11
+dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.single_layer.d32_sfloat_s8_uint_separate_layouts_stencil_64x11
 dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.single_layer.d16_unorm_33x128
 dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.single_layer.x8_d24_unorm_pack32_33x128
 dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.single_layer.d32_sfloat_33x128
 dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.single_layer.s8_uint_33x128
 dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.single_layer.d16_unorm_s8_uint_33x128
+dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.single_layer.d16_unorm_s8_uint_separate_layouts_depth_33x128
+dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.single_layer.d16_unorm_s8_uint_separate_layouts_stencil_33x128
 dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.single_layer.d24_unorm_s8_uint_33x128
+dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.single_layer.d24_unorm_s8_uint_separate_layouts_depth_33x128
+dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.single_layer.d24_unorm_s8_uint_separate_layouts_stencil_33x128
 dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.single_layer.d32_sfloat_s8_uint_33x128
+dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.single_layer.d32_sfloat_s8_uint_separate_layouts_depth_33x128
+dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.single_layer.d32_sfloat_s8_uint_separate_layouts_stencil_33x128
 dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.multiple_layers.d16_unorm
 dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.multiple_layers.x8_d24_unorm_pack32
 dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.multiple_layers.d32_sfloat
 dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.multiple_layers.s8_uint
 dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.multiple_layers.d16_unorm_s8_uint
+dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.multiple_layers.d16_unorm_s8_uint_separate_layouts_depth
+dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.multiple_layers.d16_unorm_s8_uint_separate_layouts_stencil
 dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.multiple_layers.d24_unorm_s8_uint
+dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.multiple_layers.d24_unorm_s8_uint_separate_layouts_depth
+dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.multiple_layers.d24_unorm_s8_uint_separate_layouts_stencil
 dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.multiple_layers.d32_sfloat_s8_uint
+dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.multiple_layers.d32_sfloat_s8_uint_separate_layouts_depth
+dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.multiple_layers.d32_sfloat_s8_uint_separate_layouts_stencil
 dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.multiple_layers.d16_unorm_200x180
 dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.multiple_layers.x8_d24_unorm_pack32_200x180
 dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.multiple_layers.d32_sfloat_200x180
 dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.multiple_layers.s8_uint_200x180
 dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.multiple_layers.d16_unorm_s8_uint_200x180
+dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.multiple_layers.d16_unorm_s8_uint_separate_layouts_depth_200x180
+dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.multiple_layers.d16_unorm_s8_uint_separate_layouts_stencil_200x180
 dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.multiple_layers.d24_unorm_s8_uint_200x180
+dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.multiple_layers.d24_unorm_s8_uint_separate_layouts_depth_200x180
+dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.multiple_layers.d24_unorm_s8_uint_separate_layouts_stencil_200x180
 dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.multiple_layers.d32_sfloat_s8_uint_200x180
+dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.multiple_layers.d32_sfloat_s8_uint_separate_layouts_depth_200x180
+dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.multiple_layers.d32_sfloat_s8_uint_separate_layouts_stencil_200x180
 dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.multiple_layers.d16_unorm_64x11
 dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.multiple_layers.x8_d24_unorm_pack32_64x11
 dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.multiple_layers.d32_sfloat_64x11
 dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.multiple_layers.s8_uint_64x11
 dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.multiple_layers.d16_unorm_s8_uint_64x11
+dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.multiple_layers.d16_unorm_s8_uint_separate_layouts_depth_64x11
+dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.multiple_layers.d16_unorm_s8_uint_separate_layouts_stencil_64x11
 dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.multiple_layers.d24_unorm_s8_uint_64x11
+dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.multiple_layers.d24_unorm_s8_uint_separate_layouts_depth_64x11
+dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.multiple_layers.d24_unorm_s8_uint_separate_layouts_stencil_64x11
 dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.multiple_layers.d32_sfloat_s8_uint_64x11
+dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.multiple_layers.d32_sfloat_s8_uint_separate_layouts_depth_64x11
+dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.multiple_layers.d32_sfloat_s8_uint_separate_layouts_stencil_64x11
 dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.multiple_layers.d16_unorm_33x128
 dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.multiple_layers.x8_d24_unorm_pack32_33x128
 dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.multiple_layers.d32_sfloat_33x128
 dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.multiple_layers.s8_uint_33x128
 dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.multiple_layers.d16_unorm_s8_uint_33x128
+dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.multiple_layers.d16_unorm_s8_uint_separate_layouts_depth_33x128
+dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.multiple_layers.d16_unorm_s8_uint_separate_layouts_stencil_33x128
 dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.multiple_layers.d24_unorm_s8_uint_33x128
+dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.multiple_layers.d24_unorm_s8_uint_separate_layouts_depth_33x128
+dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.multiple_layers.d24_unorm_s8_uint_separate_layouts_stencil_33x128
 dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.multiple_layers.d32_sfloat_s8_uint_33x128
+dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.multiple_layers.d32_sfloat_s8_uint_separate_layouts_depth_33x128
+dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.multiple_layers.d32_sfloat_s8_uint_separate_layouts_stencil_33x128
 dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.cube_layers.d16_unorm
 dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.cube_layers.x8_d24_unorm_pack32
 dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.cube_layers.d32_sfloat
 dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.cube_layers.s8_uint
 dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.cube_layers.d16_unorm_s8_uint
+dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.cube_layers.d16_unorm_s8_uint_separate_layouts_depth
+dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.cube_layers.d16_unorm_s8_uint_separate_layouts_stencil
 dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.cube_layers.d24_unorm_s8_uint
+dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.cube_layers.d24_unorm_s8_uint_separate_layouts_depth
+dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.cube_layers.d24_unorm_s8_uint_separate_layouts_stencil
 dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.cube_layers.d32_sfloat_s8_uint
+dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.cube_layers.d32_sfloat_s8_uint_separate_layouts_depth
+dEQP-VK.api.image_clearing.dedicated_allocation.partial_clear_depth_stencil_attachment.cube_layers.d32_sfloat_s8_uint_separate_layouts_stencil
 dEQP-VK.api.fill_and_update_buffer.suballocation.fill_buffer_whole
 dEQP-VK.api.fill_and_update_buffer.suballocation.update_buffer_whole
 dEQP-VK.api.fill_and_update_buffer.suballocation.fill_buffer_first_one
@@ -118239,6 +118767,4102 @@ dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_decw.dfa
 dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_decw.dfail_decw.comp_not_equal
 dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_decw.dfail_decw.comp_greater_or_equal
 dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_decw.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decw.comp_always
 dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_keep.dfail_keep.comp_never
 dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_keep.dfail_keep.comp_less
 dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_keep.dfail_keep.comp_equal
@@ -122335,6 +126959,4102 @@ dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_decw.dfa
 dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_decw.dfail_decw.comp_not_equal
 dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_decw.dfail_decw.comp_greater_or_equal
 dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_decw.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decw.comp_always
 dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_keep.dfail_keep.comp_never
 dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_keep.dfail_keep.comp_less
 dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_keep.dfail_keep.comp_equal
@@ -126431,6 +135151,4102 @@ dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_decw.df
 dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_decw.dfail_decw.comp_not_equal
 dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_decw.dfail_decw.comp_greater_or_equal
 dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_decw.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decw.comp_always
 dEQP-VK.pipeline.stencil.nocolor.format.s8_uint.states.fail_keep.pass_keep.dfail_keep.comp_never
 dEQP-VK.pipeline.stencil.nocolor.format.s8_uint.states.fail_keep.pass_keep.dfail_keep.comp_less
 dEQP-VK.pipeline.stencil.nocolor.format.s8_uint.states.fail_keep.pass_keep.dfail_keep.comp_equal
@@ -134623,6 +147439,4102 @@ dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint.states.fail_decw.pass_
 dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint.states.fail_decw.pass_decw.dfail_decw.comp_not_equal
 dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint.states.fail_decw.pass_decw.dfail_decw.comp_greater_or_equal
 dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint.states.fail_decw.pass_decw.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d16_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decw.comp_always
 dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint.states.fail_keep.pass_keep.dfail_keep.comp_never
 dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint.states.fail_keep.pass_keep.dfail_keep.comp_less
 dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint.states.fail_keep.pass_keep.dfail_keep.comp_equal
@@ -138719,6 +155631,4102 @@ dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint.states.fail_decw.pass_
 dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint.states.fail_decw.pass_decw.dfail_decw.comp_not_equal
 dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint.states.fail_decw.pass_decw.dfail_decw.comp_greater_or_equal
 dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint.states.fail_decw.pass_decw.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d24_unorm_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decw.comp_always
 dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint.states.fail_keep.pass_keep.dfail_keep.comp_never
 dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint.states.fail_keep.pass_keep.dfail_keep.comp_less
 dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint.states.fail_keep.pass_keep.dfail_keep.comp_equal
@@ -142815,6 +163823,4102 @@ dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint.states.fail_decw.pass
 dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint.states.fail_decw.pass_decw.dfail_decw.comp_not_equal
 dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint.states.fail_decw.pass_decw.dfail_decw.comp_greater_or_equal
 dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint.states.fail_decw.pass_decw.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_keep.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_zero.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_repl.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_incc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_inv.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_wrap.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_keep.pass_decw.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_keep.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_zero.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_repl.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_incc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_inv.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_wrap.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_zero.pass_decw.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_keep.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_zero.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_repl.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_incc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_inv.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_wrap.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_repl.pass_decw.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_keep.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_zero.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_repl.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_incc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_inv.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_wrap.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_incc.pass_decw.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_keep.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_zero.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_repl.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_incc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_inv.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_wrap.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decc.pass_decw.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_keep.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_zero.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_repl.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_incc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_inv.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_wrap.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_inv.pass_decw.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_keep.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_zero.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_repl.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_incc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_inv.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_wrap.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_wrap.pass_decw.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_keep.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_zero.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_repl.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_incc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_inv.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_wrap.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.nocolor.format.d32_sfloat_s8_uint_separate_layouts.states.fail_decw.pass_decw.dfail_decw.comp_always
 dEQP-VK.pipeline.blend.format.r4g4_unorm_pack8.states.color_dc_sas_rsub_alpha_1mdc_1msc_sub-color_1msa_1msc_add_alpha_ca_da_min-color_1msc_da_sub_alpha_1mca_ca_sub-color_o_1mda_max_alpha_sa_dc_min
 dEQP-VK.pipeline.blend.format.r4g4_unorm_pack8.states.color_sas_1mda_rsub_alpha_1mda_1mcc_sub-color_1mda_1mca_min_alpha_o_cc_min-color_1mdc_da_min_alpha_1mda_da_min-color_sas_1msa_max_alpha_sas_o_min
 dEQP-VK.pipeline.blend.format.r4g4_unorm_pack8.states.color_ca_1mcc_rsub_alpha_sa_1msc_rsub-color_1mca_ca_rsub_alpha_1msc_da_rsub-color_1mcc_1mdc_sub_alpha_z_da_sub-color_sc_dc_add_alpha_1mdc_1msa_min
@@ -147118,6 +172222,156 @@ dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint.compare_ops.not_equal_less_or_eq
 dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint.compare_ops.not_equal_less_or_equal_not_equal_greater_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint.compare_ops.never_zerodepthbounds_depthdisabled_stencilenabled
 dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint.depth_test_disabled.depth_write_enabled
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.not_equal_not_equal_not_equal_not_equal
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.not_equal_not_equal_not_equal_not_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.not_equal_equal_equal_greater
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.not_equal_equal_equal_greater_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.not_equal_greater_greater_less_or_equal
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.not_equal_greater_greater_less_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.not_equal_greater_or_equal_greater_or_equal_greater_or_equal
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.not_equal_greater_or_equal_greater_or_equal_greater_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.not_equal_less_or_equal_less_or_equal_always
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.not_equal_less_or_equal_less_or_equal_always_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.not_equal_less_less_less
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.not_equal_less_less_less_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.not_equal_never_never_never
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.not_equal_never_never_never_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.equal_not_equal_equal_equal
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.equal_not_equal_equal_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.equal_equal_not_equal_less
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.equal_equal_not_equal_less_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.equal_greater_greater_or_equal_not_equal
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.equal_greater_greater_or_equal_not_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.equal_greater_or_equal_greater_greater
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.equal_greater_or_equal_greater_greater_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.equal_less_or_equal_less_less_or_equal
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.equal_less_or_equal_less_less_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.not_equal_always_always_equal
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.not_equal_always_always_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.equal_less_never_always
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.equal_less_never_always_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.equal_never_less_or_equal_greater_or_equal
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.equal_never_less_or_equal_greater_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.greater_not_equal_greater_less
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.greater_not_equal_greater_less_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.greater_equal_greater_or_equal_always
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.greater_equal_greater_or_equal_always_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.greater_greater_not_equal_greater
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.greater_greater_not_equal_greater_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.greater_greater_or_equal_less_or_equal_not_equal
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.greater_greater_or_equal_less_or_equal_not_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.greater_less_or_equal_never_greater_or_equal
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.greater_less_or_equal_never_greater_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.greater_less_equal_never
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.greater_less_equal_never_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.greater_or_equal_not_equal_greater_or_equal_greater
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.greater_or_equal_not_equal_greater_or_equal_greater_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.greater_never_always_less_or_equal
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.greater_never_always_less_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.greater_or_equal_equal_greater_not_equal
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.greater_or_equal_equal_greater_not_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.greater_or_equal_greater_equal_greater_or_equal
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.greater_or_equal_greater_equal_greater_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.greater_or_equal_greater_or_equal_not_equal_less_or_equal
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.greater_or_equal_greater_or_equal_not_equal_less_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.greater_or_equal_less_or_equal_always_less
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.greater_or_equal_less_or_equal_always_less_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.greater_or_equal_less_less_or_equal_equal
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.greater_or_equal_less_less_or_equal_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.greater_or_equal_always_less_never
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.greater_or_equal_always_less_never_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.less_or_equal_not_equal_less_or_equal_less_or_equal
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.less_or_equal_not_equal_less_or_equal_less_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.less_or_equal_equal_less_equal
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.less_or_equal_equal_less_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.less_or_equal_greater_never_less
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.less_or_equal_greater_never_less_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.less_or_equal_greater_or_equal_equal_always
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.less_or_equal_greater_or_equal_equal_always_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.less_or_equal_less_not_equal_greater_or_equal
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.less_or_equal_less_not_equal_greater_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.less_or_equal_less_or_equal_greater_or_equal_never
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.less_or_equal_less_or_equal_greater_or_equal_never_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.less_not_equal_less_greater_or_equal
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.less_not_equal_less_greater_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.less_equal_never_less_or_equal
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.less_equal_never_less_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.less_greater_less_or_equal_never
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.less_greater_less_or_equal_never_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.less_less_or_equal_greater_equal
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.less_less_or_equal_greater_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.less_less_always_not_equal
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.less_less_always_not_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.less_never_not_equal_always
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.less_never_not_equal_always_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.never_not_equal_always_always
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.never_not_equal_always_always_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.less_always_greater_or_equal_less
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.less_always_greater_or_equal_less_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.never_greater_or_equal_never_equal
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.never_greater_or_equal_never_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.never_never_less_greater
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.never_never_less_greater_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.never_less_or_equal_equal_not_equal
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.never_less_or_equal_equal_not_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.never_less_greater_or_equal_less_or_equal
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.never_less_greater_or_equal_less_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.never_always_greater_greater_or_equal
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.never_always_greater_greater_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.always_equal_always_never
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.always_equal_always_never_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.always_never_equal_less
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.always_never_equal_less_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.always_greater_less_always
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.always_greater_less_always_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.always_always_never_greater
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.always_always_never_greater_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.always_less_or_equal_not_equal_equal
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.always_less_or_equal_not_equal_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.less_or_equal_never_greater_not_equal
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.less_or_equal_never_greater_not_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.never_equal_less_or_equal_less
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.never_equal_less_or_equal_less_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.equal_greater_or_equal_always_never
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.equal_greater_or_equal_always_never_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.greater_always_less_not_equal
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.greater_always_less_not_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.greater_never_greater_or_equal_equal
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.greater_never_greater_or_equal_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.equal_always_equal_less_or_equal
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.equal_always_equal_less_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.less_or_equal_greater_always_greater
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.less_or_equal_greater_always_greater_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.never_not_equal_not_equal_never
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.never_not_equal_not_equal_never_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.always_less_greater_greater
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.always_less_greater_greater_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.always_not_equal_never_not_equal
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.always_not_equal_never_not_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.greater_or_equal_always_not_equal_always
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.greater_or_equal_always_not_equal_always_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.less_or_equal_always_less_or_equal_greater
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.less_or_equal_always_less_or_equal_greater_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.less_greater_or_equal_less_greater
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.less_greater_or_equal_less_greater_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.always_equal_less_or_equal_greater_or_equal
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.always_equal_less_or_equal_greater_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.always_greater_or_equal_greater_or_equal_less_or_equal
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.always_greater_or_equal_greater_or_equal_less_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.greater_or_equal_greater_or_equal_never_less
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.greater_or_equal_greater_or_equal_never_less_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.greater_or_equal_never_greater_never
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.greater_or_equal_never_greater_never_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.less_greater_equal_equal
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.less_greater_equal_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.never_greater_always_greater_or_equal
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.never_greater_always_greater_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.not_equal_not_equal_greater_always
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.not_equal_not_equal_greater_always_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.not_equal_less_or_equal_not_equal_greater
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.not_equal_less_or_equal_not_equal_greater_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.compare_ops.never_zerodepthbounds_depthdisabled_stencilenabled
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint_separate_layouts.depth_test_disabled.depth_write_enabled
 dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint.compare_ops.not_equal_not_equal_not_equal_not_equal
 dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint.compare_ops.not_equal_not_equal_not_equal_not_equal_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint.compare_ops.not_equal_equal_equal_greater
@@ -147268,6 +172522,156 @@ dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint.compare_ops.not_equal_less_or_eq
 dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint.compare_ops.not_equal_less_or_equal_not_equal_greater_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint.compare_ops.never_zerodepthbounds_depthdisabled_stencilenabled
 dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint.depth_test_disabled.depth_write_enabled
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.not_equal_not_equal_not_equal_not_equal
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.not_equal_not_equal_not_equal_not_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.not_equal_equal_equal_greater
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.not_equal_equal_equal_greater_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.not_equal_greater_greater_less_or_equal
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.not_equal_greater_greater_less_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.not_equal_greater_or_equal_greater_or_equal_greater_or_equal
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.not_equal_greater_or_equal_greater_or_equal_greater_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.not_equal_less_or_equal_less_or_equal_always
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.not_equal_less_or_equal_less_or_equal_always_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.not_equal_less_less_less
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.not_equal_less_less_less_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.not_equal_never_never_never
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.not_equal_never_never_never_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.equal_not_equal_equal_equal
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.equal_not_equal_equal_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.equal_equal_not_equal_less
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.equal_equal_not_equal_less_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.equal_greater_greater_or_equal_not_equal
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.equal_greater_greater_or_equal_not_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.equal_greater_or_equal_greater_greater
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.equal_greater_or_equal_greater_greater_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.equal_less_or_equal_less_less_or_equal
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.equal_less_or_equal_less_less_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.not_equal_always_always_equal
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.not_equal_always_always_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.equal_less_never_always
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.equal_less_never_always_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.equal_never_less_or_equal_greater_or_equal
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.equal_never_less_or_equal_greater_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.greater_not_equal_greater_less
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.greater_not_equal_greater_less_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.greater_equal_greater_or_equal_always
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.greater_equal_greater_or_equal_always_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.greater_greater_not_equal_greater
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.greater_greater_not_equal_greater_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.greater_greater_or_equal_less_or_equal_not_equal
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.greater_greater_or_equal_less_or_equal_not_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.greater_less_or_equal_never_greater_or_equal
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.greater_less_or_equal_never_greater_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.greater_less_equal_never
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.greater_less_equal_never_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.greater_or_equal_not_equal_greater_or_equal_greater
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.greater_or_equal_not_equal_greater_or_equal_greater_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.greater_never_always_less_or_equal
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.greater_never_always_less_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.greater_or_equal_equal_greater_not_equal
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.greater_or_equal_equal_greater_not_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.greater_or_equal_greater_equal_greater_or_equal
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.greater_or_equal_greater_equal_greater_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.greater_or_equal_greater_or_equal_not_equal_less_or_equal
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.greater_or_equal_greater_or_equal_not_equal_less_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.greater_or_equal_less_or_equal_always_less
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.greater_or_equal_less_or_equal_always_less_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.greater_or_equal_less_less_or_equal_equal
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.greater_or_equal_less_less_or_equal_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.greater_or_equal_always_less_never
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.greater_or_equal_always_less_never_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.less_or_equal_not_equal_less_or_equal_less_or_equal
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.less_or_equal_not_equal_less_or_equal_less_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.less_or_equal_equal_less_equal
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.less_or_equal_equal_less_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.less_or_equal_greater_never_less
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.less_or_equal_greater_never_less_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.less_or_equal_greater_or_equal_equal_always
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.less_or_equal_greater_or_equal_equal_always_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.less_or_equal_less_not_equal_greater_or_equal
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.less_or_equal_less_not_equal_greater_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.less_or_equal_less_or_equal_greater_or_equal_never
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.less_or_equal_less_or_equal_greater_or_equal_never_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.less_not_equal_less_greater_or_equal
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.less_not_equal_less_greater_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.less_equal_never_less_or_equal
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.less_equal_never_less_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.less_greater_less_or_equal_never
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.less_greater_less_or_equal_never_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.less_less_or_equal_greater_equal
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.less_less_or_equal_greater_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.less_less_always_not_equal
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.less_less_always_not_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.less_never_not_equal_always
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.less_never_not_equal_always_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.never_not_equal_always_always
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.never_not_equal_always_always_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.less_always_greater_or_equal_less
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.less_always_greater_or_equal_less_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.never_greater_or_equal_never_equal
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.never_greater_or_equal_never_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.never_never_less_greater
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.never_never_less_greater_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.never_less_or_equal_equal_not_equal
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.never_less_or_equal_equal_not_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.never_less_greater_or_equal_less_or_equal
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.never_less_greater_or_equal_less_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.never_always_greater_greater_or_equal
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.never_always_greater_greater_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.always_equal_always_never
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.always_equal_always_never_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.always_never_equal_less
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.always_never_equal_less_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.always_greater_less_always
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.always_greater_less_always_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.always_always_never_greater
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.always_always_never_greater_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.always_less_or_equal_not_equal_equal
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.always_less_or_equal_not_equal_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.less_or_equal_never_greater_not_equal
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.less_or_equal_never_greater_not_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.never_equal_less_or_equal_less
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.never_equal_less_or_equal_less_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.equal_greater_or_equal_always_never
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.equal_greater_or_equal_always_never_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.greater_always_less_not_equal
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.greater_always_less_not_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.greater_never_greater_or_equal_equal
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.greater_never_greater_or_equal_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.equal_always_equal_less_or_equal
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.equal_always_equal_less_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.less_or_equal_greater_always_greater
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.less_or_equal_greater_always_greater_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.never_not_equal_not_equal_never
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.never_not_equal_not_equal_never_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.always_less_greater_greater
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.always_less_greater_greater_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.always_not_equal_never_not_equal
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.always_not_equal_never_not_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.greater_or_equal_always_not_equal_always
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.greater_or_equal_always_not_equal_always_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.less_or_equal_always_less_or_equal_greater
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.less_or_equal_always_less_or_equal_greater_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.less_greater_or_equal_less_greater
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.less_greater_or_equal_less_greater_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.always_equal_less_or_equal_greater_or_equal
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.always_equal_less_or_equal_greater_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.always_greater_or_equal_greater_or_equal_less_or_equal
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.always_greater_or_equal_greater_or_equal_less_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.greater_or_equal_greater_or_equal_never_less
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.greater_or_equal_greater_or_equal_never_less_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.greater_or_equal_never_greater_never
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.greater_or_equal_never_greater_never_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.less_greater_equal_equal
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.less_greater_equal_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.never_greater_always_greater_or_equal
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.never_greater_always_greater_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.not_equal_not_equal_greater_always
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.not_equal_not_equal_greater_always_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.not_equal_less_or_equal_not_equal_greater
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.not_equal_less_or_equal_not_equal_greater_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.compare_ops.never_zerodepthbounds_depthdisabled_stencilenabled
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint_separate_layouts.depth_test_disabled.depth_write_enabled
 dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint.compare_ops.not_equal_not_equal_not_equal_not_equal
 dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint.compare_ops.not_equal_not_equal_not_equal_not_equal_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint.compare_ops.not_equal_equal_equal_greater
@@ -147418,6 +172822,156 @@ dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint.compare_ops.not_equal_less_or_e
 dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint.compare_ops.not_equal_less_or_equal_not_equal_greater_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint.compare_ops.never_zerodepthbounds_depthdisabled_stencilenabled
 dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint.depth_test_disabled.depth_write_enabled
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.not_equal_not_equal_not_equal_not_equal
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.not_equal_not_equal_not_equal_not_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.not_equal_equal_equal_greater
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.not_equal_equal_equal_greater_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.not_equal_greater_greater_less_or_equal
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.not_equal_greater_greater_less_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.not_equal_greater_or_equal_greater_or_equal_greater_or_equal
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.not_equal_greater_or_equal_greater_or_equal_greater_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.not_equal_less_or_equal_less_or_equal_always
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.not_equal_less_or_equal_less_or_equal_always_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.not_equal_less_less_less
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.not_equal_less_less_less_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.not_equal_never_never_never
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.not_equal_never_never_never_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.equal_not_equal_equal_equal
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.equal_not_equal_equal_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.equal_equal_not_equal_less
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.equal_equal_not_equal_less_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.equal_greater_greater_or_equal_not_equal
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.equal_greater_greater_or_equal_not_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.equal_greater_or_equal_greater_greater
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.equal_greater_or_equal_greater_greater_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.equal_less_or_equal_less_less_or_equal
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.equal_less_or_equal_less_less_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.not_equal_always_always_equal
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.not_equal_always_always_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.equal_less_never_always
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.equal_less_never_always_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.equal_never_less_or_equal_greater_or_equal
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.equal_never_less_or_equal_greater_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.greater_not_equal_greater_less
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.greater_not_equal_greater_less_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.greater_equal_greater_or_equal_always
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.greater_equal_greater_or_equal_always_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.greater_greater_not_equal_greater
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.greater_greater_not_equal_greater_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.greater_greater_or_equal_less_or_equal_not_equal
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.greater_greater_or_equal_less_or_equal_not_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.greater_less_or_equal_never_greater_or_equal
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.greater_less_or_equal_never_greater_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.greater_less_equal_never
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.greater_less_equal_never_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.greater_or_equal_not_equal_greater_or_equal_greater
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.greater_or_equal_not_equal_greater_or_equal_greater_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.greater_never_always_less_or_equal
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.greater_never_always_less_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.greater_or_equal_equal_greater_not_equal
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.greater_or_equal_equal_greater_not_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.greater_or_equal_greater_equal_greater_or_equal
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.greater_or_equal_greater_equal_greater_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.greater_or_equal_greater_or_equal_not_equal_less_or_equal
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.greater_or_equal_greater_or_equal_not_equal_less_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.greater_or_equal_less_or_equal_always_less
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.greater_or_equal_less_or_equal_always_less_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.greater_or_equal_less_less_or_equal_equal
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.greater_or_equal_less_less_or_equal_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.greater_or_equal_always_less_never
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.greater_or_equal_always_less_never_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.less_or_equal_not_equal_less_or_equal_less_or_equal
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.less_or_equal_not_equal_less_or_equal_less_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.less_or_equal_equal_less_equal
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.less_or_equal_equal_less_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.less_or_equal_greater_never_less
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.less_or_equal_greater_never_less_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.less_or_equal_greater_or_equal_equal_always
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.less_or_equal_greater_or_equal_equal_always_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.less_or_equal_less_not_equal_greater_or_equal
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.less_or_equal_less_not_equal_greater_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.less_or_equal_less_or_equal_greater_or_equal_never
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.less_or_equal_less_or_equal_greater_or_equal_never_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.less_not_equal_less_greater_or_equal
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.less_not_equal_less_greater_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.less_equal_never_less_or_equal
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.less_equal_never_less_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.less_greater_less_or_equal_never
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.less_greater_less_or_equal_never_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.less_less_or_equal_greater_equal
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.less_less_or_equal_greater_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.less_less_always_not_equal
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.less_less_always_not_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.less_never_not_equal_always
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.less_never_not_equal_always_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.never_not_equal_always_always
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.never_not_equal_always_always_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.less_always_greater_or_equal_less
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.less_always_greater_or_equal_less_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.never_greater_or_equal_never_equal
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.never_greater_or_equal_never_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.never_never_less_greater
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.never_never_less_greater_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.never_less_or_equal_equal_not_equal
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.never_less_or_equal_equal_not_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.never_less_greater_or_equal_less_or_equal
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.never_less_greater_or_equal_less_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.never_always_greater_greater_or_equal
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.never_always_greater_greater_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.always_equal_always_never
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.always_equal_always_never_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.always_never_equal_less
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.always_never_equal_less_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.always_greater_less_always
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.always_greater_less_always_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.always_always_never_greater
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.always_always_never_greater_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.always_less_or_equal_not_equal_equal
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.always_less_or_equal_not_equal_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.less_or_equal_never_greater_not_equal
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.less_or_equal_never_greater_not_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.never_equal_less_or_equal_less
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.never_equal_less_or_equal_less_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.equal_greater_or_equal_always_never
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.equal_greater_or_equal_always_never_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.greater_always_less_not_equal
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.greater_always_less_not_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.greater_never_greater_or_equal_equal
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.greater_never_greater_or_equal_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.equal_always_equal_less_or_equal
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.equal_always_equal_less_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.less_or_equal_greater_always_greater
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.less_or_equal_greater_always_greater_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.never_not_equal_not_equal_never
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.never_not_equal_not_equal_never_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.always_less_greater_greater
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.always_less_greater_greater_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.always_not_equal_never_not_equal
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.always_not_equal_never_not_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.greater_or_equal_always_not_equal_always
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.greater_or_equal_always_not_equal_always_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.less_or_equal_always_less_or_equal_greater
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.less_or_equal_always_less_or_equal_greater_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.less_greater_or_equal_less_greater
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.less_greater_or_equal_less_greater_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.always_equal_less_or_equal_greater_or_equal
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.always_equal_less_or_equal_greater_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.always_greater_or_equal_greater_or_equal_less_or_equal
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.always_greater_or_equal_greater_or_equal_less_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.greater_or_equal_greater_or_equal_never_less
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.greater_or_equal_greater_or_equal_never_less_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.greater_or_equal_never_greater_never
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.greater_or_equal_never_greater_never_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.less_greater_equal_equal
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.less_greater_equal_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.never_greater_always_greater_or_equal
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.never_greater_always_greater_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.not_equal_not_equal_greater_always
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.not_equal_not_equal_greater_always_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.not_equal_less_or_equal_not_equal_greater
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.not_equal_less_or_equal_not_equal_greater_depth_bounds_test
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.never_zerodepthbounds_depthdisabled_stencilenabled
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint_separate_layouts.depth_test_disabled.depth_write_enabled
 dEQP-VK.pipeline.depth.nocolor.format.d16_unorm.compare_ops.not_equal_not_equal_not_equal_not_equal
 dEQP-VK.pipeline.depth.nocolor.format.d16_unorm.compare_ops.not_equal_not_equal_not_equal_not_equal_depth_bounds_test
 dEQP-VK.pipeline.depth.nocolor.format.d16_unorm.compare_ops.not_equal_equal_equal_greater
@@ -148018,6 +173572,156 @@ dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint.compare_ops.not_equal_le
 dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint.compare_ops.not_equal_less_or_equal_not_equal_greater_depth_bounds_test
 dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint.compare_ops.never_zerodepthbounds_depthdisabled_stencilenabled
 dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint.depth_test_disabled.depth_write_enabled
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.not_equal_not_equal_not_equal_not_equal
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.not_equal_not_equal_not_equal_not_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.not_equal_equal_equal_greater
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.not_equal_equal_equal_greater_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.not_equal_greater_greater_less_or_equal
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.not_equal_greater_greater_less_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.not_equal_greater_or_equal_greater_or_equal_greater_or_equal
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.not_equal_greater_or_equal_greater_or_equal_greater_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.not_equal_less_or_equal_less_or_equal_always
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.not_equal_less_or_equal_less_or_equal_always_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.not_equal_less_less_less
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.not_equal_less_less_less_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.not_equal_never_never_never
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.not_equal_never_never_never_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.equal_not_equal_equal_equal
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.equal_not_equal_equal_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.equal_equal_not_equal_less
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.equal_equal_not_equal_less_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.equal_greater_greater_or_equal_not_equal
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.equal_greater_greater_or_equal_not_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.equal_greater_or_equal_greater_greater
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.equal_greater_or_equal_greater_greater_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.equal_less_or_equal_less_less_or_equal
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.equal_less_or_equal_less_less_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.not_equal_always_always_equal
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.not_equal_always_always_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.equal_less_never_always
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.equal_less_never_always_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.equal_never_less_or_equal_greater_or_equal
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.equal_never_less_or_equal_greater_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.greater_not_equal_greater_less
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.greater_not_equal_greater_less_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.greater_equal_greater_or_equal_always
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.greater_equal_greater_or_equal_always_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.greater_greater_not_equal_greater
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.greater_greater_not_equal_greater_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.greater_greater_or_equal_less_or_equal_not_equal
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.greater_greater_or_equal_less_or_equal_not_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.greater_less_or_equal_never_greater_or_equal
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.greater_less_or_equal_never_greater_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.greater_less_equal_never
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.greater_less_equal_never_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.greater_or_equal_not_equal_greater_or_equal_greater
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.greater_or_equal_not_equal_greater_or_equal_greater_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.greater_never_always_less_or_equal
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.greater_never_always_less_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.greater_or_equal_equal_greater_not_equal
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.greater_or_equal_equal_greater_not_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.greater_or_equal_greater_equal_greater_or_equal
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.greater_or_equal_greater_equal_greater_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.greater_or_equal_greater_or_equal_not_equal_less_or_equal
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.greater_or_equal_greater_or_equal_not_equal_less_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.greater_or_equal_less_or_equal_always_less
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.greater_or_equal_less_or_equal_always_less_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.greater_or_equal_less_less_or_equal_equal
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.greater_or_equal_less_less_or_equal_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.greater_or_equal_always_less_never
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.greater_or_equal_always_less_never_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.less_or_equal_not_equal_less_or_equal_less_or_equal
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.less_or_equal_not_equal_less_or_equal_less_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.less_or_equal_equal_less_equal
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.less_or_equal_equal_less_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.less_or_equal_greater_never_less
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.less_or_equal_greater_never_less_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.less_or_equal_greater_or_equal_equal_always
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.less_or_equal_greater_or_equal_equal_always_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.less_or_equal_less_not_equal_greater_or_equal
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.less_or_equal_less_not_equal_greater_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.less_or_equal_less_or_equal_greater_or_equal_never
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.less_or_equal_less_or_equal_greater_or_equal_never_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.less_not_equal_less_greater_or_equal
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.less_not_equal_less_greater_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.less_equal_never_less_or_equal
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.less_equal_never_less_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.less_greater_less_or_equal_never
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.less_greater_less_or_equal_never_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.less_less_or_equal_greater_equal
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.less_less_or_equal_greater_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.less_less_always_not_equal
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.less_less_always_not_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.less_never_not_equal_always
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.less_never_not_equal_always_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.never_not_equal_always_always
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.never_not_equal_always_always_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.less_always_greater_or_equal_less
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.less_always_greater_or_equal_less_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.never_greater_or_equal_never_equal
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.never_greater_or_equal_never_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.never_never_less_greater
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.never_never_less_greater_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.never_less_or_equal_equal_not_equal
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.never_less_or_equal_equal_not_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.never_less_greater_or_equal_less_or_equal
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.never_less_greater_or_equal_less_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.never_always_greater_greater_or_equal
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.never_always_greater_greater_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.always_equal_always_never
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.always_equal_always_never_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.always_never_equal_less
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.always_never_equal_less_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.always_greater_less_always
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.always_greater_less_always_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.always_always_never_greater
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.always_always_never_greater_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.always_less_or_equal_not_equal_equal
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.always_less_or_equal_not_equal_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.less_or_equal_never_greater_not_equal
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.less_or_equal_never_greater_not_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.never_equal_less_or_equal_less
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.never_equal_less_or_equal_less_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.equal_greater_or_equal_always_never
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.equal_greater_or_equal_always_never_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.greater_always_less_not_equal
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.greater_always_less_not_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.greater_never_greater_or_equal_equal
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.greater_never_greater_or_equal_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.equal_always_equal_less_or_equal
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.equal_always_equal_less_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.less_or_equal_greater_always_greater
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.less_or_equal_greater_always_greater_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.never_not_equal_not_equal_never
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.never_not_equal_not_equal_never_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.always_less_greater_greater
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.always_less_greater_greater_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.always_not_equal_never_not_equal
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.always_not_equal_never_not_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.greater_or_equal_always_not_equal_always
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.greater_or_equal_always_not_equal_always_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.less_or_equal_always_less_or_equal_greater
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.less_or_equal_always_less_or_equal_greater_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.less_greater_or_equal_less_greater
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.less_greater_or_equal_less_greater_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.always_equal_less_or_equal_greater_or_equal
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.always_equal_less_or_equal_greater_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.always_greater_or_equal_greater_or_equal_less_or_equal
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.always_greater_or_equal_greater_or_equal_less_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.greater_or_equal_greater_or_equal_never_less
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.greater_or_equal_greater_or_equal_never_less_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.greater_or_equal_never_greater_never
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.greater_or_equal_never_greater_never_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.less_greater_equal_equal
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.less_greater_equal_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.never_greater_always_greater_or_equal
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.never_greater_always_greater_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.not_equal_not_equal_greater_always
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.not_equal_not_equal_greater_always_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.not_equal_less_or_equal_not_equal_greater
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.not_equal_less_or_equal_not_equal_greater_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.compare_ops.never_zerodepthbounds_depthdisabled_stencilenabled
+dEQP-VK.pipeline.depth.nocolor.format.d16_unorm_s8_uint_separate_layouts.depth_test_disabled.depth_write_enabled
 dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint.compare_ops.not_equal_not_equal_not_equal_not_equal
 dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint.compare_ops.not_equal_not_equal_not_equal_not_equal_depth_bounds_test
 dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint.compare_ops.not_equal_equal_equal_greater
@@ -148168,6 +173872,156 @@ dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint.compare_ops.not_equal_le
 dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint.compare_ops.not_equal_less_or_equal_not_equal_greater_depth_bounds_test
 dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint.compare_ops.never_zerodepthbounds_depthdisabled_stencilenabled
 dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint.depth_test_disabled.depth_write_enabled
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.not_equal_not_equal_not_equal_not_equal
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.not_equal_not_equal_not_equal_not_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.not_equal_equal_equal_greater
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.not_equal_equal_equal_greater_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.not_equal_greater_greater_less_or_equal
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.not_equal_greater_greater_less_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.not_equal_greater_or_equal_greater_or_equal_greater_or_equal
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.not_equal_greater_or_equal_greater_or_equal_greater_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.not_equal_less_or_equal_less_or_equal_always
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.not_equal_less_or_equal_less_or_equal_always_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.not_equal_less_less_less
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.not_equal_less_less_less_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.not_equal_never_never_never
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.not_equal_never_never_never_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.equal_not_equal_equal_equal
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.equal_not_equal_equal_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.equal_equal_not_equal_less
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.equal_equal_not_equal_less_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.equal_greater_greater_or_equal_not_equal
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.equal_greater_greater_or_equal_not_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.equal_greater_or_equal_greater_greater
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.equal_greater_or_equal_greater_greater_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.equal_less_or_equal_less_less_or_equal
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.equal_less_or_equal_less_less_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.not_equal_always_always_equal
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.not_equal_always_always_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.equal_less_never_always
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.equal_less_never_always_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.equal_never_less_or_equal_greater_or_equal
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.equal_never_less_or_equal_greater_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.greater_not_equal_greater_less
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.greater_not_equal_greater_less_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.greater_equal_greater_or_equal_always
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.greater_equal_greater_or_equal_always_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.greater_greater_not_equal_greater
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.greater_greater_not_equal_greater_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.greater_greater_or_equal_less_or_equal_not_equal
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.greater_greater_or_equal_less_or_equal_not_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.greater_less_or_equal_never_greater_or_equal
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.greater_less_or_equal_never_greater_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.greater_less_equal_never
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.greater_less_equal_never_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.greater_or_equal_not_equal_greater_or_equal_greater
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.greater_or_equal_not_equal_greater_or_equal_greater_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.greater_never_always_less_or_equal
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.greater_never_always_less_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.greater_or_equal_equal_greater_not_equal
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.greater_or_equal_equal_greater_not_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.greater_or_equal_greater_equal_greater_or_equal
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.greater_or_equal_greater_equal_greater_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.greater_or_equal_greater_or_equal_not_equal_less_or_equal
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.greater_or_equal_greater_or_equal_not_equal_less_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.greater_or_equal_less_or_equal_always_less
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.greater_or_equal_less_or_equal_always_less_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.greater_or_equal_less_less_or_equal_equal
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.greater_or_equal_less_less_or_equal_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.greater_or_equal_always_less_never
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.greater_or_equal_always_less_never_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.less_or_equal_not_equal_less_or_equal_less_or_equal
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.less_or_equal_not_equal_less_or_equal_less_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.less_or_equal_equal_less_equal
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.less_or_equal_equal_less_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.less_or_equal_greater_never_less
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.less_or_equal_greater_never_less_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.less_or_equal_greater_or_equal_equal_always
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.less_or_equal_greater_or_equal_equal_always_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.less_or_equal_less_not_equal_greater_or_equal
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.less_or_equal_less_not_equal_greater_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.less_or_equal_less_or_equal_greater_or_equal_never
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.less_or_equal_less_or_equal_greater_or_equal_never_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.less_not_equal_less_greater_or_equal
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.less_not_equal_less_greater_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.less_equal_never_less_or_equal
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.less_equal_never_less_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.less_greater_less_or_equal_never
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.less_greater_less_or_equal_never_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.less_less_or_equal_greater_equal
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.less_less_or_equal_greater_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.less_less_always_not_equal
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.less_less_always_not_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.less_never_not_equal_always
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.less_never_not_equal_always_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.never_not_equal_always_always
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.never_not_equal_always_always_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.less_always_greater_or_equal_less
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.less_always_greater_or_equal_less_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.never_greater_or_equal_never_equal
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.never_greater_or_equal_never_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.never_never_less_greater
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.never_never_less_greater_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.never_less_or_equal_equal_not_equal
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.never_less_or_equal_equal_not_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.never_less_greater_or_equal_less_or_equal
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.never_less_greater_or_equal_less_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.never_always_greater_greater_or_equal
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.never_always_greater_greater_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.always_equal_always_never
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.always_equal_always_never_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.always_never_equal_less
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.always_never_equal_less_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.always_greater_less_always
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.always_greater_less_always_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.always_always_never_greater
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.always_always_never_greater_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.always_less_or_equal_not_equal_equal
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.always_less_or_equal_not_equal_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.less_or_equal_never_greater_not_equal
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.less_or_equal_never_greater_not_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.never_equal_less_or_equal_less
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.never_equal_less_or_equal_less_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.equal_greater_or_equal_always_never
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.equal_greater_or_equal_always_never_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.greater_always_less_not_equal
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.greater_always_less_not_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.greater_never_greater_or_equal_equal
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.greater_never_greater_or_equal_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.equal_always_equal_less_or_equal
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.equal_always_equal_less_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.less_or_equal_greater_always_greater
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.less_or_equal_greater_always_greater_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.never_not_equal_not_equal_never
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.never_not_equal_not_equal_never_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.always_less_greater_greater
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.always_less_greater_greater_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.always_not_equal_never_not_equal
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.always_not_equal_never_not_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.greater_or_equal_always_not_equal_always
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.greater_or_equal_always_not_equal_always_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.less_or_equal_always_less_or_equal_greater
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.less_or_equal_always_less_or_equal_greater_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.less_greater_or_equal_less_greater
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.less_greater_or_equal_less_greater_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.always_equal_less_or_equal_greater_or_equal
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.always_equal_less_or_equal_greater_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.always_greater_or_equal_greater_or_equal_less_or_equal
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.always_greater_or_equal_greater_or_equal_less_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.greater_or_equal_greater_or_equal_never_less
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.greater_or_equal_greater_or_equal_never_less_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.greater_or_equal_never_greater_never
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.greater_or_equal_never_greater_never_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.less_greater_equal_equal
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.less_greater_equal_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.never_greater_always_greater_or_equal
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.never_greater_always_greater_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.not_equal_not_equal_greater_always
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.not_equal_not_equal_greater_always_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.not_equal_less_or_equal_not_equal_greater
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.not_equal_less_or_equal_not_equal_greater_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.compare_ops.never_zerodepthbounds_depthdisabled_stencilenabled
+dEQP-VK.pipeline.depth.nocolor.format.d24_unorm_s8_uint_separate_layouts.depth_test_disabled.depth_write_enabled
 dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint.compare_ops.not_equal_not_equal_not_equal_not_equal
 dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint.compare_ops.not_equal_not_equal_not_equal_not_equal_depth_bounds_test
 dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint.compare_ops.not_equal_equal_equal_greater
@@ -148318,6 +174172,156 @@ dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint.compare_ops.not_equal_l
 dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint.compare_ops.not_equal_less_or_equal_not_equal_greater_depth_bounds_test
 dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint.compare_ops.never_zerodepthbounds_depthdisabled_stencilenabled
 dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint.depth_test_disabled.depth_write_enabled
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.not_equal_not_equal_not_equal_not_equal
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.not_equal_not_equal_not_equal_not_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.not_equal_equal_equal_greater
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.not_equal_equal_equal_greater_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.not_equal_greater_greater_less_or_equal
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.not_equal_greater_greater_less_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.not_equal_greater_or_equal_greater_or_equal_greater_or_equal
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.not_equal_greater_or_equal_greater_or_equal_greater_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.not_equal_less_or_equal_less_or_equal_always
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.not_equal_less_or_equal_less_or_equal_always_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.not_equal_less_less_less
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.not_equal_less_less_less_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.not_equal_never_never_never
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.not_equal_never_never_never_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.equal_not_equal_equal_equal
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.equal_not_equal_equal_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.equal_equal_not_equal_less
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.equal_equal_not_equal_less_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.equal_greater_greater_or_equal_not_equal
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.equal_greater_greater_or_equal_not_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.equal_greater_or_equal_greater_greater
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.equal_greater_or_equal_greater_greater_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.equal_less_or_equal_less_less_or_equal
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.equal_less_or_equal_less_less_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.not_equal_always_always_equal
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.not_equal_always_always_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.equal_less_never_always
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.equal_less_never_always_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.equal_never_less_or_equal_greater_or_equal
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.equal_never_less_or_equal_greater_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.greater_not_equal_greater_less
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.greater_not_equal_greater_less_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.greater_equal_greater_or_equal_always
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.greater_equal_greater_or_equal_always_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.greater_greater_not_equal_greater
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.greater_greater_not_equal_greater_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.greater_greater_or_equal_less_or_equal_not_equal
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.greater_greater_or_equal_less_or_equal_not_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.greater_less_or_equal_never_greater_or_equal
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.greater_less_or_equal_never_greater_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.greater_less_equal_never
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.greater_less_equal_never_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.greater_or_equal_not_equal_greater_or_equal_greater
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.greater_or_equal_not_equal_greater_or_equal_greater_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.greater_never_always_less_or_equal
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.greater_never_always_less_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.greater_or_equal_equal_greater_not_equal
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.greater_or_equal_equal_greater_not_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.greater_or_equal_greater_equal_greater_or_equal
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.greater_or_equal_greater_equal_greater_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.greater_or_equal_greater_or_equal_not_equal_less_or_equal
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.greater_or_equal_greater_or_equal_not_equal_less_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.greater_or_equal_less_or_equal_always_less
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.greater_or_equal_less_or_equal_always_less_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.greater_or_equal_less_less_or_equal_equal
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.greater_or_equal_less_less_or_equal_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.greater_or_equal_always_less_never
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.greater_or_equal_always_less_never_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.less_or_equal_not_equal_less_or_equal_less_or_equal
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.less_or_equal_not_equal_less_or_equal_less_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.less_or_equal_equal_less_equal
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.less_or_equal_equal_less_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.less_or_equal_greater_never_less
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.less_or_equal_greater_never_less_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.less_or_equal_greater_or_equal_equal_always
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.less_or_equal_greater_or_equal_equal_always_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.less_or_equal_less_not_equal_greater_or_equal
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.less_or_equal_less_not_equal_greater_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.less_or_equal_less_or_equal_greater_or_equal_never
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.less_or_equal_less_or_equal_greater_or_equal_never_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.less_not_equal_less_greater_or_equal
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.less_not_equal_less_greater_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.less_equal_never_less_or_equal
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.less_equal_never_less_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.less_greater_less_or_equal_never
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.less_greater_less_or_equal_never_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.less_less_or_equal_greater_equal
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.less_less_or_equal_greater_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.less_less_always_not_equal
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.less_less_always_not_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.less_never_not_equal_always
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.less_never_not_equal_always_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.never_not_equal_always_always
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.never_not_equal_always_always_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.less_always_greater_or_equal_less
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.less_always_greater_or_equal_less_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.never_greater_or_equal_never_equal
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.never_greater_or_equal_never_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.never_never_less_greater
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.never_never_less_greater_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.never_less_or_equal_equal_not_equal
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.never_less_or_equal_equal_not_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.never_less_greater_or_equal_less_or_equal
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.never_less_greater_or_equal_less_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.never_always_greater_greater_or_equal
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.never_always_greater_greater_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.always_equal_always_never
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.always_equal_always_never_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.always_never_equal_less
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.always_never_equal_less_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.always_greater_less_always
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.always_greater_less_always_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.always_always_never_greater
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.always_always_never_greater_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.always_less_or_equal_not_equal_equal
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.always_less_or_equal_not_equal_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.less_or_equal_never_greater_not_equal
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.less_or_equal_never_greater_not_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.never_equal_less_or_equal_less
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.never_equal_less_or_equal_less_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.equal_greater_or_equal_always_never
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.equal_greater_or_equal_always_never_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.greater_always_less_not_equal
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.greater_always_less_not_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.greater_never_greater_or_equal_equal
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.greater_never_greater_or_equal_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.equal_always_equal_less_or_equal
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.equal_always_equal_less_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.less_or_equal_greater_always_greater
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.less_or_equal_greater_always_greater_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.never_not_equal_not_equal_never
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.never_not_equal_not_equal_never_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.always_less_greater_greater
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.always_less_greater_greater_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.always_not_equal_never_not_equal
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.always_not_equal_never_not_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.greater_or_equal_always_not_equal_always
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.greater_or_equal_always_not_equal_always_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.less_or_equal_always_less_or_equal_greater
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.less_or_equal_always_less_or_equal_greater_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.less_greater_or_equal_less_greater
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.less_greater_or_equal_less_greater_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.always_equal_less_or_equal_greater_or_equal
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.always_equal_less_or_equal_greater_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.always_greater_or_equal_greater_or_equal_less_or_equal
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.always_greater_or_equal_greater_or_equal_less_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.greater_or_equal_greater_or_equal_never_less
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.greater_or_equal_greater_or_equal_never_less_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.greater_or_equal_never_greater_never
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.greater_or_equal_never_greater_never_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.less_greater_equal_equal
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.less_greater_equal_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.never_greater_always_greater_or_equal
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.never_greater_always_greater_or_equal_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.not_equal_not_equal_greater_always
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.not_equal_not_equal_greater_always_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.not_equal_less_or_equal_not_equal_greater
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.not_equal_less_or_equal_not_equal_greater_depth_bounds_test
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.compare_ops.never_zerodepthbounds_depthdisabled_stencilenabled
+dEQP-VK.pipeline.depth.nocolor.format.d32_sfloat_s8_uint_separate_layouts.depth_test_disabled.depth_write_enabled
 dEQP-VK.pipeline.dynamic_offset.graphics.uniform_buffer.numcmdbuffers_1.sameorder.numdescriptorsetbindings_1.numdynamicbindings_1.numnondynamicbindings_0
 dEQP-VK.pipeline.dynamic_offset.graphics.uniform_buffer.numcmdbuffers_1.sameorder.numdescriptorsetbindings_1.numdynamicbindings_1.numnondynamicbindings_1
 dEQP-VK.pipeline.dynamic_offset.graphics.uniform_buffer.numcmdbuffers_1.sameorder.numdescriptorsetbindings_1.numdynamicbindings_2.numnondynamicbindings_0
@@ -334843,6 +360847,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d16_unorm_s8_
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d16_unorm_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d16_unorm_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d16_unorm_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d24_unorm_s8_uint.depth_none_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d24_unorm_s8_uint.depth_none_stencil_zero_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d24_unorm_s8_uint.depth_none_stencil_min_testing_depth
@@ -334881,6 +360923,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d24_unorm_s8_
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d24_unorm_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d24_unorm_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d24_unorm_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d32_sfloat_s8_uint.depth_none_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d32_sfloat_s8_uint.depth_none_stencil_zero_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d32_sfloat_s8_uint.depth_none_stencil_min_testing_depth
@@ -334919,6 +360999,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d32_sfloat_s8
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d32_sfloat_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d32_sfloat_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d32_sfloat_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d16_unorm.depth_zero_stencil_none_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d16_unorm.depth_zero_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d16_unorm.depth_average_stencil_none_testing_depth
@@ -334984,6 +361102,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d16_unorm_s8_
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d16_unorm_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d16_unorm_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d16_unorm_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d24_unorm_s8_uint.depth_none_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d24_unorm_s8_uint.depth_none_stencil_zero_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d24_unorm_s8_uint.depth_none_stencil_min_testing_depth
@@ -335022,6 +361178,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d24_unorm_s8_
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d24_unorm_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d24_unorm_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d24_unorm_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d32_sfloat_s8_uint.depth_none_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d32_sfloat_s8_uint.depth_none_stencil_zero_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d32_sfloat_s8_uint.depth_none_stencil_min_testing_depth
@@ -335060,6 +361254,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d32_sfloat_s8
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d32_sfloat_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d32_sfloat_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d32_sfloat_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d16_unorm.depth_zero_stencil_none_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d16_unorm.depth_zero_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d16_unorm.depth_average_stencil_none_testing_depth
@@ -335125,6 +361357,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d16_unorm_s8_
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d16_unorm_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d16_unorm_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d16_unorm_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d24_unorm_s8_uint.depth_none_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d24_unorm_s8_uint.depth_none_stencil_zero_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d24_unorm_s8_uint.depth_none_stencil_min_testing_depth
@@ -335163,6 +361433,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d24_unorm_s8_
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d24_unorm_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d24_unorm_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d24_unorm_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d32_sfloat_s8_uint.depth_none_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d32_sfloat_s8_uint.depth_none_stencil_zero_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d32_sfloat_s8_uint.depth_none_stencil_min_testing_depth
@@ -335201,6 +361509,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d32_sfloat_s8
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d32_sfloat_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d32_sfloat_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d32_sfloat_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d16_unorm.depth_zero_stencil_none_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d16_unorm.depth_zero_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d16_unorm.depth_average_stencil_none_testing_depth
@@ -335266,6 +361612,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d16_unorm_s8
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d16_unorm_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d16_unorm_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d16_unorm_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d24_unorm_s8_uint.depth_none_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d24_unorm_s8_uint.depth_none_stencil_zero_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d24_unorm_s8_uint.depth_none_stencil_min_testing_depth
@@ -335304,6 +361688,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d24_unorm_s8
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d24_unorm_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d24_unorm_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d24_unorm_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d32_sfloat_s8_uint.depth_none_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d32_sfloat_s8_uint.depth_none_stencil_zero_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d32_sfloat_s8_uint.depth_none_stencil_min_testing_depth
@@ -335342,6 +361764,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d32_sfloat_s
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d32_sfloat_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d32_sfloat_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d32_sfloat_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d16_unorm.depth_zero_stencil_none_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d16_unorm.depth_zero_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d16_unorm.depth_average_stencil_none_testing_depth
@@ -335407,6 +361867,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d16_unorm_s8
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d16_unorm_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d16_unorm_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d16_unorm_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d24_unorm_s8_uint.depth_none_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d24_unorm_s8_uint.depth_none_stencil_zero_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d24_unorm_s8_uint.depth_none_stencil_min_testing_depth
@@ -335445,6 +361943,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d24_unorm_s8
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d24_unorm_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d24_unorm_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d24_unorm_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d32_sfloat_s8_uint.depth_none_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d32_sfloat_s8_uint.depth_none_stencil_zero_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d32_sfloat_s8_uint.depth_none_stencil_min_testing_depth
@@ -335483,6 +362019,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d32_sfloat_s
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d32_sfloat_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d32_sfloat_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d32_sfloat_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d16_unorm.depth_zero_stencil_none_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d16_unorm.depth_zero_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d16_unorm.depth_average_stencil_none_testing_depth
@@ -335548,6 +362122,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d16_unorm_s8
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d16_unorm_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d16_unorm_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d16_unorm_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d24_unorm_s8_uint.depth_none_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d24_unorm_s8_uint.depth_none_stencil_zero_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d24_unorm_s8_uint.depth_none_stencil_min_testing_depth
@@ -335586,6 +362198,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d24_unorm_s8
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d24_unorm_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d24_unorm_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d24_unorm_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d32_sfloat_s8_uint.depth_none_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d32_sfloat_s8_uint.depth_none_stencil_zero_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d32_sfloat_s8_uint.depth_none_stencil_min_testing_depth
@@ -335624,6 +362274,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d32_sfloat_s
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d32_sfloat_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d32_sfloat_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d32_sfloat_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d16_unorm.depth_zero_stencil_none_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d16_unorm.depth_zero_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d16_unorm.depth_average_stencil_none_testing_depth
@@ -335689,6 +362377,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d16_unorm_s8_u
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d16_unorm_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d16_unorm_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d16_unorm_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d24_unorm_s8_uint.depth_none_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d24_unorm_s8_uint.depth_none_stencil_zero_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d24_unorm_s8_uint.depth_none_stencil_min_testing_depth
@@ -335727,6 +362453,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d24_unorm_s8_u
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d24_unorm_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d24_unorm_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d24_unorm_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d32_sfloat_s8_uint.depth_none_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d32_sfloat_s8_uint.depth_none_stencil_zero_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d32_sfloat_s8_uint.depth_none_stencil_min_testing_depth
@@ -335765,6 +362529,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d32_sfloat_s8_
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d32_sfloat_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d32_sfloat_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d32_sfloat_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d16_unorm.depth_zero_stencil_none_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d16_unorm.depth_zero_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d16_unorm.depth_average_stencil_none_testing_depth
@@ -335830,6 +362632,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d16_unorm_s8_u
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d16_unorm_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d16_unorm_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d16_unorm_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d24_unorm_s8_uint.depth_none_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d24_unorm_s8_uint.depth_none_stencil_zero_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d24_unorm_s8_uint.depth_none_stencil_min_testing_depth
@@ -335868,6 +362708,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d24_unorm_s8_u
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d24_unorm_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d24_unorm_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d24_unorm_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d32_sfloat_s8_uint.depth_none_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d32_sfloat_s8_uint.depth_none_stencil_zero_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d32_sfloat_s8_uint.depth_none_stencil_min_testing_depth
@@ -335906,6 +362784,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d32_sfloat_s8_
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d32_sfloat_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d32_sfloat_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d32_sfloat_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d16_unorm.depth_zero_stencil_none_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d16_unorm.depth_zero_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d16_unorm.depth_average_stencil_none_testing_depth
@@ -335971,6 +362887,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d16_unorm_s8_u
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d16_unorm_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d16_unorm_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d16_unorm_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d24_unorm_s8_uint.depth_none_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d24_unorm_s8_uint.depth_none_stencil_zero_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d24_unorm_s8_uint.depth_none_stencil_min_testing_depth
@@ -336009,6 +362963,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d24_unorm_s8_u
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d24_unorm_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d24_unorm_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d24_unorm_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d32_sfloat_s8_uint.depth_none_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d32_sfloat_s8_uint.depth_none_stencil_zero_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d32_sfloat_s8_uint.depth_none_stencil_min_testing_depth
@@ -336047,6 +363039,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d32_sfloat_s8_
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d32_sfloat_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d32_sfloat_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d32_sfloat_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d16_unorm.depth_zero_stencil_none_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d16_unorm.depth_zero_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d16_unorm.depth_average_stencil_none_testing_depth
@@ -336112,6 +363142,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d16_unorm_s8_
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d16_unorm_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d16_unorm_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d16_unorm_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d24_unorm_s8_uint.depth_none_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d24_unorm_s8_uint.depth_none_stencil_zero_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d24_unorm_s8_uint.depth_none_stencil_min_testing_depth
@@ -336150,6 +363218,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d24_unorm_s8_
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d24_unorm_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d24_unorm_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d24_unorm_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d32_sfloat_s8_uint.depth_none_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d32_sfloat_s8_uint.depth_none_stencil_zero_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d32_sfloat_s8_uint.depth_none_stencil_min_testing_depth
@@ -336188,6 +363294,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d32_sfloat_s8
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d32_sfloat_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d32_sfloat_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d32_sfloat_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d16_unorm.depth_zero_stencil_none_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d16_unorm.depth_zero_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d16_unorm.depth_average_stencil_none_testing_depth
@@ -336253,6 +363397,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d16_unorm_s8_
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d16_unorm_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d16_unorm_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d16_unorm_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d24_unorm_s8_uint.depth_none_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d24_unorm_s8_uint.depth_none_stencil_zero_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d24_unorm_s8_uint.depth_none_stencil_min_testing_depth
@@ -336291,6 +363473,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d24_unorm_s8_
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d24_unorm_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d24_unorm_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d24_unorm_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d32_sfloat_s8_uint.depth_none_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d32_sfloat_s8_uint.depth_none_stencil_zero_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d32_sfloat_s8_uint.depth_none_stencil_min_testing_depth
@@ -336329,6 +363549,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d32_sfloat_s8
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d32_sfloat_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d32_sfloat_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d32_sfloat_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d16_unorm.depth_zero_stencil_none_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d16_unorm.depth_zero_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d16_unorm.depth_average_stencil_none_testing_depth
@@ -336394,6 +363652,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d16_unorm_s8_
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d16_unorm_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d16_unorm_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d16_unorm_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d24_unorm_s8_uint.depth_none_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d24_unorm_s8_uint.depth_none_stencil_zero_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d24_unorm_s8_uint.depth_none_stencil_min_testing_depth
@@ -336432,6 +363728,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d24_unorm_s8_
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d24_unorm_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d24_unorm_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d24_unorm_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d32_sfloat_s8_uint.depth_none_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d32_sfloat_s8_uint.depth_none_stencil_zero_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d32_sfloat_s8_uint.depth_none_stencil_min_testing_depth
@@ -336470,6 +363804,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d32_sfloat_s8
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d32_sfloat_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d32_sfloat_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d32_sfloat_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_8_32.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d16_unorm.depth_zero_stencil_none_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d16_unorm.depth_zero_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d16_unorm.depth_average_stencil_none_testing_depth
@@ -336535,6 +363907,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d16_unorm_s8_
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d16_unorm_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d16_unorm_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d16_unorm_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d24_unorm_s8_uint.depth_none_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d24_unorm_s8_uint.depth_none_stencil_zero_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d24_unorm_s8_uint.depth_none_stencil_min_testing_depth
@@ -336573,6 +363983,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d24_unorm_s8_
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d24_unorm_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d24_unorm_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d24_unorm_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d32_sfloat_s8_uint.depth_none_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d32_sfloat_s8_uint.depth_none_stencil_zero_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d32_sfloat_s8_uint.depth_none_stencil_min_testing_depth
@@ -336611,6 +364059,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d32_sfloat_s8
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d32_sfloat_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d32_sfloat_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d32_sfloat_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d16_unorm.depth_zero_stencil_none_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d16_unorm.depth_zero_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d16_unorm.depth_average_stencil_none_testing_depth
@@ -336676,6 +364162,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d16_unorm_s8_
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d16_unorm_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d16_unorm_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d16_unorm_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d24_unorm_s8_uint.depth_none_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d24_unorm_s8_uint.depth_none_stencil_zero_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d24_unorm_s8_uint.depth_none_stencil_min_testing_depth
@@ -336714,6 +364238,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d24_unorm_s8_
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d24_unorm_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d24_unorm_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d24_unorm_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d32_sfloat_s8_uint.depth_none_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d32_sfloat_s8_uint.depth_none_stencil_zero_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d32_sfloat_s8_uint.depth_none_stencil_min_testing_depth
@@ -336752,6 +364314,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d32_sfloat_s8
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d32_sfloat_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d32_sfloat_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d32_sfloat_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d16_unorm.depth_zero_stencil_none_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d16_unorm.depth_zero_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d16_unorm.depth_average_stencil_none_testing_depth
@@ -336817,6 +364417,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d16_unorm_s8_
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d16_unorm_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d16_unorm_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d16_unorm_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d24_unorm_s8_uint.depth_none_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d24_unorm_s8_uint.depth_none_stencil_zero_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d24_unorm_s8_uint.depth_none_stencil_min_testing_depth
@@ -336855,6 +364493,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d24_unorm_s8_
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d24_unorm_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d24_unorm_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d24_unorm_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d32_sfloat_s8_uint.depth_none_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d32_sfloat_s8_uint.depth_none_stencil_zero_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d32_sfloat_s8_uint.depth_none_stencil_min_testing_depth
@@ -336893,6 +364569,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d32_sfloat_s8
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d32_sfloat_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d32_sfloat_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d32_sfloat_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d16_unorm.depth_zero_stencil_none_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d16_unorm.depth_zero_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d16_unorm.depth_average_stencil_none_testing_depth
@@ -336958,6 +364672,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d16_unorm_s8
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d16_unorm_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d16_unorm_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d16_unorm_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d24_unorm_s8_uint.depth_none_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d24_unorm_s8_uint.depth_none_stencil_zero_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d24_unorm_s8_uint.depth_none_stencil_min_testing_depth
@@ -336996,6 +364748,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d24_unorm_s8
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d24_unorm_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d24_unorm_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d24_unorm_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d32_sfloat_s8_uint.depth_none_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d32_sfloat_s8_uint.depth_none_stencil_zero_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d32_sfloat_s8_uint.depth_none_stencil_min_testing_depth
@@ -337034,6 +364824,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d32_sfloat_s
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d32_sfloat_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d32_sfloat_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d32_sfloat_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d16_unorm.depth_zero_stencil_none_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d16_unorm.depth_zero_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d16_unorm.depth_average_stencil_none_testing_depth
@@ -337099,6 +364927,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d16_unorm_s8
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d16_unorm_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d16_unorm_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d16_unorm_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d24_unorm_s8_uint.depth_none_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d24_unorm_s8_uint.depth_none_stencil_zero_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d24_unorm_s8_uint.depth_none_stencil_min_testing_depth
@@ -337137,6 +365003,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d24_unorm_s8
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d24_unorm_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d24_unorm_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d24_unorm_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d32_sfloat_s8_uint.depth_none_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d32_sfloat_s8_uint.depth_none_stencil_zero_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d32_sfloat_s8_uint.depth_none_stencil_min_testing_depth
@@ -337175,6 +365079,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d32_sfloat_s
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d32_sfloat_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d32_sfloat_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d32_sfloat_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d16_unorm.depth_zero_stencil_none_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d16_unorm.depth_zero_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d16_unorm.depth_average_stencil_none_testing_depth
@@ -337240,6 +365182,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d16_unorm_s8
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d16_unorm_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d16_unorm_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d16_unorm_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d24_unorm_s8_uint.depth_none_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d24_unorm_s8_uint.depth_none_stencil_zero_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d24_unorm_s8_uint.depth_none_stencil_min_testing_depth
@@ -337278,6 +365258,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d24_unorm_s8
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d24_unorm_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d24_unorm_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d24_unorm_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d32_sfloat_s8_uint.depth_none_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d32_sfloat_s8_uint.depth_none_stencil_zero_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d32_sfloat_s8_uint.depth_none_stencil_min_testing_depth
@@ -337316,6 +365334,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d32_sfloat_s
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d32_sfloat_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d32_sfloat_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d32_sfloat_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_49_13.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d16_unorm.depth_zero_stencil_none_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d16_unorm.depth_zero_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d16_unorm.depth_average_stencil_none_testing_depth
@@ -337381,6 +365437,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d16_unorm_s8_ui
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d16_unorm_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d16_unorm_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d16_unorm_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d24_unorm_s8_uint.depth_none_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d24_unorm_s8_uint.depth_none_stencil_zero_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d24_unorm_s8_uint.depth_none_stencil_min_testing_depth
@@ -337419,6 +365513,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d24_unorm_s8_ui
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d24_unorm_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d24_unorm_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d24_unorm_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d32_sfloat_s8_uint.depth_none_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d32_sfloat_s8_uint.depth_none_stencil_zero_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d32_sfloat_s8_uint.depth_none_stencil_min_testing_depth
@@ -337457,6 +365589,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d32_sfloat_s8_u
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d32_sfloat_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d32_sfloat_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d32_sfloat_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d16_unorm.depth_zero_stencil_none_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d16_unorm.depth_zero_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d16_unorm.depth_average_stencil_none_testing_depth
@@ -337522,6 +365692,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d16_unorm_s8_ui
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d16_unorm_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d16_unorm_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d16_unorm_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d24_unorm_s8_uint.depth_none_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d24_unorm_s8_uint.depth_none_stencil_zero_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d24_unorm_s8_uint.depth_none_stencil_min_testing_depth
@@ -337560,6 +365768,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d24_unorm_s8_ui
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d24_unorm_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d24_unorm_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d24_unorm_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d32_sfloat_s8_uint.depth_none_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d32_sfloat_s8_uint.depth_none_stencil_zero_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d32_sfloat_s8_uint.depth_none_stencil_min_testing_depth
@@ -337598,6 +365844,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d32_sfloat_s8_u
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d32_sfloat_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d32_sfloat_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d32_sfloat_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d16_unorm.depth_zero_stencil_none_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d16_unorm.depth_zero_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d16_unorm.depth_average_stencil_none_testing_depth
@@ -337663,6 +365947,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d16_unorm_s8_ui
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d16_unorm_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d16_unorm_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d16_unorm_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d24_unorm_s8_uint.depth_none_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d24_unorm_s8_uint.depth_none_stencil_zero_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d24_unorm_s8_uint.depth_none_stencil_min_testing_depth
@@ -337701,6 +366023,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d24_unorm_s8_ui
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d24_unorm_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d24_unorm_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d24_unorm_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d32_sfloat_s8_uint.depth_none_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d32_sfloat_s8_uint.depth_none_stencil_zero_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d32_sfloat_s8_uint.depth_none_stencil_min_testing_depth
@@ -337739,6 +366099,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d32_sfloat_s8_u
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d32_sfloat_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d32_sfloat_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d32_sfloat_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d16_unorm.depth_zero_stencil_none_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d16_unorm.depth_zero_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d16_unorm.depth_average_stencil_none_testing_depth
@@ -337804,6 +366202,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d16_unorm_s8_u
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d16_unorm_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d16_unorm_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d16_unorm_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d24_unorm_s8_uint.depth_none_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d24_unorm_s8_uint.depth_none_stencil_zero_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d24_unorm_s8_uint.depth_none_stencil_min_testing_depth
@@ -337842,6 +366278,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d24_unorm_s8_u
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d24_unorm_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d24_unorm_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d24_unorm_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d32_sfloat_s8_uint.depth_none_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d32_sfloat_s8_uint.depth_none_stencil_zero_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d32_sfloat_s8_uint.depth_none_stencil_min_testing_depth
@@ -337880,6 +366354,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d32_sfloat_s8_
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d32_sfloat_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d32_sfloat_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d32_sfloat_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d16_unorm.depth_zero_stencil_none_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d16_unorm.depth_zero_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d16_unorm.depth_average_stencil_none_testing_depth
@@ -337945,6 +366457,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d16_unorm_s8_u
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d16_unorm_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d16_unorm_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d16_unorm_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d24_unorm_s8_uint.depth_none_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d24_unorm_s8_uint.depth_none_stencil_zero_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d24_unorm_s8_uint.depth_none_stencil_min_testing_depth
@@ -337983,6 +366533,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d24_unorm_s8_u
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d24_unorm_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d24_unorm_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d24_unorm_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d32_sfloat_s8_uint.depth_none_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d32_sfloat_s8_uint.depth_none_stencil_zero_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d32_sfloat_s8_uint.depth_none_stencil_min_testing_depth
@@ -338021,6 +366609,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d32_sfloat_s8_
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d32_sfloat_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d32_sfloat_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d32_sfloat_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d16_unorm.depth_zero_stencil_none_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d16_unorm.depth_zero_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d16_unorm.depth_average_stencil_none_testing_depth
@@ -338086,6 +366712,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d16_unorm_s8_u
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d16_unorm_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d16_unorm_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d16_unorm_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d24_unorm_s8_uint.depth_none_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d24_unorm_s8_uint.depth_none_stencil_zero_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d24_unorm_s8_uint.depth_none_stencil_min_testing_depth
@@ -338124,6 +366788,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d24_unorm_s8_u
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d24_unorm_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d24_unorm_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d24_unorm_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d32_sfloat_s8_uint.depth_none_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d32_sfloat_s8_uint.depth_none_stencil_zero_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d32_sfloat_s8_uint.depth_none_stencil_min_testing_depth
@@ -338162,6 +366864,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d32_sfloat_s8_
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d32_sfloat_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d32_sfloat_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d32_sfloat_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_5_1.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d16_unorm.depth_zero_stencil_none_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d16_unorm.depth_zero_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d16_unorm.depth_average_stencil_none_testing_depth
@@ -338227,6 +366967,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d16_unorm_s8_u
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d16_unorm_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d16_unorm_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d16_unorm_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d24_unorm_s8_uint.depth_none_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d24_unorm_s8_uint.depth_none_stencil_zero_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d24_unorm_s8_uint.depth_none_stencil_min_testing_depth
@@ -338265,6 +367043,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d24_unorm_s8_u
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d24_unorm_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d24_unorm_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d24_unorm_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d32_sfloat_s8_uint.depth_none_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d32_sfloat_s8_uint.depth_none_stencil_zero_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d32_sfloat_s8_uint.depth_none_stencil_min_testing_depth
@@ -338303,6 +367119,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d32_sfloat_s8_
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d32_sfloat_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d32_sfloat_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d32_sfloat_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d16_unorm.depth_zero_stencil_none_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d16_unorm.depth_zero_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d16_unorm.depth_average_stencil_none_testing_depth
@@ -338368,6 +367222,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d16_unorm_s8_u
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d16_unorm_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d16_unorm_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d16_unorm_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d24_unorm_s8_uint.depth_none_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d24_unorm_s8_uint.depth_none_stencil_zero_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d24_unorm_s8_uint.depth_none_stencil_min_testing_depth
@@ -338406,6 +367298,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d24_unorm_s8_u
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d24_unorm_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d24_unorm_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d24_unorm_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d32_sfloat_s8_uint.depth_none_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d32_sfloat_s8_uint.depth_none_stencil_zero_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d32_sfloat_s8_uint.depth_none_stencil_min_testing_depth
@@ -338444,6 +367374,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d32_sfloat_s8_
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d32_sfloat_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d32_sfloat_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d32_sfloat_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d16_unorm.depth_zero_stencil_none_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d16_unorm.depth_zero_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d16_unorm.depth_average_stencil_none_testing_depth
@@ -338509,6 +367477,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d16_unorm_s8_u
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d16_unorm_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d16_unorm_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d16_unorm_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d24_unorm_s8_uint.depth_none_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d24_unorm_s8_uint.depth_none_stencil_zero_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d24_unorm_s8_uint.depth_none_stencil_min_testing_depth
@@ -338547,6 +367553,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d24_unorm_s8_u
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d24_unorm_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d24_unorm_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d24_unorm_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d32_sfloat_s8_uint.depth_none_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d32_sfloat_s8_uint.depth_none_stencil_zero_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d32_sfloat_s8_uint.depth_none_stencil_min_testing_depth
@@ -338585,6 +367629,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d32_sfloat_s8_
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d32_sfloat_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d32_sfloat_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d32_sfloat_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d16_unorm.depth_zero_stencil_none_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d16_unorm.depth_zero_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d16_unorm.depth_average_stencil_none_testing_depth
@@ -338650,6 +367732,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d16_unorm_s8_
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d16_unorm_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d16_unorm_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d16_unorm_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d24_unorm_s8_uint.depth_none_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d24_unorm_s8_uint.depth_none_stencil_zero_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d24_unorm_s8_uint.depth_none_stencil_min_testing_depth
@@ -338688,6 +367808,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d24_unorm_s8_
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d24_unorm_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d24_unorm_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d24_unorm_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d32_sfloat_s8_uint.depth_none_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d32_sfloat_s8_uint.depth_none_stencil_zero_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d32_sfloat_s8_uint.depth_none_stencil_min_testing_depth
@@ -338726,6 +367884,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d32_sfloat_s8
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d32_sfloat_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d32_sfloat_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d32_sfloat_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d16_unorm.depth_zero_stencil_none_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d16_unorm.depth_zero_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d16_unorm.depth_average_stencil_none_testing_depth
@@ -338791,6 +367987,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d16_unorm_s8_
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d16_unorm_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d16_unorm_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d16_unorm_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d24_unorm_s8_uint.depth_none_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d24_unorm_s8_uint.depth_none_stencil_zero_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d24_unorm_s8_uint.depth_none_stencil_min_testing_depth
@@ -338829,6 +368063,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d24_unorm_s8_
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d24_unorm_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d24_unorm_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d24_unorm_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d32_sfloat_s8_uint.depth_none_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d32_sfloat_s8_uint.depth_none_stencil_zero_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d32_sfloat_s8_uint.depth_none_stencil_min_testing_depth
@@ -338867,6 +368139,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d32_sfloat_s8
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d32_sfloat_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d32_sfloat_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d32_sfloat_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d16_unorm.depth_zero_stencil_none_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d16_unorm.depth_zero_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d16_unorm.depth_average_stencil_none_testing_depth
@@ -338932,6 +368242,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d16_unorm_s8_
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d16_unorm_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d16_unorm_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d16_unorm_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d16_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d16_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d16_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d16_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d16_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d24_unorm_s8_uint.depth_none_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d24_unorm_s8_uint.depth_none_stencil_zero_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d24_unorm_s8_uint.depth_none_stencil_min_testing_depth
@@ -338970,6 +368318,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d24_unorm_s8_
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d24_unorm_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d24_unorm_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d24_unorm_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d24_unorm_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d24_unorm_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d24_unorm_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d24_unorm_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d24_unorm_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d32_sfloat_s8_uint.depth_none_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d32_sfloat_s8_uint.depth_none_stencil_zero_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d32_sfloat_s8_uint.depth_none_stencil_min_testing_depth
@@ -339008,6 +368394,44 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d32_sfloat_s8
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d32_sfloat_s8_uint.depth_max_stencil_min_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d32_sfloat_s8_uint.depth_max_stencil_max_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d32_sfloat_s8_uint.depth_max_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_none_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_zero_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_average_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_min_stencil_max_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_none_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_none_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_zero_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_zero_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_min_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_min_testing_stencil
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_max_testing_depth
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_17_1.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_max_stencil_max_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_2.d16_unorm.depth_none
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_2.d16_unorm.depth_zero
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_2.d16_unorm.depth_average
@@ -339036,6 +368460,15 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_2.d16_unorm_s
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_2.d16_unorm_s8_uint.stencil_min
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_2.d16_unorm_s8_uint.depth_max
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_2.d16_unorm_s8_uint.stencil_max
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_2.d16_unorm_s8_uint_separate_layouts.depth_none
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_2.d16_unorm_s8_uint_separate_layouts.stencil_none
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_2.d16_unorm_s8_uint_separate_layouts.depth_zero
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_2.d16_unorm_s8_uint_separate_layouts.stencil_zero
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_2.d16_unorm_s8_uint_separate_layouts.depth_average
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_2.d16_unorm_s8_uint_separate_layouts.depth_min
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_2.d16_unorm_s8_uint_separate_layouts.stencil_min
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_2.d16_unorm_s8_uint_separate_layouts.depth_max
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_2.d16_unorm_s8_uint_separate_layouts.stencil_max
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_2.d24_unorm_s8_uint.depth_none
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_2.d24_unorm_s8_uint.stencil_none
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_2.d24_unorm_s8_uint.depth_zero
@@ -339045,6 +368478,15 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_2.d24_unorm_s
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_2.d24_unorm_s8_uint.stencil_min
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_2.d24_unorm_s8_uint.depth_max
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_2.d24_unorm_s8_uint.stencil_max
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_2.d24_unorm_s8_uint_separate_layouts.depth_none
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_2.d24_unorm_s8_uint_separate_layouts.stencil_none
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_2.d24_unorm_s8_uint_separate_layouts.depth_zero
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_2.d24_unorm_s8_uint_separate_layouts.stencil_zero
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_2.d24_unorm_s8_uint_separate_layouts.depth_average
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_2.d24_unorm_s8_uint_separate_layouts.depth_min
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_2.d24_unorm_s8_uint_separate_layouts.stencil_min
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_2.d24_unorm_s8_uint_separate_layouts.depth_max
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_2.d24_unorm_s8_uint_separate_layouts.stencil_max
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_2.d32_sfloat_s8_uint.depth_none
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_2.d32_sfloat_s8_uint.stencil_none
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_2.d32_sfloat_s8_uint.depth_zero
@@ -339054,6 +368496,15 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_2.d32_sfloat_
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_2.d32_sfloat_s8_uint.stencil_min
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_2.d32_sfloat_s8_uint.depth_max
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_2.d32_sfloat_s8_uint.stencil_max
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_none
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_2.d32_sfloat_s8_uint_separate_layouts.stencil_none
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_zero
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_2.d32_sfloat_s8_uint_separate_layouts.stencil_zero
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_average
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_min
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_2.d32_sfloat_s8_uint_separate_layouts.stencil_min
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_2.d32_sfloat_s8_uint_separate_layouts.depth_max
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_2.d32_sfloat_s8_uint_separate_layouts.stencil_max
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_4.d16_unorm.depth_none
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_4.d16_unorm.depth_zero
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_4.d16_unorm.depth_average
@@ -339082,6 +368533,15 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_4.d16_unorm_s
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_4.d16_unorm_s8_uint.stencil_min
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_4.d16_unorm_s8_uint.depth_max
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_4.d16_unorm_s8_uint.stencil_max
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_4.d16_unorm_s8_uint_separate_layouts.depth_none
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_4.d16_unorm_s8_uint_separate_layouts.stencil_none
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_4.d16_unorm_s8_uint_separate_layouts.depth_zero
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_4.d16_unorm_s8_uint_separate_layouts.stencil_zero
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_4.d16_unorm_s8_uint_separate_layouts.depth_average
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_4.d16_unorm_s8_uint_separate_layouts.depth_min
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_4.d16_unorm_s8_uint_separate_layouts.stencil_min
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_4.d16_unorm_s8_uint_separate_layouts.depth_max
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_4.d16_unorm_s8_uint_separate_layouts.stencil_max
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_4.d24_unorm_s8_uint.depth_none
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_4.d24_unorm_s8_uint.stencil_none
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_4.d24_unorm_s8_uint.depth_zero
@@ -339091,6 +368551,15 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_4.d24_unorm_s
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_4.d24_unorm_s8_uint.stencil_min
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_4.d24_unorm_s8_uint.depth_max
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_4.d24_unorm_s8_uint.stencil_max
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_4.d24_unorm_s8_uint_separate_layouts.depth_none
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_4.d24_unorm_s8_uint_separate_layouts.stencil_none
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_4.d24_unorm_s8_uint_separate_layouts.depth_zero
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_4.d24_unorm_s8_uint_separate_layouts.stencil_zero
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_4.d24_unorm_s8_uint_separate_layouts.depth_average
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_4.d24_unorm_s8_uint_separate_layouts.depth_min
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_4.d24_unorm_s8_uint_separate_layouts.stencil_min
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_4.d24_unorm_s8_uint_separate_layouts.depth_max
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_4.d24_unorm_s8_uint_separate_layouts.stencil_max
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_4.d32_sfloat_s8_uint.depth_none
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_4.d32_sfloat_s8_uint.stencil_none
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_4.d32_sfloat_s8_uint.depth_zero
@@ -339100,6 +368569,15 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_4.d32_sfloat_
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_4.d32_sfloat_s8_uint.stencil_min
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_4.d32_sfloat_s8_uint.depth_max
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_4.d32_sfloat_s8_uint.stencil_max
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_none
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_4.d32_sfloat_s8_uint_separate_layouts.stencil_none
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_zero
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_4.d32_sfloat_s8_uint_separate_layouts.stencil_zero
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_average
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_min
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_4.d32_sfloat_s8_uint_separate_layouts.stencil_min
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_4.d32_sfloat_s8_uint_separate_layouts.depth_max
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_4.d32_sfloat_s8_uint_separate_layouts.stencil_max
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_8.d16_unorm.depth_none
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_8.d16_unorm.depth_zero
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_8.d16_unorm.depth_average
@@ -339128,6 +368606,15 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_8.d16_unorm_s
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_8.d16_unorm_s8_uint.stencil_min
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_8.d16_unorm_s8_uint.depth_max
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_8.d16_unorm_s8_uint.stencil_max
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_8.d16_unorm_s8_uint_separate_layouts.depth_none
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_8.d16_unorm_s8_uint_separate_layouts.stencil_none
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_8.d16_unorm_s8_uint_separate_layouts.depth_zero
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_8.d16_unorm_s8_uint_separate_layouts.stencil_zero
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_8.d16_unorm_s8_uint_separate_layouts.depth_average
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_8.d16_unorm_s8_uint_separate_layouts.depth_min
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_8.d16_unorm_s8_uint_separate_layouts.stencil_min
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_8.d16_unorm_s8_uint_separate_layouts.depth_max
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_8.d16_unorm_s8_uint_separate_layouts.stencil_max
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_8.d24_unorm_s8_uint.depth_none
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_8.d24_unorm_s8_uint.stencil_none
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_8.d24_unorm_s8_uint.depth_zero
@@ -339137,6 +368624,15 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_8.d24_unorm_s
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_8.d24_unorm_s8_uint.stencil_min
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_8.d24_unorm_s8_uint.depth_max
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_8.d24_unorm_s8_uint.stencil_max
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_8.d24_unorm_s8_uint_separate_layouts.depth_none
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_8.d24_unorm_s8_uint_separate_layouts.stencil_none
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_8.d24_unorm_s8_uint_separate_layouts.depth_zero
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_8.d24_unorm_s8_uint_separate_layouts.stencil_zero
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_8.d24_unorm_s8_uint_separate_layouts.depth_average
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_8.d24_unorm_s8_uint_separate_layouts.depth_min
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_8.d24_unorm_s8_uint_separate_layouts.stencil_min
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_8.d24_unorm_s8_uint_separate_layouts.depth_max
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_8.d24_unorm_s8_uint_separate_layouts.stencil_max
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_8.d32_sfloat_s8_uint.depth_none
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_8.d32_sfloat_s8_uint.stencil_none
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_8.d32_sfloat_s8_uint.depth_zero
@@ -339146,6 +368642,15 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_8.d32_sfloat_
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_8.d32_sfloat_s8_uint.stencil_min
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_8.d32_sfloat_s8_uint.depth_max
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_8.d32_sfloat_s8_uint.stencil_max
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_none
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_8.d32_sfloat_s8_uint_separate_layouts.stencil_none
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_zero
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_8.d32_sfloat_s8_uint_separate_layouts.stencil_zero
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_average
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_min
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_8.d32_sfloat_s8_uint_separate_layouts.stencil_min
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_8.d32_sfloat_s8_uint_separate_layouts.depth_max
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_8.d32_sfloat_s8_uint_separate_layouts.stencil_max
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_16.d16_unorm.depth_none
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_16.d16_unorm.depth_zero
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_16.d16_unorm.depth_average
@@ -339174,6 +368679,15 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_16.d16_unorm_
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_16.d16_unorm_s8_uint.stencil_min
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_16.d16_unorm_s8_uint.depth_max
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_16.d16_unorm_s8_uint.stencil_max
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_16.d16_unorm_s8_uint_separate_layouts.depth_none
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_16.d16_unorm_s8_uint_separate_layouts.stencil_none
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_16.d16_unorm_s8_uint_separate_layouts.depth_zero
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_16.d16_unorm_s8_uint_separate_layouts.stencil_zero
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_16.d16_unorm_s8_uint_separate_layouts.depth_average
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_16.d16_unorm_s8_uint_separate_layouts.depth_min
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_16.d16_unorm_s8_uint_separate_layouts.stencil_min
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_16.d16_unorm_s8_uint_separate_layouts.depth_max
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_16.d16_unorm_s8_uint_separate_layouts.stencil_max
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_16.d24_unorm_s8_uint.depth_none
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_16.d24_unorm_s8_uint.stencil_none
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_16.d24_unorm_s8_uint.depth_zero
@@ -339183,6 +368697,15 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_16.d24_unorm_
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_16.d24_unorm_s8_uint.stencil_min
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_16.d24_unorm_s8_uint.depth_max
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_16.d24_unorm_s8_uint.stencil_max
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_16.d24_unorm_s8_uint_separate_layouts.depth_none
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_16.d24_unorm_s8_uint_separate_layouts.stencil_none
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_16.d24_unorm_s8_uint_separate_layouts.depth_zero
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_16.d24_unorm_s8_uint_separate_layouts.stencil_zero
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_16.d24_unorm_s8_uint_separate_layouts.depth_average
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_16.d24_unorm_s8_uint_separate_layouts.depth_min
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_16.d24_unorm_s8_uint_separate_layouts.stencil_min
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_16.d24_unorm_s8_uint_separate_layouts.depth_max
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_16.d24_unorm_s8_uint_separate_layouts.stencil_max
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_16.d32_sfloat_s8_uint.depth_none
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_16.d32_sfloat_s8_uint.stencil_none
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_16.d32_sfloat_s8_uint.depth_zero
@@ -339192,6 +368715,15 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_16.d32_sfloat
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_16.d32_sfloat_s8_uint.stencil_min
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_16.d32_sfloat_s8_uint.depth_max
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_16.d32_sfloat_s8_uint.stencil_max
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_none
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_16.d32_sfloat_s8_uint_separate_layouts.stencil_none
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_zero
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_16.d32_sfloat_s8_uint_separate_layouts.stencil_zero
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_average
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_min
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_16.d32_sfloat_s8_uint_separate_layouts.stencil_min
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_16.d32_sfloat_s8_uint_separate_layouts.depth_max
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_16.d32_sfloat_s8_uint_separate_layouts.stencil_max
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_32.d16_unorm.depth_none
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_32.d16_unorm.depth_zero
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_32.d16_unorm.depth_average
@@ -339220,6 +368752,15 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_32.d16_unorm_
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_32.d16_unorm_s8_uint.stencil_min
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_32.d16_unorm_s8_uint.depth_max
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_32.d16_unorm_s8_uint.stencil_max
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_32.d16_unorm_s8_uint_separate_layouts.depth_none
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_32.d16_unorm_s8_uint_separate_layouts.stencil_none
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_32.d16_unorm_s8_uint_separate_layouts.depth_zero
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_32.d16_unorm_s8_uint_separate_layouts.stencil_zero
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_32.d16_unorm_s8_uint_separate_layouts.depth_average
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_32.d16_unorm_s8_uint_separate_layouts.depth_min
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_32.d16_unorm_s8_uint_separate_layouts.stencil_min
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_32.d16_unorm_s8_uint_separate_layouts.depth_max
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_32.d16_unorm_s8_uint_separate_layouts.stencil_max
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_32.d24_unorm_s8_uint.depth_none
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_32.d24_unorm_s8_uint.stencil_none
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_32.d24_unorm_s8_uint.depth_zero
@@ -339229,6 +368770,15 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_32.d24_unorm_
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_32.d24_unorm_s8_uint.stencil_min
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_32.d24_unorm_s8_uint.depth_max
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_32.d24_unorm_s8_uint.stencil_max
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_32.d24_unorm_s8_uint_separate_layouts.depth_none
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_32.d24_unorm_s8_uint_separate_layouts.stencil_none
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_32.d24_unorm_s8_uint_separate_layouts.depth_zero
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_32.d24_unorm_s8_uint_separate_layouts.stencil_zero
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_32.d24_unorm_s8_uint_separate_layouts.depth_average
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_32.d24_unorm_s8_uint_separate_layouts.depth_min
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_32.d24_unorm_s8_uint_separate_layouts.stencil_min
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_32.d24_unorm_s8_uint_separate_layouts.depth_max
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_32.d24_unorm_s8_uint_separate_layouts.stencil_max
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_32.d32_sfloat_s8_uint.depth_none
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_32.d32_sfloat_s8_uint.stencil_none
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_32.d32_sfloat_s8_uint.depth_zero
@@ -339238,6 +368788,15 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_32.d32_sfloat
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_32.d32_sfloat_s8_uint.stencil_min
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_32.d32_sfloat_s8_uint.depth_max
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_32.d32_sfloat_s8_uint.stencil_max
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_none
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_32.d32_sfloat_s8_uint_separate_layouts.stencil_none
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_zero
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_32.d32_sfloat_s8_uint_separate_layouts.stencil_zero
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_average
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_min
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_32.d32_sfloat_s8_uint_separate_layouts.stencil_min
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_32.d32_sfloat_s8_uint_separate_layouts.depth_max
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_32.d32_sfloat_s8_uint_separate_layouts.stencil_max
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_64.d16_unorm.depth_none
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_64.d16_unorm.depth_zero
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_64.d16_unorm.depth_average
@@ -339266,6 +368825,15 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_64.d16_unorm_
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_64.d16_unorm_s8_uint.stencil_min
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_64.d16_unorm_s8_uint.depth_max
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_64.d16_unorm_s8_uint.stencil_max
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_64.d16_unorm_s8_uint_separate_layouts.depth_none
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_64.d16_unorm_s8_uint_separate_layouts.stencil_none
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_64.d16_unorm_s8_uint_separate_layouts.depth_zero
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_64.d16_unorm_s8_uint_separate_layouts.stencil_zero
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_64.d16_unorm_s8_uint_separate_layouts.depth_average
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_64.d16_unorm_s8_uint_separate_layouts.depth_min
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_64.d16_unorm_s8_uint_separate_layouts.stencil_min
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_64.d16_unorm_s8_uint_separate_layouts.depth_max
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_64.d16_unorm_s8_uint_separate_layouts.stencil_max
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_64.d24_unorm_s8_uint.depth_none
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_64.d24_unorm_s8_uint.stencil_none
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_64.d24_unorm_s8_uint.depth_zero
@@ -339275,6 +368843,15 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_64.d24_unorm_
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_64.d24_unorm_s8_uint.stencil_min
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_64.d24_unorm_s8_uint.depth_max
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_64.d24_unorm_s8_uint.stencil_max
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_64.d24_unorm_s8_uint_separate_layouts.depth_none
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_64.d24_unorm_s8_uint_separate_layouts.stencil_none
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_64.d24_unorm_s8_uint_separate_layouts.depth_zero
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_64.d24_unorm_s8_uint_separate_layouts.stencil_zero
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_64.d24_unorm_s8_uint_separate_layouts.depth_average
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_64.d24_unorm_s8_uint_separate_layouts.depth_min
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_64.d24_unorm_s8_uint_separate_layouts.stencil_min
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_64.d24_unorm_s8_uint_separate_layouts.depth_max
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_64.d24_unorm_s8_uint_separate_layouts.stencil_max
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_64.d32_sfloat_s8_uint.depth_none
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_64.d32_sfloat_s8_uint.stencil_none
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_64.d32_sfloat_s8_uint.depth_zero
@@ -339284,6 +368861,15 @@ dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_64.d32_sfloat
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_64.d32_sfloat_s8_uint.stencil_min
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_64.d32_sfloat_s8_uint.depth_max
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_64.d32_sfloat_s8_uint.stencil_max
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_none
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_64.d32_sfloat_s8_uint_separate_layouts.stencil_none
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_zero
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_64.d32_sfloat_s8_uint_separate_layouts.stencil_zero
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_average
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_min
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_64.d32_sfloat_s8_uint_separate_layouts.stencil_min
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_64.d32_sfloat_s8_uint_separate_layouts.depth_max
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_16_64_6.samples_64.d32_sfloat_s8_uint_separate_layouts.stencil_max
 dEQP-VK.ubo.2_level_array.std140.float.vertex
 dEQP-VK.ubo.2_level_array.std140.float.fragment
 dEQP-VK.ubo.2_level_array.std140.float.both

diff --git a/external/vulkancts/scripts/src/extensions_data.txt b/external/vulkancts/scripts/src/extensions_data.txt
index 835e8b8..abeda1f 100644 (file)
--- a/external/vulkancts/scripts/src/extensions_data.txt
+++ b/external/vulkancts/scripts/src/extensions_data.txt
@@ -70,4 +70,5 @@ VK_KHR_pipeline_executable_properties                 DEVICE
 VK_KHR_timeline_semaphore                                      DEVICE
 VK_KHR_shader_clock                                                    DEVICE
 VK_KHR_spirv_1_4                                                       DEVICE
-VK_KHR_shader_subgroup_extended_types          DEVICE
\ No newline at end of file
+VK_KHR_shader_subgroup_extended_types          DEVICE
+VK_KHR_separate_depth_stencil_layouts          DEVICE

diff --git a/external/vulkancts/scripts/src/vulkan_core.h b/external/vulkancts/scripts/src/vulkan_core.h
index 0fa5eff..b60eb6e 100644 (file)
--- a/external/vulkancts/scripts/src/vulkan_core.h
+++ b/external/vulkancts/scripts/src/vulkan_core.h
@@ -505,6 +505,9 @@ typedef enum VkStructureType {
     VK_STRUCTURE_TYPE_MEMORY_PRIORITY_ALLOCATE_INFO_EXT = 1000238001,
     VK_STRUCTURE_TYPE_SURFACE_PROTECTED_CAPABILITIES_KHR = 1000239000,
     VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_DEDICATED_ALLOCATION_IMAGE_ALIASING_FEATURES_NV = 1000240000,
+    VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_SEPARATE_DEPTH_STENCIL_LAYOUTS_FEATURES_KHR = 1000241000,
+    VK_STRUCTURE_TYPE_ATTACHMENT_REFERENCE_STENCIL_LAYOUT_KHR = 1000241001,
+    VK_STRUCTURE_TYPE_ATTACHMENT_DESCRIPTION_STENCIL_LAYOUT_KHR = 1000241002,
     VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_BUFFER_DEVICE_ADDRESS_FEATURES_EXT = 1000244000,
     VK_STRUCTURE_TYPE_BUFFER_DEVICE_ADDRESS_INFO_EXT = 1000244001,
     VK_STRUCTURE_TYPE_BUFFER_DEVICE_ADDRESS_CREATE_INFO_EXT = 1000244002,
@@ -981,6 +984,10 @@ typedef enum VkImageLayout {
     VK_IMAGE_LAYOUT_SHARED_PRESENT_KHR = 1000111000,
     VK_IMAGE_LAYOUT_SHADING_RATE_OPTIMAL_NV = 1000164003,
     VK_IMAGE_LAYOUT_FRAGMENT_DENSITY_MAP_OPTIMAL_EXT = 1000218000,
+    VK_IMAGE_LAYOUT_DEPTH_ATTACHMENT_OPTIMAL_KHR = 1000241000,
+    VK_IMAGE_LAYOUT_DEPTH_READ_ONLY_OPTIMAL_KHR = 1000241001,
+    VK_IMAGE_LAYOUT_STENCIL_ATTACHMENT_OPTIMAL_KHR = 1000241002,
+    VK_IMAGE_LAYOUT_STENCIL_READ_ONLY_OPTIMAL_KHR = 1000241003,
     VK_IMAGE_LAYOUT_DEPTH_READ_ONLY_STENCIL_ATTACHMENT_OPTIMAL_KHR = VK_IMAGE_LAYOUT_DEPTH_READ_ONLY_STENCIL_ATTACHMENT_OPTIMAL,
     VK_IMAGE_LAYOUT_DEPTH_ATTACHMENT_STENCIL_READ_ONLY_OPTIMAL_KHR = VK_IMAGE_LAYOUT_DEPTH_ATTACHMENT_STENCIL_READ_ONLY_OPTIMAL,
     VK_IMAGE_LAYOUT_BEGIN_RANGE = VK_IMAGE_LAYOUT_UNDEFINED,
@@ -6484,6 +6491,30 @@ typedef struct VkSurfaceProtectedCapabilitiesKHR {
 
 
 
+#define VK_KHR_separate_depth_stencil_layouts 1
+#define VK_KHR_SEPARATE_DEPTH_STENCIL_LAYOUTS_SPEC_VERSION 1
+#define VK_KHR_SEPARATE_DEPTH_STENCIL_LAYOUTS_EXTENSION_NAME "VK_KHR_separate_depth_stencil_layouts"
+typedef struct VkPhysicalDeviceSeparateDepthStencilLayoutsFeaturesKHR {
+    VkStructureType    sType;
+    void*              pNext;
+    VkBool32           separateDepthStencilLayouts;
+} VkPhysicalDeviceSeparateDepthStencilLayoutsFeaturesKHR;
+
+typedef struct VkAttachmentReferenceStencilLayoutKHR {
+    VkStructureType    sType;
+    void*              pNext;
+    VkImageLayout      stencilLayout;
+} VkAttachmentReferenceStencilLayoutKHR;
+
+typedef struct VkAttachmentDescriptionStencilLayoutKHR {
+    VkStructureType    sType;
+    void*              pNext;
+    VkImageLayout      stencilInitialLayout;
+    VkImageLayout      stencilFinalLayout;
+} VkAttachmentDescriptionStencilLayoutKHR;
+
+
+
 #define VK_KHR_uniform_buffer_standard_layout 1
 #define VK_KHR_UNIFORM_BUFFER_STANDARD_LAYOUT_SPEC_VERSION 1
 #define VK_KHR_UNIFORM_BUFFER_STANDARD_LAYOUT_EXTENSION_NAME "VK_KHR_uniform_buffer_standard_layout"